Siva ram / Mbed 2 deprecated COM_TEST_2

INT working perfectly

Dependencies:   mbed

main.cpp@0:7ddcd61d0bc8, 2015-07-05 (annotated)

Committer:
Piasiv1206
Date:
Sun Jul 05 13:23:37 2015 +0000
Revision:
0:7ddcd61d0bc8
COM Code Working

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Piasiv1206 0:7ddcd61d0bc8 1 #include "mbed.h"
Piasiv1206 0:7ddcd61d0bc8 2 #define ENDL "\r" << endl;
Piasiv1206 0:7ddcd61d0bc8 3 #define START_ADDRESS 0x020;
Piasiv1206 0:7ddcd61d0bc8 4 #define PI 3.14
Piasiv1206 0:7ddcd61d0bc8 5
Piasiv1206 0:7ddcd61d0bc8 6 InterruptIn SPI_INT(PTD2);
Piasiv1206 0:7ddcd61d0bc8 7 SPI adf(PTD6,PTD7,PTD5 );
Piasiv1206 0:7ddcd61d0bc8 8 DigitalOut CS(PTD4);
Piasiv1206 0:7ddcd61d0bc8 9 Serial pc(USBTX, USBRX);
Piasiv1206 0:7ddcd61d0bc8 10 DigitalOut flash(LED4);
Piasiv1206 0:7ddcd61d0bc8 11
Piasiv1206 0:7ddcd61d0bc8 12
Piasiv1206 0:7ddcd61d0bc8 13 int src=0;
Piasiv1206 0:7ddcd61d0bc8 14 int irqsrc = 0;
Piasiv1206 0:7ddcd61d0bc8 15 int j = 0;
Piasiv1206 0:7ddcd61d0bc8 16 int k = 0;
Piasiv1206 0:7ddcd61d0bc8 17 int x=0;
Piasiv1206 0:7ddcd61d0bc8 18 int irq1=0;
Piasiv1206 0:7ddcd61d0bc8 19 unsigned char data[]={0x65,0xD3,0x06,0x08,0xBB,0xE7,0xCD,0x16,0x65,0xD3,0x06,0x08,0xBB,0xE7,0xCD,0x16,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x20,0xE5,0xEE,0x00,0xCE,0x56,0x33,0x76,0x2D,0xD7,0x5F,0x0A,0x2D,0xD5,0x9D,0x36,0xD2,0x2C,0x97,0xB2,0xF1,0xA8,0xBE,0xE4,0x9F,0xE8,0x57,0x8C,0x01,0x27,0xB2,0x34,0x6B,0x5E,0x9A,0x30,0x5F,0x78,0x7C,0x0E,0xDC,0x0D,0x4B,0x78,0x00,0x13,0x09,0xDA,0xAD,0x9A,0x3C,0xD6,0xCC,0xB2,0x89,0x8C,0xB4,0xA0,0x0B,0xA4,0x14,0x09,0xEE,0x9C,0x62,0x86,0x53,0xBE,0x59,0x56,0xF7,0xF2,0x71,0x75,0x04,0xE4,0xC7,0x7B,0xBA,0xAC,0xE6,0x0A,0xB9,0x74,0x2B,0x87,0x2D,0x82,0x3D,0x3D,0xCF,0x44,0x48,0xAE,0xA2,0xB2,0xD8,0x88,0xEA,0x68,0x69,0x50,0x0C,0xFA,0xB9,0x3F,0xF9,0xAE,0x2D,0xA6,0x70,0x76,0x99,0xBA,0x99,0xF8,0x61,0xA9,0xBA,0xF6,0x62,0xC9,0xFB,0x74,0xB2,0x4A,0xFF,0xD0,0x1B,0xA2,0x61,0x30,0x08,0xB0,0x51,0x38,0x2D,0x33,0x95,0x8E,0xB7,0x6B,0x75,0xD4,0xF0,0xAB,0x75,0x66,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0x20,0xE5,0xEE,0x00,0x53,0x54,0x8B,0x26,0xFB,0x1C,0x6A,0x2E,0x6E,0x67,0xFA,0x14,0x78,0xC0,0x49,0xEC,0x23,0x5A,0xD7,0xA4,0xA3,0x17,0xDE,0x1E,0x40,0xD7,0x03,0x52,0x37,0x80,0x04,0xC2,0x1D,0x8B,0x66,0x8E,0x4D,0x53,0x2C,0xA2,0x18,0xED,0x28,0x00,0xBA,0x45,0x02,0x7A,0x69,0xD8,0xA1,0x94,0x3B,0xF6,0x55,0xBC,0x7F,0x3C,0x5D,0x42,0xCE,0x71,0xDE,0xEC,0xAA,0xF9,0x82,0xAC,0x97,0x4A,0xE1,0xCA,0x58,0x2F,0x4F,0x70,0xF4,0x52,0x2B,0xAA,0xAB,0x16,0x22,0x3A,0x26,0x9A,0x54,0x00,0xCF,0x8E,0x4F,0xFE,0x1A,0xEB,0x69,0x9E,0x87,0x46,0x6E,0xA6,0x1F,0x98,0x6A,0x6C,0xAF,0x78,0xB2,0x7E,0x37,0x6C,0x92,0xBE,0x7D,0x06,0xE8,0x9A,0x93,0x02,0x2C,0x14,0x13,0x8B,0x4C,0xE4,0x58,0xCD,0xDA,0xDC,0x5D,0x7C,0x2A,0xDC,0x56,0x74,0xD5,0x20,0xB2,0x5E,0xC7,0x18,0xA2,0xFB,0x99,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x97,0x4C,0x18,0x22,0xEF,0x9F,0x34,0x59,0x97,0x4C,0x18,0x22,0xEF,0x9F,0x34,0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x97,0x4C,0x18,0x22,0xEF,0x9F,0x34,0x59,0x97,0x4C,0x18,0x22,0xEF,0x9F,0x34,0x58,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
Piasiv1206 0:7ddcd61d0bc8 20
Piasiv1206 0:7ddcd61d0bc8 21 void ISR (void)
Piasiv1206 0:7ddcd61d0bc8 22 {
Piasiv1206 0:7ddcd61d0bc8 23
Piasiv1206 0:7ddcd61d0bc8 24 flash = !flash;
Piasiv1206 0:7ddcd61d0bc8 25
Piasiv1206 0:7ddcd61d0bc8 26 CS=0;
Piasiv1206 0:7ddcd61d0bc8 27 adf.write(0x0B);//IRQ_SOURCE_Random write //To read CMD = 2B 36 FF FF
Piasiv1206 0:7ddcd61d0bc8 28 adf.write(0x36);//Address : 0x336
Piasiv1206 0:7ddcd61d0bc8 29 adf.write(0xFF);//Put Low
Piasiv1206 0:7ddcd61d0bc8 30 CS=1;
Piasiv1206 0:7ddcd61d0bc8 31
Piasiv1206 0:7ddcd61d0bc8 32 CS=0;
Piasiv1206 0:7ddcd61d0bc8 33
Piasiv1206 0:7ddcd61d0bc8 34
Piasiv1206 0:7ddcd61d0bc8 35 CS=0;
Piasiv1206 0:7ddcd61d0bc8 36 k=0;
Piasiv1206 0:7ddcd61d0bc8 37
Piasiv1206 0:7ddcd61d0bc8 38 if(!j){
Piasiv1206 0:7ddcd61d0bc8 39 adf.write(0x18);
Piasiv1206 0:7ddcd61d0bc8 40 adf.write(0x20);
Piasiv1206 0:7ddcd61d0bc8 41 while(k<=223){
Piasiv1206 0:7ddcd61d0bc8 42
Piasiv1206 0:7ddcd61d0bc8 43 adf.write(data[k]);
Piasiv1206 0:7ddcd61d0bc8 44 k++;
Piasiv1206 0:7ddcd61d0bc8 45 }
Piasiv1206 0:7ddcd61d0bc8 46
Piasiv1206 0:7ddcd61d0bc8 47 }
Piasiv1206 0:7ddcd61d0bc8 48
Piasiv1206 0:7ddcd61d0bc8 49 else if(j<=sizeof(data)/112){
Piasiv1206 0:7ddcd61d0bc8 50
Piasiv1206 0:7ddcd61d0bc8 51 if(j%2){ //src== Buffer Half Full src == 1
Piasiv1206 0:7ddcd61d0bc8 52 adf.write(0x18);
Piasiv1206 0:7ddcd61d0bc8 53 adf.write(0x20);
Piasiv1206 0:7ddcd61d0bc8 54 }
Piasiv1206 0:7ddcd61d0bc8 55
Piasiv1206 0:7ddcd61d0bc8 56
Piasiv1206 0:7ddcd61d0bc8 57 else{ //src== Buffer is Full src==2
Piasiv1206 0:7ddcd61d0bc8 58 adf.write(0x18);
Piasiv1206 0:7ddcd61d0bc8 59 adf.write(0x90);
Piasiv1206 0:7ddcd61d0bc8 60 }
Piasiv1206 0:7ddcd61d0bc8 61
Piasiv1206 0:7ddcd61d0bc8 62
Piasiv1206 0:7ddcd61d0bc8 63 while(k<=111){
Piasiv1206 0:7ddcd61d0bc8 64 adf.write(data[(j+1)*112+k]);
Piasiv1206 0:7ddcd61d0bc8 65 k++;
Piasiv1206 0:7ddcd61d0bc8 66
Piasiv1206 0:7ddcd61d0bc8 67 }
Piasiv1206 0:7ddcd61d0bc8 68 }
Piasiv1206 0:7ddcd61d0bc8 69 j++;
Piasiv1206 0:7ddcd61d0bc8 70 if(j>=(sizeof(data)/112) )
Piasiv1206 0:7ddcd61d0bc8 71 j=1;
Piasiv1206 0:7ddcd61d0bc8 72 CS=1;
Piasiv1206 0:7ddcd61d0bc8 73 wait_us(5);
Piasiv1206 0:7ddcd61d0bc8 74
Piasiv1206 0:7ddcd61d0bc8 75
Piasiv1206 0:7ddcd61d0bc8 76
Piasiv1206 0:7ddcd61d0bc8 77
Piasiv1206 0:7ddcd61d0bc8 78 }
Piasiv1206 0:7ddcd61d0bc8 79
Piasiv1206 0:7ddcd61d0bc8 80 void initiate(void){
Piasiv1206 0:7ddcd61d0bc8 81
Piasiv1206 0:7ddcd61d0bc8 82 CS=0;
Piasiv1206 0:7ddcd61d0bc8 83 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 84 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 85 CS=1;
Piasiv1206 0:7ddcd61d0bc8 86 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 87
Piasiv1206 0:7ddcd61d0bc8 88 CS=0;
Piasiv1206 0:7ddcd61d0bc8 89 adf.write(0x08); // TRANSMIT_DATA LENGTH
Piasiv1206 0:7ddcd61d0bc8 90 adf.write(0x14);
Piasiv1206 0:7ddcd61d0bc8 91 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 92 CS=1;
Piasiv1206 0:7ddcd61d0bc8 93 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 94
Piasiv1206 0:7ddcd61d0bc8 95 CS=0;
Piasiv1206 0:7ddcd61d0bc8 96 adf.write(0x08); // TRANSMIT_DATA LENGTH
Piasiv1206 0:7ddcd61d0bc8 97 adf.write(0x15);
Piasiv1206 0:7ddcd61d0bc8 98 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 99 CS=1;
Piasiv1206 0:7ddcd61d0bc8 100 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 101
Piasiv1206 0:7ddcd61d0bc8 102 CS=0;
Piasiv1206 0:7ddcd61d0bc8 103 adf.write(0x09);
Piasiv1206 0:7ddcd61d0bc8 104 adf.write(0x24); // TX_BASE ADDRESS 0x20(starting Tx Byte)
Piasiv1206 0:7ddcd61d0bc8 105 adf.write(0x20);
Piasiv1206 0:7ddcd61d0bc8 106 CS=1;
Piasiv1206 0:7ddcd61d0bc8 107 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 108
Piasiv1206 0:7ddcd61d0bc8 109 CS=0;
Piasiv1206 0:7ddcd61d0bc8 110 adf.write(0x09);
Piasiv1206 0:7ddcd61d0bc8 111 adf.write(0x37);// BUFFER SIZE 0xE0=224 Bytes 0x137 is adress of buffer size
Piasiv1206 0:7ddcd61d0bc8 112 adf.write(0xE0);
Piasiv1206 0:7ddcd61d0bc8 113 CS=1;
Piasiv1206 0:7ddcd61d0bc8 114 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 115
Piasiv1206 0:7ddcd61d0bc8 116 CS=0;
Piasiv1206 0:7ddcd61d0bc8 117 adf.write(0x09);
Piasiv1206 0:7ddcd61d0bc8 118 adf.write(0x36);//BB_Tx_Buffer Signal when Buffer is half filled
Piasiv1206 0:7ddcd61d0bc8 119 adf.write(0x70);//0x70 = 112 >> When Half buffer interrupt is given
Piasiv1206 0:7ddcd61d0bc8 120 CS=1;
Piasiv1206 0:7ddcd61d0bc8 121 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 122
Piasiv1206 0:7ddcd61d0bc8 123
Piasiv1206 0:7ddcd61d0bc8 124 CS=0;
Piasiv1206 0:7ddcd61d0bc8 125 adf.write(0x09);
Piasiv1206 0:7ddcd61d0bc8 126 adf.write(0x39);//BB_Tx_Buffer Signal when Buffer is half filled
Piasiv1206 0:7ddcd61d0bc8 127 adf.write(0x10);//0x70 = 112 >> When Half buffer interrupt is given
Piasiv1206 0:7ddcd61d0bc8 128 CS=1;
Piasiv1206 0:7ddcd61d0bc8 129 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 130
Piasiv1206 0:7ddcd61d0bc8 131
Piasiv1206 0:7ddcd61d0bc8 132
Piasiv1206 0:7ddcd61d0bc8 133 }
Piasiv1206 0:7ddcd61d0bc8 134
Piasiv1206 0:7ddcd61d0bc8 135 void bbram_write()
Piasiv1206 0:7ddcd61d0bc8 136 {
Piasiv1206 0:7ddcd61d0bc8 137 CS=0;
Piasiv1206 0:7ddcd61d0bc8 138 adf.write(0xB0);//PHY_OFF
Piasiv1206 0:7ddcd61d0bc8 139 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 140 CS=1;
Piasiv1206 0:7ddcd61d0bc8 141
Piasiv1206 0:7ddcd61d0bc8 142 // Write bbram
Piasiv1206 0:7ddcd61d0bc8 143 CS=0;
Piasiv1206 0:7ddcd61d0bc8 144 adf.write(0x19);
Piasiv1206 0:7ddcd61d0bc8 145 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 146 adf.write(0x60);
Piasiv1206 0:7ddcd61d0bc8 147 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 148
Piasiv1206 0:7ddcd61d0bc8 149 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 150 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 151 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 152 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 153
Piasiv1206 0:7ddcd61d0bc8 154 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 155 adf.write(0x33);
Piasiv1206 0:7ddcd61d0bc8 156 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 157 adf.write(0xF4);//Frequency Register F9 = 435.802 MHz F4 = 435.800 MHz
Piasiv1206 0:7ddcd61d0bc8 158
Piasiv1206 0:7ddcd61d0bc8 159 adf.write(0xC2);
Piasiv1206 0:7ddcd61d0bc8 160 adf.write(0x10);
Piasiv1206 0:7ddcd61d0bc8 161 adf.write(0xC0);
Piasiv1206 0:7ddcd61d0bc8 162 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 163
Piasiv1206 0:7ddcd61d0bc8 164 adf.write(0x30);
Piasiv1206 0:7ddcd61d0bc8 165 adf.write(0x31);
Piasiv1206 0:7ddcd61d0bc8 166 adf.write(0x07);
Piasiv1206 0:7ddcd61d0bc8 167 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 168
Piasiv1206 0:7ddcd61d0bc8 169 adf.write(0x01);
Piasiv1206 0:7ddcd61d0bc8 170 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 171 adf.write(0x7F);
Piasiv1206 0:7ddcd61d0bc8 172 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 173
Piasiv1206 0:7ddcd61d0bc8 174 adf.write(0x0B);
Piasiv1206 0:7ddcd61d0bc8 175 adf.write(0x37);
Piasiv1206 0:7ddcd61d0bc8 176 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 177 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 178
Piasiv1206 0:7ddcd61d0bc8 179 adf.write(0x40);
Piasiv1206 0:7ddcd61d0bc8 180 adf.write(0x0C);
Piasiv1206 0:7ddcd61d0bc8 181 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 182 adf.write(0x05);
Piasiv1206 0:7ddcd61d0bc8 183
Piasiv1206 0:7ddcd61d0bc8 184 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 185 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 186 adf.write(0x18);
Piasiv1206 0:7ddcd61d0bc8 187 adf.write(0x12);
Piasiv1206 0:7ddcd61d0bc8 188
Piasiv1206 0:7ddcd61d0bc8 189 adf.write(0x34);
Piasiv1206 0:7ddcd61d0bc8 190 adf.write(0x56);
Piasiv1206 0:7ddcd61d0bc8 191 adf.write(0x10);
Piasiv1206 0:7ddcd61d0bc8 192 adf.write(0x10);
Piasiv1206 0:7ddcd61d0bc8 193
Piasiv1206 0:7ddcd61d0bc8 194 adf.write(0xC4); // Different
Piasiv1206 0:7ddcd61d0bc8 195 adf.write(0x14);
Piasiv1206 0:7ddcd61d0bc8 196 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 197 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 198
Piasiv1206 0:7ddcd61d0bc8 199 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 200 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 201 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 202 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 203
Piasiv1206 0:7ddcd61d0bc8 204 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 205 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 206 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 207 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 208
Piasiv1206 0:7ddcd61d0bc8 209 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 210 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 211 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 212 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 213
Piasiv1206 0:7ddcd61d0bc8 214 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 215 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 216 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 217 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 218
Piasiv1206 0:7ddcd61d0bc8 219 adf.write(0x04);
Piasiv1206 0:7ddcd61d0bc8 220 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 221 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 222 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 223
Piasiv1206 0:7ddcd61d0bc8 224 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 225 adf.write(0x00);
Piasiv1206 0:7ddcd61d0bc8 226 CS=1;
Piasiv1206 0:7ddcd61d0bc8 227 wait(1);
Piasiv1206 0:7ddcd61d0bc8 228
Piasiv1206 0:7ddcd61d0bc8 229 }
Piasiv1206 0:7ddcd61d0bc8 230
Piasiv1206 0:7ddcd61d0bc8 231 void send_data(void){
Piasiv1206 0:7ddcd61d0bc8 232
Piasiv1206 0:7ddcd61d0bc8 233 CS=0;
Piasiv1206 0:7ddcd61d0bc8 234 adf.write(0xBB);
Piasiv1206 0:7ddcd61d0bc8 235 CS=1;
Piasiv1206 0:7ddcd61d0bc8 236 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 237
Piasiv1206 0:7ddcd61d0bc8 238 CS=0;
Piasiv1206 0:7ddcd61d0bc8 239 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 240 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 241 CS=1;
Piasiv1206 0:7ddcd61d0bc8 242 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 243
Piasiv1206 0:7ddcd61d0bc8 244 // write_data();
Piasiv1206 0:7ddcd61d0bc8 245 ISR();
Piasiv1206 0:7ddcd61d0bc8 246
Piasiv1206 0:7ddcd61d0bc8 247 CS=0;
Piasiv1206 0:7ddcd61d0bc8 248 adf.write(0xB1);
Piasiv1206 0:7ddcd61d0bc8 249 CS=1;
Piasiv1206 0:7ddcd61d0bc8 250 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 251
Piasiv1206 0:7ddcd61d0bc8 252 CS=0;
Piasiv1206 0:7ddcd61d0bc8 253 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 254 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 255 CS=1;
Piasiv1206 0:7ddcd61d0bc8 256 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 257
Piasiv1206 0:7ddcd61d0bc8 258 CS=0;
Piasiv1206 0:7ddcd61d0bc8 259 adf.write(0xB5);
Piasiv1206 0:7ddcd61d0bc8 260 CS=1;
Piasiv1206 0:7ddcd61d0bc8 261 wait_ms(2);
Piasiv1206 0:7ddcd61d0bc8 262
Piasiv1206 0:7ddcd61d0bc8 263 CS=0;
Piasiv1206 0:7ddcd61d0bc8 264 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 265 adf.write(0xFF);
Piasiv1206 0:7ddcd61d0bc8 266 CS=1;
Piasiv1206 0:7ddcd61d0bc8 267 wait_us(20);
Piasiv1206 0:7ddcd61d0bc8 268
Piasiv1206 0:7ddcd61d0bc8 269 }
Piasiv1206 0:7ddcd61d0bc8 270
Piasiv1206 0:7ddcd61d0bc8 271
Piasiv1206 0:7ddcd61d0bc8 272 int main (void)
Piasiv1206 0:7ddcd61d0bc8 273 {
Piasiv1206 0:7ddcd61d0bc8 274
Piasiv1206 0:7ddcd61d0bc8 275 CS = 1;
Piasiv1206 0:7ddcd61d0bc8 276 adf.format(8,0);
Piasiv1206 0:7ddcd61d0bc8 277 adf.frequency(1000000);
Piasiv1206 0:7ddcd61d0bc8 278 SPI_INT.rise(&ISR);
Piasiv1206 0:7ddcd61d0bc8 279 bbram_write();
Piasiv1206 0:7ddcd61d0bc8 280 initiate();
Piasiv1206 0:7ddcd61d0bc8 281 send_data();
Piasiv1206 0:7ddcd61d0bc8 282 while(1);
Piasiv1206 0:7ddcd61d0bc8 283
Piasiv1206 0:7ddcd61d0bc8 284
Piasiv1206 0:7ddcd61d0bc8 285 }
Piasiv1206 0:7ddcd61d0bc8 286