patch for F746 demo
Fork of BSP_DISCO_F746NG by
Components/ov9655/ov9655.c@1:e8fac4061a5b, 2015-11-02 (annotated)
- Committer:
- NirT
- Date:
- Mon Nov 02 23:35:17 2015 +0000
- Revision:
- 1:e8fac4061a5b
Error: Incomplete type is not allowed in "patch/LwIP/src/include/lwip/dhcp.h", Line: 83, Col: 4; ; and more like this.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
NirT | 1:e8fac4061a5b | 1 | /** |
NirT | 1:e8fac4061a5b | 2 | ****************************************************************************** |
NirT | 1:e8fac4061a5b | 3 | * @file ov9655.c |
NirT | 1:e8fac4061a5b | 4 | * @author MCD Application Team |
NirT | 1:e8fac4061a5b | 5 | * @version V1.0.0 |
NirT | 1:e8fac4061a5b | 6 | * @date 25-June-2015 |
NirT | 1:e8fac4061a5b | 7 | * @brief This file provides the OV9655 camera driver |
NirT | 1:e8fac4061a5b | 8 | ****************************************************************************** |
NirT | 1:e8fac4061a5b | 9 | * @attention |
NirT | 1:e8fac4061a5b | 10 | * |
NirT | 1:e8fac4061a5b | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
NirT | 1:e8fac4061a5b | 12 | * |
NirT | 1:e8fac4061a5b | 13 | * Redistribution and use in source and binary forms, with or without modification, |
NirT | 1:e8fac4061a5b | 14 | * are permitted provided that the following conditions are met: |
NirT | 1:e8fac4061a5b | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
NirT | 1:e8fac4061a5b | 16 | * this list of conditions and the following disclaimer. |
NirT | 1:e8fac4061a5b | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
NirT | 1:e8fac4061a5b | 18 | * this list of conditions and the following disclaimer in the documentation |
NirT | 1:e8fac4061a5b | 19 | * and/or other materials provided with the distribution. |
NirT | 1:e8fac4061a5b | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
NirT | 1:e8fac4061a5b | 21 | * may be used to endorse or promote products derived from this software |
NirT | 1:e8fac4061a5b | 22 | * without specific prior written permission. |
NirT | 1:e8fac4061a5b | 23 | * |
NirT | 1:e8fac4061a5b | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
NirT | 1:e8fac4061a5b | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
NirT | 1:e8fac4061a5b | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
NirT | 1:e8fac4061a5b | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
NirT | 1:e8fac4061a5b | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
NirT | 1:e8fac4061a5b | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
NirT | 1:e8fac4061a5b | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
NirT | 1:e8fac4061a5b | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
NirT | 1:e8fac4061a5b | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
NirT | 1:e8fac4061a5b | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
NirT | 1:e8fac4061a5b | 34 | * |
NirT | 1:e8fac4061a5b | 35 | ****************************************************************************** |
NirT | 1:e8fac4061a5b | 36 | */ |
NirT | 1:e8fac4061a5b | 37 | |
NirT | 1:e8fac4061a5b | 38 | /* Includes ------------------------------------------------------------------*/ |
NirT | 1:e8fac4061a5b | 39 | #include "ov9655.h" |
NirT | 1:e8fac4061a5b | 40 | |
NirT | 1:e8fac4061a5b | 41 | /** @addtogroup BSP |
NirT | 1:e8fac4061a5b | 42 | * @{ |
NirT | 1:e8fac4061a5b | 43 | */ |
NirT | 1:e8fac4061a5b | 44 | |
NirT | 1:e8fac4061a5b | 45 | /** @addtogroup Components |
NirT | 1:e8fac4061a5b | 46 | * @{ |
NirT | 1:e8fac4061a5b | 47 | */ |
NirT | 1:e8fac4061a5b | 48 | |
NirT | 1:e8fac4061a5b | 49 | /** @addtogroup OV9655 |
NirT | 1:e8fac4061a5b | 50 | * @brief This file provides a set of functions needed to drive the |
NirT | 1:e8fac4061a5b | 51 | * OV9655 Camera module. |
NirT | 1:e8fac4061a5b | 52 | * @{ |
NirT | 1:e8fac4061a5b | 53 | */ |
NirT | 1:e8fac4061a5b | 54 | |
NirT | 1:e8fac4061a5b | 55 | /** @defgroup OV9655_Private_TypesDefinitions |
NirT | 1:e8fac4061a5b | 56 | * @{ |
NirT | 1:e8fac4061a5b | 57 | */ |
NirT | 1:e8fac4061a5b | 58 | |
NirT | 1:e8fac4061a5b | 59 | /** |
NirT | 1:e8fac4061a5b | 60 | * @} |
NirT | 1:e8fac4061a5b | 61 | */ |
NirT | 1:e8fac4061a5b | 62 | |
NirT | 1:e8fac4061a5b | 63 | /** @defgroup OV9655_Private_Defines |
NirT | 1:e8fac4061a5b | 64 | * @{ |
NirT | 1:e8fac4061a5b | 65 | */ |
NirT | 1:e8fac4061a5b | 66 | |
NirT | 1:e8fac4061a5b | 67 | /** |
NirT | 1:e8fac4061a5b | 68 | * @} |
NirT | 1:e8fac4061a5b | 69 | */ |
NirT | 1:e8fac4061a5b | 70 | |
NirT | 1:e8fac4061a5b | 71 | /** @defgroup OV9655_Private_Macros |
NirT | 1:e8fac4061a5b | 72 | * @{ |
NirT | 1:e8fac4061a5b | 73 | */ |
NirT | 1:e8fac4061a5b | 74 | |
NirT | 1:e8fac4061a5b | 75 | /** |
NirT | 1:e8fac4061a5b | 76 | * @} |
NirT | 1:e8fac4061a5b | 77 | */ |
NirT | 1:e8fac4061a5b | 78 | |
NirT | 1:e8fac4061a5b | 79 | /** @defgroup OV9655_Private_FunctionPrototypes |
NirT | 1:e8fac4061a5b | 80 | * @{ |
NirT | 1:e8fac4061a5b | 81 | */ |
NirT | 1:e8fac4061a5b | 82 | static uint64_t ov9655_ConvertValue(uint32_t feature, uint32_t value); |
NirT | 1:e8fac4061a5b | 83 | /** |
NirT | 1:e8fac4061a5b | 84 | * @} |
NirT | 1:e8fac4061a5b | 85 | */ |
NirT | 1:e8fac4061a5b | 86 | |
NirT | 1:e8fac4061a5b | 87 | /** @defgroup OV9655_Private_Variables |
NirT | 1:e8fac4061a5b | 88 | * @{ |
NirT | 1:e8fac4061a5b | 89 | */ |
NirT | 1:e8fac4061a5b | 90 | |
NirT | 1:e8fac4061a5b | 91 | CAMERA_DrvTypeDef ov9655_drv = |
NirT | 1:e8fac4061a5b | 92 | { |
NirT | 1:e8fac4061a5b | 93 | ov9655_Init, |
NirT | 1:e8fac4061a5b | 94 | ov9655_ReadID, |
NirT | 1:e8fac4061a5b | 95 | ov9655_Config, |
NirT | 1:e8fac4061a5b | 96 | }; |
NirT | 1:e8fac4061a5b | 97 | |
NirT | 1:e8fac4061a5b | 98 | /* Initialization sequence for VGA resolution (640x480)*/ |
NirT | 1:e8fac4061a5b | 99 | const unsigned char OV9655_VGA[][2]= |
NirT | 1:e8fac4061a5b | 100 | { |
NirT | 1:e8fac4061a5b | 101 | {0x00, 0x00}, |
NirT | 1:e8fac4061a5b | 102 | {0x01, 0x80}, |
NirT | 1:e8fac4061a5b | 103 | {0x02, 0x80}, |
NirT | 1:e8fac4061a5b | 104 | {0xb5, 0x00}, |
NirT | 1:e8fac4061a5b | 105 | {0x35, 0x00}, |
NirT | 1:e8fac4061a5b | 106 | {0xa8, 0xc1}, |
NirT | 1:e8fac4061a5b | 107 | {0x3a, 0xcc}, |
NirT | 1:e8fac4061a5b | 108 | {0x3d, 0x99}, |
NirT | 1:e8fac4061a5b | 109 | {0x77, 0x02}, |
NirT | 1:e8fac4061a5b | 110 | {0x13, 0xe7}, |
NirT | 1:e8fac4061a5b | 111 | {0x26, 0x72}, |
NirT | 1:e8fac4061a5b | 112 | {0x27, 0x08}, |
NirT | 1:e8fac4061a5b | 113 | {0x28, 0x08}, |
NirT | 1:e8fac4061a5b | 114 | {0x2c, 0x08}, |
NirT | 1:e8fac4061a5b | 115 | {0xab, 0x04}, |
NirT | 1:e8fac4061a5b | 116 | {0x6e, 0x00}, |
NirT | 1:e8fac4061a5b | 117 | {0x6d, 0x55}, |
NirT | 1:e8fac4061a5b | 118 | {0x00, 0x11}, |
NirT | 1:e8fac4061a5b | 119 | {0x10, 0x7b}, |
NirT | 1:e8fac4061a5b | 120 | {0xbb, 0xae}, |
NirT | 1:e8fac4061a5b | 121 | {0x11, 0x03}, |
NirT | 1:e8fac4061a5b | 122 | {0x72, 0x00}, |
NirT | 1:e8fac4061a5b | 123 | {0x3e, 0x0c}, |
NirT | 1:e8fac4061a5b | 124 | {0x74, 0x3a}, |
NirT | 1:e8fac4061a5b | 125 | {0x76, 0x01}, |
NirT | 1:e8fac4061a5b | 126 | {0x75, 0x35}, |
NirT | 1:e8fac4061a5b | 127 | {0x73, 0x00}, |
NirT | 1:e8fac4061a5b | 128 | {0xc7, 0x80}, |
NirT | 1:e8fac4061a5b | 129 | {0x62, 0x00}, |
NirT | 1:e8fac4061a5b | 130 | {0x63, 0x00}, |
NirT | 1:e8fac4061a5b | 131 | {0x64, 0x02}, |
NirT | 1:e8fac4061a5b | 132 | {0x65, 0x20}, |
NirT | 1:e8fac4061a5b | 133 | {0x66, 0x01}, |
NirT | 1:e8fac4061a5b | 134 | {0xc3, 0x4e}, |
NirT | 1:e8fac4061a5b | 135 | {0x33, 0x00}, |
NirT | 1:e8fac4061a5b | 136 | {0xa4, 0x50}, |
NirT | 1:e8fac4061a5b | 137 | {0xaa, 0x92}, |
NirT | 1:e8fac4061a5b | 138 | {0xc2, 0x01}, |
NirT | 1:e8fac4061a5b | 139 | {0xc1, 0xc8}, |
NirT | 1:e8fac4061a5b | 140 | {0x1e, 0x04}, |
NirT | 1:e8fac4061a5b | 141 | {0xa9, 0xef}, |
NirT | 1:e8fac4061a5b | 142 | {0x0e, 0x61}, |
NirT | 1:e8fac4061a5b | 143 | {0x39, 0x57}, |
NirT | 1:e8fac4061a5b | 144 | {0x0f, 0x48}, |
NirT | 1:e8fac4061a5b | 145 | {0x24, 0x3c}, |
NirT | 1:e8fac4061a5b | 146 | {0x25, 0x36}, |
NirT | 1:e8fac4061a5b | 147 | {0x12, 0x63}, |
NirT | 1:e8fac4061a5b | 148 | {0x03, 0x12}, |
NirT | 1:e8fac4061a5b | 149 | {0x32, 0xff}, |
NirT | 1:e8fac4061a5b | 150 | {0x17, 0x16}, |
NirT | 1:e8fac4061a5b | 151 | {0x18, 0x02}, |
NirT | 1:e8fac4061a5b | 152 | {0x19, 0x01}, |
NirT | 1:e8fac4061a5b | 153 | {0x1a, 0x3d}, |
NirT | 1:e8fac4061a5b | 154 | {0x36, 0xfa}, |
NirT | 1:e8fac4061a5b | 155 | {0x69, 0x0a}, |
NirT | 1:e8fac4061a5b | 156 | {0x8c, 0x8d}, |
NirT | 1:e8fac4061a5b | 157 | {0xc0, 0xaa}, |
NirT | 1:e8fac4061a5b | 158 | {0x40, 0xd0}, |
NirT | 1:e8fac4061a5b | 159 | {0x43, 0x14}, |
NirT | 1:e8fac4061a5b | 160 | {0x44, 0xf0}, |
NirT | 1:e8fac4061a5b | 161 | {0x45, 0x46}, |
NirT | 1:e8fac4061a5b | 162 | {0x46, 0x62}, |
NirT | 1:e8fac4061a5b | 163 | {0x47, 0x2a}, |
NirT | 1:e8fac4061a5b | 164 | {0x48, 0x3c}, |
NirT | 1:e8fac4061a5b | 165 | {0x59, 0x85}, |
NirT | 1:e8fac4061a5b | 166 | {0x5a, 0xa9}, |
NirT | 1:e8fac4061a5b | 167 | {0x5b, 0x64}, |
NirT | 1:e8fac4061a5b | 168 | {0x5c, 0x84}, |
NirT | 1:e8fac4061a5b | 169 | {0x5d, 0x53}, |
NirT | 1:e8fac4061a5b | 170 | {0x5e, 0x0e}, |
NirT | 1:e8fac4061a5b | 171 | {0x6c, 0x0c}, |
NirT | 1:e8fac4061a5b | 172 | {0xc6, 0x85}, |
NirT | 1:e8fac4061a5b | 173 | {0xcb, 0xf0}, |
NirT | 1:e8fac4061a5b | 174 | {0xcc, 0xd8}, |
NirT | 1:e8fac4061a5b | 175 | {0x71, 0x78}, |
NirT | 1:e8fac4061a5b | 176 | {0xa5, 0x68}, |
NirT | 1:e8fac4061a5b | 177 | {0x6f, 0x9e}, |
NirT | 1:e8fac4061a5b | 178 | {0x42, 0xc0}, |
NirT | 1:e8fac4061a5b | 179 | {0x3f, 0x82}, |
NirT | 1:e8fac4061a5b | 180 | {0x8a, 0x23}, |
NirT | 1:e8fac4061a5b | 181 | {0x14, 0x3a}, |
NirT | 1:e8fac4061a5b | 182 | {0x3b, 0xcc}, |
NirT | 1:e8fac4061a5b | 183 | {0x34, 0x3d}, |
NirT | 1:e8fac4061a5b | 184 | {0x41, 0x40}, |
NirT | 1:e8fac4061a5b | 185 | {0xc9, 0xe0}, |
NirT | 1:e8fac4061a5b | 186 | {0xca, 0xe8}, |
NirT | 1:e8fac4061a5b | 187 | {0xcd, 0x93}, |
NirT | 1:e8fac4061a5b | 188 | {0x7a, 0x20}, |
NirT | 1:e8fac4061a5b | 189 | {0x7b, 0x1c}, |
NirT | 1:e8fac4061a5b | 190 | {0x7c, 0x28}, |
NirT | 1:e8fac4061a5b | 191 | {0x7d, 0x3c}, |
NirT | 1:e8fac4061a5b | 192 | {0x7e, 0x5a}, |
NirT | 1:e8fac4061a5b | 193 | {0x7f, 0x68}, |
NirT | 1:e8fac4061a5b | 194 | {0x80, 0x76}, |
NirT | 1:e8fac4061a5b | 195 | {0x81, 0x80}, |
NirT | 1:e8fac4061a5b | 196 | {0x82, 0x88}, |
NirT | 1:e8fac4061a5b | 197 | {0x83, 0x8f}, |
NirT | 1:e8fac4061a5b | 198 | {0x84, 0x96}, |
NirT | 1:e8fac4061a5b | 199 | {0x85, 0xa3}, |
NirT | 1:e8fac4061a5b | 200 | {0x86, 0xaf}, |
NirT | 1:e8fac4061a5b | 201 | {0x87, 0xc4}, |
NirT | 1:e8fac4061a5b | 202 | {0x88, 0xd7}, |
NirT | 1:e8fac4061a5b | 203 | {0x89, 0xe8}, |
NirT | 1:e8fac4061a5b | 204 | {0x4f, 0x98}, |
NirT | 1:e8fac4061a5b | 205 | {0x50, 0x98}, |
NirT | 1:e8fac4061a5b | 206 | {0x51, 0x00}, |
NirT | 1:e8fac4061a5b | 207 | {0x52, 0x28}, |
NirT | 1:e8fac4061a5b | 208 | {0x53, 0x70}, |
NirT | 1:e8fac4061a5b | 209 | {0x54, 0x98}, |
NirT | 1:e8fac4061a5b | 210 | {0x58, 0x1a}, |
NirT | 1:e8fac4061a5b | 211 | {0x6b, 0x5a}, |
NirT | 1:e8fac4061a5b | 212 | {0x90, 0x92}, |
NirT | 1:e8fac4061a5b | 213 | {0x91, 0x92}, |
NirT | 1:e8fac4061a5b | 214 | {0x9f, 0x90}, |
NirT | 1:e8fac4061a5b | 215 | {0xa0, 0x90}, |
NirT | 1:e8fac4061a5b | 216 | {0x16, 0x24}, |
NirT | 1:e8fac4061a5b | 217 | {0x2a, 0x00}, |
NirT | 1:e8fac4061a5b | 218 | {0x2b, 0x00}, |
NirT | 1:e8fac4061a5b | 219 | {0xac, 0x80}, |
NirT | 1:e8fac4061a5b | 220 | {0xad, 0x80}, |
NirT | 1:e8fac4061a5b | 221 | {0xae, 0x80}, |
NirT | 1:e8fac4061a5b | 222 | {0xaf, 0x80}, |
NirT | 1:e8fac4061a5b | 223 | {0xb2, 0xf2}, |
NirT | 1:e8fac4061a5b | 224 | {0xb3, 0x20}, |
NirT | 1:e8fac4061a5b | 225 | {0xb4, 0x20}, |
NirT | 1:e8fac4061a5b | 226 | {0xb6, 0xaf}, |
NirT | 1:e8fac4061a5b | 227 | {0x29, 0x15}, |
NirT | 1:e8fac4061a5b | 228 | {0x9d, 0x02}, |
NirT | 1:e8fac4061a5b | 229 | {0x9e, 0x02}, |
NirT | 1:e8fac4061a5b | 230 | {0x9e, 0x02}, |
NirT | 1:e8fac4061a5b | 231 | {0x04, 0x03}, |
NirT | 1:e8fac4061a5b | 232 | {0x05, 0x2e}, |
NirT | 1:e8fac4061a5b | 233 | {0x06, 0x2e}, |
NirT | 1:e8fac4061a5b | 234 | {0x07, 0x2e}, |
NirT | 1:e8fac4061a5b | 235 | {0x08, 0x2e}, |
NirT | 1:e8fac4061a5b | 236 | {0x2f, 0x2e}, |
NirT | 1:e8fac4061a5b | 237 | {0x4a, 0xe9}, |
NirT | 1:e8fac4061a5b | 238 | {0x4b, 0xdd}, |
NirT | 1:e8fac4061a5b | 239 | {0x4c, 0xdd}, |
NirT | 1:e8fac4061a5b | 240 | {0x4d, 0xdd}, |
NirT | 1:e8fac4061a5b | 241 | {0x4e, 0xdd}, |
NirT | 1:e8fac4061a5b | 242 | {0x70, 0x06}, |
NirT | 1:e8fac4061a5b | 243 | {0xa6, 0x40}, |
NirT | 1:e8fac4061a5b | 244 | {0xbc, 0x02}, |
NirT | 1:e8fac4061a5b | 245 | {0xbd, 0x01}, |
NirT | 1:e8fac4061a5b | 246 | {0xbe, 0x02}, |
NirT | 1:e8fac4061a5b | 247 | {0xbf, 0x01}, |
NirT | 1:e8fac4061a5b | 248 | }; |
NirT | 1:e8fac4061a5b | 249 | |
NirT | 1:e8fac4061a5b | 250 | /* Initialization sequence for QVGA resolution (320x240) */ |
NirT | 1:e8fac4061a5b | 251 | const unsigned char OV9655_QVGA[][2]= |
NirT | 1:e8fac4061a5b | 252 | { |
NirT | 1:e8fac4061a5b | 253 | {0x00, 0x00}, |
NirT | 1:e8fac4061a5b | 254 | {0x01, 0x80}, |
NirT | 1:e8fac4061a5b | 255 | {0x02, 0x80}, |
NirT | 1:e8fac4061a5b | 256 | {0x03, 0x02}, |
NirT | 1:e8fac4061a5b | 257 | {0x04, 0x03}, |
NirT | 1:e8fac4061a5b | 258 | {0x09, 0x01}, |
NirT | 1:e8fac4061a5b | 259 | {0x0b, 0x57}, |
NirT | 1:e8fac4061a5b | 260 | {0x0e, 0x61}, |
NirT | 1:e8fac4061a5b | 261 | {0x0f, 0x40}, |
NirT | 1:e8fac4061a5b | 262 | {0x11, 0x01}, |
NirT | 1:e8fac4061a5b | 263 | {0x12, 0x62}, |
NirT | 1:e8fac4061a5b | 264 | {0x13, 0xc7}, |
NirT | 1:e8fac4061a5b | 265 | {0x14, 0x3a}, |
NirT | 1:e8fac4061a5b | 266 | {0x16, 0x24}, |
NirT | 1:e8fac4061a5b | 267 | {0x17, 0x18}, |
NirT | 1:e8fac4061a5b | 268 | {0x18, 0x04}, |
NirT | 1:e8fac4061a5b | 269 | {0x19, 0x01}, |
NirT | 1:e8fac4061a5b | 270 | {0x1a, 0x81}, |
NirT | 1:e8fac4061a5b | 271 | {0x1e, 0x00}, |
NirT | 1:e8fac4061a5b | 272 | {0x24, 0x3c}, |
NirT | 1:e8fac4061a5b | 273 | {0x25, 0x36}, |
NirT | 1:e8fac4061a5b | 274 | {0x26, 0x72}, |
NirT | 1:e8fac4061a5b | 275 | {0x27, 0x08}, |
NirT | 1:e8fac4061a5b | 276 | {0x28, 0x08}, |
NirT | 1:e8fac4061a5b | 277 | {0x29, 0x15}, |
NirT | 1:e8fac4061a5b | 278 | {0x2a, 0x00}, |
NirT | 1:e8fac4061a5b | 279 | {0x2b, 0x00}, |
NirT | 1:e8fac4061a5b | 280 | {0x2c, 0x08}, |
NirT | 1:e8fac4061a5b | 281 | {0x32, 0x12}, |
NirT | 1:e8fac4061a5b | 282 | {0x33, 0x00}, |
NirT | 1:e8fac4061a5b | 283 | {0x34, 0x3f}, |
NirT | 1:e8fac4061a5b | 284 | {0x35, 0x00}, |
NirT | 1:e8fac4061a5b | 285 | {0x36, 0x3a}, |
NirT | 1:e8fac4061a5b | 286 | {0x38, 0x72}, |
NirT | 1:e8fac4061a5b | 287 | {0x39, 0x57}, |
NirT | 1:e8fac4061a5b | 288 | {0x3a, 0xcc}, |
NirT | 1:e8fac4061a5b | 289 | {0x3b, 0x04}, |
NirT | 1:e8fac4061a5b | 290 | {0x3d, 0x99}, |
NirT | 1:e8fac4061a5b | 291 | {0x3e, 0x02}, |
NirT | 1:e8fac4061a5b | 292 | {0x3f, 0xc1}, |
NirT | 1:e8fac4061a5b | 293 | {0x40, 0xc0}, |
NirT | 1:e8fac4061a5b | 294 | {0x41, 0x41}, |
NirT | 1:e8fac4061a5b | 295 | {0x42, 0xc0}, |
NirT | 1:e8fac4061a5b | 296 | {0x43, 0x0a}, |
NirT | 1:e8fac4061a5b | 297 | {0x44, 0xf0}, |
NirT | 1:e8fac4061a5b | 298 | {0x45, 0x46}, |
NirT | 1:e8fac4061a5b | 299 | {0x46, 0x62}, |
NirT | 1:e8fac4061a5b | 300 | {0x47, 0x2a}, |
NirT | 1:e8fac4061a5b | 301 | {0x48, 0x3c}, |
NirT | 1:e8fac4061a5b | 302 | {0x4a, 0xfc}, |
NirT | 1:e8fac4061a5b | 303 | {0x4b, 0xfc}, |
NirT | 1:e8fac4061a5b | 304 | {0x4c, 0x7f}, |
NirT | 1:e8fac4061a5b | 305 | {0x4d, 0x7f}, |
NirT | 1:e8fac4061a5b | 306 | {0x4e, 0x7f}, |
NirT | 1:e8fac4061a5b | 307 | {0x4f, 0x98}, |
NirT | 1:e8fac4061a5b | 308 | {0x50, 0x98}, |
NirT | 1:e8fac4061a5b | 309 | {0x51, 0x00}, |
NirT | 1:e8fac4061a5b | 310 | {0x52, 0x28}, |
NirT | 1:e8fac4061a5b | 311 | {0x53, 0x70}, |
NirT | 1:e8fac4061a5b | 312 | {0x54, 0x98}, |
NirT | 1:e8fac4061a5b | 313 | {0x58, 0x1a}, |
NirT | 1:e8fac4061a5b | 314 | {0x59, 0x85}, |
NirT | 1:e8fac4061a5b | 315 | {0x5a, 0xa9}, |
NirT | 1:e8fac4061a5b | 316 | {0x5b, 0x64}, |
NirT | 1:e8fac4061a5b | 317 | {0x5c, 0x84}, |
NirT | 1:e8fac4061a5b | 318 | {0x5d, 0x53}, |
NirT | 1:e8fac4061a5b | 319 | {0x5e, 0x0e}, |
NirT | 1:e8fac4061a5b | 320 | {0x5f, 0xf0}, |
NirT | 1:e8fac4061a5b | 321 | {0x60, 0xf0}, |
NirT | 1:e8fac4061a5b | 322 | {0x61, 0xf0}, |
NirT | 1:e8fac4061a5b | 323 | {0x62, 0x00}, |
NirT | 1:e8fac4061a5b | 324 | {0x63, 0x00}, |
NirT | 1:e8fac4061a5b | 325 | {0x64, 0x02}, |
NirT | 1:e8fac4061a5b | 326 | {0x65, 0x20}, |
NirT | 1:e8fac4061a5b | 327 | {0x66, 0x00}, |
NirT | 1:e8fac4061a5b | 328 | {0x69, 0x0a}, |
NirT | 1:e8fac4061a5b | 329 | {0x6b, 0x5a}, |
NirT | 1:e8fac4061a5b | 330 | {0x6c, 0x04}, |
NirT | 1:e8fac4061a5b | 331 | {0x6d, 0x55}, |
NirT | 1:e8fac4061a5b | 332 | {0x6e, 0x00}, |
NirT | 1:e8fac4061a5b | 333 | {0x6f, 0x9d}, |
NirT | 1:e8fac4061a5b | 334 | {0x70, 0x21}, |
NirT | 1:e8fac4061a5b | 335 | {0x71, 0x78}, |
NirT | 1:e8fac4061a5b | 336 | {0x72, 0x11}, |
NirT | 1:e8fac4061a5b | 337 | {0x73, 0x01}, |
NirT | 1:e8fac4061a5b | 338 | {0x74, 0x10}, |
NirT | 1:e8fac4061a5b | 339 | {0x75, 0x10}, |
NirT | 1:e8fac4061a5b | 340 | {0x76, 0x01}, |
NirT | 1:e8fac4061a5b | 341 | {0x77, 0x02}, |
NirT | 1:e8fac4061a5b | 342 | {0x7A, 0x12}, |
NirT | 1:e8fac4061a5b | 343 | {0x7B, 0x08}, |
NirT | 1:e8fac4061a5b | 344 | {0x7C, 0x16}, |
NirT | 1:e8fac4061a5b | 345 | {0x7D, 0x30}, |
NirT | 1:e8fac4061a5b | 346 | {0x7E, 0x5e}, |
NirT | 1:e8fac4061a5b | 347 | {0x7F, 0x72}, |
NirT | 1:e8fac4061a5b | 348 | {0x80, 0x82}, |
NirT | 1:e8fac4061a5b | 349 | {0x81, 0x8e}, |
NirT | 1:e8fac4061a5b | 350 | {0x82, 0x9a}, |
NirT | 1:e8fac4061a5b | 351 | {0x83, 0xa4}, |
NirT | 1:e8fac4061a5b | 352 | {0x84, 0xac}, |
NirT | 1:e8fac4061a5b | 353 | {0x85, 0xb8}, |
NirT | 1:e8fac4061a5b | 354 | {0x86, 0xc3}, |
NirT | 1:e8fac4061a5b | 355 | {0x87, 0xd6}, |
NirT | 1:e8fac4061a5b | 356 | {0x88, 0xe6}, |
NirT | 1:e8fac4061a5b | 357 | {0x89, 0xf2}, |
NirT | 1:e8fac4061a5b | 358 | {0x8a, 0x24}, |
NirT | 1:e8fac4061a5b | 359 | {0x8c, 0x80}, |
NirT | 1:e8fac4061a5b | 360 | {0x90, 0x7d}, |
NirT | 1:e8fac4061a5b | 361 | {0x91, 0x7b}, |
NirT | 1:e8fac4061a5b | 362 | {0x9d, 0x02}, |
NirT | 1:e8fac4061a5b | 363 | {0x9e, 0x02}, |
NirT | 1:e8fac4061a5b | 364 | {0x9f, 0x7a}, |
NirT | 1:e8fac4061a5b | 365 | {0xa0, 0x79}, |
NirT | 1:e8fac4061a5b | 366 | {0xa1, 0x40}, |
NirT | 1:e8fac4061a5b | 367 | {0xa4, 0x50}, |
NirT | 1:e8fac4061a5b | 368 | {0xa5, 0x68}, |
NirT | 1:e8fac4061a5b | 369 | {0xa6, 0x4a}, |
NirT | 1:e8fac4061a5b | 370 | {0xa8, 0xc1}, |
NirT | 1:e8fac4061a5b | 371 | {0xa9, 0xef}, |
NirT | 1:e8fac4061a5b | 372 | {0xaa, 0x92}, |
NirT | 1:e8fac4061a5b | 373 | {0xab, 0x04}, |
NirT | 1:e8fac4061a5b | 374 | {0xac, 0x80}, |
NirT | 1:e8fac4061a5b | 375 | {0xad, 0x80}, |
NirT | 1:e8fac4061a5b | 376 | {0xae, 0x80}, |
NirT | 1:e8fac4061a5b | 377 | {0xaf, 0x80}, |
NirT | 1:e8fac4061a5b | 378 | {0xb2, 0xf2}, |
NirT | 1:e8fac4061a5b | 379 | {0xb3, 0x20}, |
NirT | 1:e8fac4061a5b | 380 | {0xb4, 0x20}, |
NirT | 1:e8fac4061a5b | 381 | {0xb5, 0x00}, |
NirT | 1:e8fac4061a5b | 382 | {0xb6, 0xaf}, |
NirT | 1:e8fac4061a5b | 383 | {0xb6, 0xaf}, |
NirT | 1:e8fac4061a5b | 384 | {0xbb, 0xae}, |
NirT | 1:e8fac4061a5b | 385 | {0xbc, 0x7f}, |
NirT | 1:e8fac4061a5b | 386 | {0xbd, 0x7f}, |
NirT | 1:e8fac4061a5b | 387 | {0xbe, 0x7f}, |
NirT | 1:e8fac4061a5b | 388 | {0xbf, 0x7f}, |
NirT | 1:e8fac4061a5b | 389 | {0xbf, 0x7f}, |
NirT | 1:e8fac4061a5b | 390 | {0xc0, 0xaa}, |
NirT | 1:e8fac4061a5b | 391 | {0xc1, 0xc0}, |
NirT | 1:e8fac4061a5b | 392 | {0xc2, 0x01}, |
NirT | 1:e8fac4061a5b | 393 | {0xc3, 0x4e}, |
NirT | 1:e8fac4061a5b | 394 | {0xc6, 0x05}, |
NirT | 1:e8fac4061a5b | 395 | {0xc7, 0x81}, |
NirT | 1:e8fac4061a5b | 396 | {0xc9, 0xe0}, |
NirT | 1:e8fac4061a5b | 397 | {0xca, 0xe8}, |
NirT | 1:e8fac4061a5b | 398 | {0xcb, 0xf0}, |
NirT | 1:e8fac4061a5b | 399 | {0xcc, 0xd8}, |
NirT | 1:e8fac4061a5b | 400 | {0xcd, 0x93}, |
NirT | 1:e8fac4061a5b | 401 | {0x12, 0x63}, |
NirT | 1:e8fac4061a5b | 402 | {0x40, 0x10}, |
NirT | 1:e8fac4061a5b | 403 | }; |
NirT | 1:e8fac4061a5b | 404 | |
NirT | 1:e8fac4061a5b | 405 | /* Initialization sequence for QQVGA resolution (160x120) */ |
NirT | 1:e8fac4061a5b | 406 | const char OV9655_QQVGA[][2]= |
NirT | 1:e8fac4061a5b | 407 | { |
NirT | 1:e8fac4061a5b | 408 | {0x00, 0x00}, |
NirT | 1:e8fac4061a5b | 409 | {0x01, 0x80}, |
NirT | 1:e8fac4061a5b | 410 | {0x02, 0x80}, |
NirT | 1:e8fac4061a5b | 411 | {0x03, 0x02}, |
NirT | 1:e8fac4061a5b | 412 | {0x04, 0x03}, |
NirT | 1:e8fac4061a5b | 413 | {0x09, 0x01}, |
NirT | 1:e8fac4061a5b | 414 | {0x0b, 0x57}, |
NirT | 1:e8fac4061a5b | 415 | {0x0e, 0x61}, |
NirT | 1:e8fac4061a5b | 416 | {0x0f, 0x40}, |
NirT | 1:e8fac4061a5b | 417 | {0x11, 0x01}, |
NirT | 1:e8fac4061a5b | 418 | {0x12, 0x62}, |
NirT | 1:e8fac4061a5b | 419 | {0x13, 0xc7}, |
NirT | 1:e8fac4061a5b | 420 | {0x14, 0x3a}, |
NirT | 1:e8fac4061a5b | 421 | {0x16, 0x24}, |
NirT | 1:e8fac4061a5b | 422 | {0x17, 0x18}, |
NirT | 1:e8fac4061a5b | 423 | {0x18, 0x04}, |
NirT | 1:e8fac4061a5b | 424 | {0x19, 0x01}, |
NirT | 1:e8fac4061a5b | 425 | {0x1a, 0x81}, |
NirT | 1:e8fac4061a5b | 426 | {0x1e, 0x00}, |
NirT | 1:e8fac4061a5b | 427 | {0x24, 0x3c}, |
NirT | 1:e8fac4061a5b | 428 | {0x25, 0x36}, |
NirT | 1:e8fac4061a5b | 429 | {0x26, 0x72}, |
NirT | 1:e8fac4061a5b | 430 | {0x27, 0x08}, |
NirT | 1:e8fac4061a5b | 431 | {0x28, 0x08}, |
NirT | 1:e8fac4061a5b | 432 | {0x29, 0x15}, |
NirT | 1:e8fac4061a5b | 433 | {0x2a, 0x00}, |
NirT | 1:e8fac4061a5b | 434 | {0x2b, 0x00}, |
NirT | 1:e8fac4061a5b | 435 | {0x2c, 0x08}, |
NirT | 1:e8fac4061a5b | 436 | {0x32, 0xa4}, |
NirT | 1:e8fac4061a5b | 437 | {0x33, 0x00}, |
NirT | 1:e8fac4061a5b | 438 | {0x34, 0x3f}, |
NirT | 1:e8fac4061a5b | 439 | {0x35, 0x00}, |
NirT | 1:e8fac4061a5b | 440 | {0x36, 0x3a}, |
NirT | 1:e8fac4061a5b | 441 | {0x38, 0x72}, |
NirT | 1:e8fac4061a5b | 442 | {0x39, 0x57}, |
NirT | 1:e8fac4061a5b | 443 | {0x3a, 0xcc}, |
NirT | 1:e8fac4061a5b | 444 | {0x3b, 0x04}, |
NirT | 1:e8fac4061a5b | 445 | {0x3d, 0x99}, |
NirT | 1:e8fac4061a5b | 446 | {0x3e, 0x0e}, |
NirT | 1:e8fac4061a5b | 447 | {0x3f, 0xc1}, |
NirT | 1:e8fac4061a5b | 448 | {0x40, 0xc0}, |
NirT | 1:e8fac4061a5b | 449 | {0x41, 0x41}, |
NirT | 1:e8fac4061a5b | 450 | {0x42, 0xc0}, |
NirT | 1:e8fac4061a5b | 451 | {0x43, 0x0a}, |
NirT | 1:e8fac4061a5b | 452 | {0x44, 0xf0}, |
NirT | 1:e8fac4061a5b | 453 | {0x45, 0x46}, |
NirT | 1:e8fac4061a5b | 454 | {0x46, 0x62}, |
NirT | 1:e8fac4061a5b | 455 | {0x47, 0x2a}, |
NirT | 1:e8fac4061a5b | 456 | {0x48, 0x3c}, |
NirT | 1:e8fac4061a5b | 457 | {0x4a, 0xfc}, |
NirT | 1:e8fac4061a5b | 458 | {0x4b, 0xfc}, |
NirT | 1:e8fac4061a5b | 459 | {0x4c, 0x7f}, |
NirT | 1:e8fac4061a5b | 460 | {0x4d, 0x7f}, |
NirT | 1:e8fac4061a5b | 461 | {0x4e, 0x7f}, |
NirT | 1:e8fac4061a5b | 462 | {0x4f, 0x98}, |
NirT | 1:e8fac4061a5b | 463 | {0x50, 0x98}, |
NirT | 1:e8fac4061a5b | 464 | {0x51, 0x00}, |
NirT | 1:e8fac4061a5b | 465 | {0x52, 0x28}, |
NirT | 1:e8fac4061a5b | 466 | {0x53, 0x70}, |
NirT | 1:e8fac4061a5b | 467 | {0x54, 0x98}, |
NirT | 1:e8fac4061a5b | 468 | {0x58, 0x1a}, |
NirT | 1:e8fac4061a5b | 469 | {0x59, 0x85}, |
NirT | 1:e8fac4061a5b | 470 | {0x5a, 0xa9}, |
NirT | 1:e8fac4061a5b | 471 | {0x5b, 0x64}, |
NirT | 1:e8fac4061a5b | 472 | {0x5c, 0x84}, |
NirT | 1:e8fac4061a5b | 473 | {0x5d, 0x53}, |
NirT | 1:e8fac4061a5b | 474 | {0x5e, 0x0e}, |
NirT | 1:e8fac4061a5b | 475 | {0x5f, 0xf0}, |
NirT | 1:e8fac4061a5b | 476 | {0x60, 0xf0}, |
NirT | 1:e8fac4061a5b | 477 | {0x61, 0xf0}, |
NirT | 1:e8fac4061a5b | 478 | {0x62, 0x00}, |
NirT | 1:e8fac4061a5b | 479 | {0x63, 0x00}, |
NirT | 1:e8fac4061a5b | 480 | {0x64, 0x02}, |
NirT | 1:e8fac4061a5b | 481 | {0x65, 0x20}, |
NirT | 1:e8fac4061a5b | 482 | {0x66, 0x00}, |
NirT | 1:e8fac4061a5b | 483 | {0x69, 0x0a}, |
NirT | 1:e8fac4061a5b | 484 | {0x6b, 0x5a}, |
NirT | 1:e8fac4061a5b | 485 | {0x6c, 0x04}, |
NirT | 1:e8fac4061a5b | 486 | {0x6d, 0x55}, |
NirT | 1:e8fac4061a5b | 487 | {0x6e, 0x00}, |
NirT | 1:e8fac4061a5b | 488 | {0x6f, 0x9d}, |
NirT | 1:e8fac4061a5b | 489 | {0x70, 0x21}, |
NirT | 1:e8fac4061a5b | 490 | {0x71, 0x78}, |
NirT | 1:e8fac4061a5b | 491 | {0x72, 0x22}, |
NirT | 1:e8fac4061a5b | 492 | {0x73, 0x02}, |
NirT | 1:e8fac4061a5b | 493 | {0x74, 0x10}, |
NirT | 1:e8fac4061a5b | 494 | {0x75, 0x10}, |
NirT | 1:e8fac4061a5b | 495 | {0x76, 0x01}, |
NirT | 1:e8fac4061a5b | 496 | {0x77, 0x02}, |
NirT | 1:e8fac4061a5b | 497 | {0x7A, 0x12}, |
NirT | 1:e8fac4061a5b | 498 | {0x7B, 0x08}, |
NirT | 1:e8fac4061a5b | 499 | {0x7C, 0x16}, |
NirT | 1:e8fac4061a5b | 500 | {0x7D, 0x30}, |
NirT | 1:e8fac4061a5b | 501 | {0x7E, 0x5e}, |
NirT | 1:e8fac4061a5b | 502 | {0x7F, 0x72}, |
NirT | 1:e8fac4061a5b | 503 | {0x80, 0x82}, |
NirT | 1:e8fac4061a5b | 504 | {0x81, 0x8e}, |
NirT | 1:e8fac4061a5b | 505 | {0x82, 0x9a}, |
NirT | 1:e8fac4061a5b | 506 | {0x83, 0xa4}, |
NirT | 1:e8fac4061a5b | 507 | {0x84, 0xac}, |
NirT | 1:e8fac4061a5b | 508 | {0x85, 0xb8}, |
NirT | 1:e8fac4061a5b | 509 | {0x86, 0xc3}, |
NirT | 1:e8fac4061a5b | 510 | {0x87, 0xd6}, |
NirT | 1:e8fac4061a5b | 511 | {0x88, 0xe6}, |
NirT | 1:e8fac4061a5b | 512 | {0x89, 0xf2}, |
NirT | 1:e8fac4061a5b | 513 | {0x8a, 0x24}, |
NirT | 1:e8fac4061a5b | 514 | {0x8c, 0x80}, |
NirT | 1:e8fac4061a5b | 515 | {0x90, 0x7d}, |
NirT | 1:e8fac4061a5b | 516 | {0x91, 0x7b}, |
NirT | 1:e8fac4061a5b | 517 | {0x9d, 0x02}, |
NirT | 1:e8fac4061a5b | 518 | {0x9e, 0x02}, |
NirT | 1:e8fac4061a5b | 519 | {0x9f, 0x7a}, |
NirT | 1:e8fac4061a5b | 520 | {0xa0, 0x79}, |
NirT | 1:e8fac4061a5b | 521 | {0xa1, 0x40}, |
NirT | 1:e8fac4061a5b | 522 | {0xa4, 0x50}, |
NirT | 1:e8fac4061a5b | 523 | {0xa5, 0x68}, |
NirT | 1:e8fac4061a5b | 524 | {0xa6, 0x4a}, |
NirT | 1:e8fac4061a5b | 525 | {0xa8, 0xc1}, |
NirT | 1:e8fac4061a5b | 526 | {0xa9, 0xef}, |
NirT | 1:e8fac4061a5b | 527 | {0xaa, 0x92}, |
NirT | 1:e8fac4061a5b | 528 | {0xab, 0x04}, |
NirT | 1:e8fac4061a5b | 529 | {0xac, 0x80}, |
NirT | 1:e8fac4061a5b | 530 | {0xad, 0x80}, |
NirT | 1:e8fac4061a5b | 531 | {0xae, 0x80}, |
NirT | 1:e8fac4061a5b | 532 | {0xaf, 0x80}, |
NirT | 1:e8fac4061a5b | 533 | {0xb2, 0xf2}, |
NirT | 1:e8fac4061a5b | 534 | {0xb3, 0x20}, |
NirT | 1:e8fac4061a5b | 535 | {0xb4, 0x20}, |
NirT | 1:e8fac4061a5b | 536 | {0xb5, 0x00}, |
NirT | 1:e8fac4061a5b | 537 | {0xb6, 0xaf}, |
NirT | 1:e8fac4061a5b | 538 | {0xb6, 0xaf}, |
NirT | 1:e8fac4061a5b | 539 | {0xbb, 0xae}, |
NirT | 1:e8fac4061a5b | 540 | {0xbc, 0x7f}, |
NirT | 1:e8fac4061a5b | 541 | {0xbd, 0x7f}, |
NirT | 1:e8fac4061a5b | 542 | {0xbe, 0x7f}, |
NirT | 1:e8fac4061a5b | 543 | {0xbf, 0x7f}, |
NirT | 1:e8fac4061a5b | 544 | {0xbf, 0x7f}, |
NirT | 1:e8fac4061a5b | 545 | {0xc0, 0xaa}, |
NirT | 1:e8fac4061a5b | 546 | {0xc1, 0xc0}, |
NirT | 1:e8fac4061a5b | 547 | {0xc2, 0x01}, |
NirT | 1:e8fac4061a5b | 548 | {0xc3, 0x4e}, |
NirT | 1:e8fac4061a5b | 549 | {0xc6, 0x05}, |
NirT | 1:e8fac4061a5b | 550 | {0xc7, 0x82}, |
NirT | 1:e8fac4061a5b | 551 | {0xc9, 0xe0}, |
NirT | 1:e8fac4061a5b | 552 | {0xca, 0xe8}, |
NirT | 1:e8fac4061a5b | 553 | {0xcb, 0xf0}, |
NirT | 1:e8fac4061a5b | 554 | {0xcc, 0xd8}, |
NirT | 1:e8fac4061a5b | 555 | {0xcd, 0x93}, |
NirT | 1:e8fac4061a5b | 556 | {0x12, 0x63}, |
NirT | 1:e8fac4061a5b | 557 | {0x40, 0x10}, |
NirT | 1:e8fac4061a5b | 558 | }; |
NirT | 1:e8fac4061a5b | 559 | |
NirT | 1:e8fac4061a5b | 560 | /** |
NirT | 1:e8fac4061a5b | 561 | * @} |
NirT | 1:e8fac4061a5b | 562 | */ |
NirT | 1:e8fac4061a5b | 563 | |
NirT | 1:e8fac4061a5b | 564 | /** @defgroup OV9655_Private_Functions |
NirT | 1:e8fac4061a5b | 565 | * @{ |
NirT | 1:e8fac4061a5b | 566 | */ |
NirT | 1:e8fac4061a5b | 567 | |
NirT | 1:e8fac4061a5b | 568 | /** |
NirT | 1:e8fac4061a5b | 569 | * @brief Initializes the OV9655 CAMERA component. |
NirT | 1:e8fac4061a5b | 570 | * @param DeviceAddr: Device address on communication Bus. |
NirT | 1:e8fac4061a5b | 571 | * @param resolution: Camera resolution |
NirT | 1:e8fac4061a5b | 572 | * @retval None |
NirT | 1:e8fac4061a5b | 573 | */ |
NirT | 1:e8fac4061a5b | 574 | void ov9655_Init(uint16_t DeviceAddr, uint32_t resolution) |
NirT | 1:e8fac4061a5b | 575 | { |
NirT | 1:e8fac4061a5b | 576 | uint32_t index; |
NirT | 1:e8fac4061a5b | 577 | |
NirT | 1:e8fac4061a5b | 578 | /* Initialize I2C */ |
NirT | 1:e8fac4061a5b | 579 | CAMERA_IO_Init(); |
NirT | 1:e8fac4061a5b | 580 | |
NirT | 1:e8fac4061a5b | 581 | /* Prepare the camera to be configured by resetting all its registers */ |
NirT | 1:e8fac4061a5b | 582 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_COM7, 0x80); |
NirT | 1:e8fac4061a5b | 583 | CAMERA_Delay(200); |
NirT | 1:e8fac4061a5b | 584 | |
NirT | 1:e8fac4061a5b | 585 | /* Initialize OV9655 */ |
NirT | 1:e8fac4061a5b | 586 | switch (resolution) |
NirT | 1:e8fac4061a5b | 587 | { |
NirT | 1:e8fac4061a5b | 588 | case CAMERA_R160x120: |
NirT | 1:e8fac4061a5b | 589 | { |
NirT | 1:e8fac4061a5b | 590 | for(index=0; index<(sizeof(OV9655_QQVGA)/2); index++) |
NirT | 1:e8fac4061a5b | 591 | { |
NirT | 1:e8fac4061a5b | 592 | CAMERA_IO_Write(DeviceAddr, OV9655_QQVGA[index][0], OV9655_QQVGA[index][1]); |
NirT | 1:e8fac4061a5b | 593 | CAMERA_Delay(2); |
NirT | 1:e8fac4061a5b | 594 | } |
NirT | 1:e8fac4061a5b | 595 | break; |
NirT | 1:e8fac4061a5b | 596 | } |
NirT | 1:e8fac4061a5b | 597 | case CAMERA_R320x240: |
NirT | 1:e8fac4061a5b | 598 | { |
NirT | 1:e8fac4061a5b | 599 | for(index=0; index<(sizeof(OV9655_QVGA)/2); index++) |
NirT | 1:e8fac4061a5b | 600 | { |
NirT | 1:e8fac4061a5b | 601 | CAMERA_IO_Write(DeviceAddr, OV9655_QVGA[index][0], OV9655_QVGA[index][1]); |
NirT | 1:e8fac4061a5b | 602 | CAMERA_Delay(2); |
NirT | 1:e8fac4061a5b | 603 | } |
NirT | 1:e8fac4061a5b | 604 | break; |
NirT | 1:e8fac4061a5b | 605 | } |
NirT | 1:e8fac4061a5b | 606 | case CAMERA_R480x272: |
NirT | 1:e8fac4061a5b | 607 | { |
NirT | 1:e8fac4061a5b | 608 | /* Not supported resolution */ |
NirT | 1:e8fac4061a5b | 609 | break; |
NirT | 1:e8fac4061a5b | 610 | } |
NirT | 1:e8fac4061a5b | 611 | case CAMERA_R640x480: |
NirT | 1:e8fac4061a5b | 612 | { |
NirT | 1:e8fac4061a5b | 613 | for(index=0; index<(sizeof(OV9655_VGA)/2); index++) |
NirT | 1:e8fac4061a5b | 614 | { |
NirT | 1:e8fac4061a5b | 615 | CAMERA_IO_Write(DeviceAddr, OV9655_VGA[index][0], OV9655_VGA[index][1]); |
NirT | 1:e8fac4061a5b | 616 | CAMERA_Delay(2); |
NirT | 1:e8fac4061a5b | 617 | } |
NirT | 1:e8fac4061a5b | 618 | break; |
NirT | 1:e8fac4061a5b | 619 | } |
NirT | 1:e8fac4061a5b | 620 | default: |
NirT | 1:e8fac4061a5b | 621 | { |
NirT | 1:e8fac4061a5b | 622 | break; |
NirT | 1:e8fac4061a5b | 623 | } |
NirT | 1:e8fac4061a5b | 624 | } |
NirT | 1:e8fac4061a5b | 625 | } |
NirT | 1:e8fac4061a5b | 626 | |
NirT | 1:e8fac4061a5b | 627 | /** |
NirT | 1:e8fac4061a5b | 628 | * @brief Configures the OV9655 camera feature. |
NirT | 1:e8fac4061a5b | 629 | * @param DeviceAddr: Device address on communication Bus. |
NirT | 1:e8fac4061a5b | 630 | * @param feature: Camera feature to be configured |
NirT | 1:e8fac4061a5b | 631 | * @param value: Value to be configured |
NirT | 1:e8fac4061a5b | 632 | * @param brightness_value: Brightness value to be configured |
NirT | 1:e8fac4061a5b | 633 | * @retval None |
NirT | 1:e8fac4061a5b | 634 | */ |
NirT | 1:e8fac4061a5b | 635 | void ov9655_Config(uint16_t DeviceAddr, uint32_t feature, uint32_t value, uint32_t brightness_value) |
NirT | 1:e8fac4061a5b | 636 | { |
NirT | 1:e8fac4061a5b | 637 | uint8_t tslb, mtx1, mtx2, mtx3, mtx4, mtx5, mtx6; |
NirT | 1:e8fac4061a5b | 638 | uint64_t value_tmp; |
NirT | 1:e8fac4061a5b | 639 | uint32_t br_value; |
NirT | 1:e8fac4061a5b | 640 | |
NirT | 1:e8fac4061a5b | 641 | /* Convert the input value into ov9655 parameters */ |
NirT | 1:e8fac4061a5b | 642 | value_tmp = ov9655_ConvertValue(feature, value); |
NirT | 1:e8fac4061a5b | 643 | br_value = (uint32_t)ov9655_ConvertValue(CAMERA_CONTRAST_BRIGHTNESS, brightness_value); |
NirT | 1:e8fac4061a5b | 644 | |
NirT | 1:e8fac4061a5b | 645 | switch(feature) |
NirT | 1:e8fac4061a5b | 646 | { |
NirT | 1:e8fac4061a5b | 647 | case CAMERA_CONTRAST_BRIGHTNESS: |
NirT | 1:e8fac4061a5b | 648 | { |
NirT | 1:e8fac4061a5b | 649 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_BRTN, br_value); |
NirT | 1:e8fac4061a5b | 650 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_CNST1, value_tmp); |
NirT | 1:e8fac4061a5b | 651 | break; |
NirT | 1:e8fac4061a5b | 652 | } |
NirT | 1:e8fac4061a5b | 653 | case CAMERA_BLACK_WHITE: |
NirT | 1:e8fac4061a5b | 654 | case CAMERA_COLOR_EFFECT: |
NirT | 1:e8fac4061a5b | 655 | { |
NirT | 1:e8fac4061a5b | 656 | tslb = (uint8_t)(value_tmp >> 48); |
NirT | 1:e8fac4061a5b | 657 | mtx1 = (uint8_t)(value_tmp >> 40); |
NirT | 1:e8fac4061a5b | 658 | mtx2 = (uint8_t)(value_tmp >> 32); |
NirT | 1:e8fac4061a5b | 659 | mtx3 = (uint8_t)(value_tmp >> 24); |
NirT | 1:e8fac4061a5b | 660 | mtx4 = (uint8_t)(value_tmp >> 16); |
NirT | 1:e8fac4061a5b | 661 | mtx5 = (uint8_t)(value_tmp >> 8); |
NirT | 1:e8fac4061a5b | 662 | mtx6 = (uint8_t)(value_tmp); |
NirT | 1:e8fac4061a5b | 663 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_TSLB, tslb); |
NirT | 1:e8fac4061a5b | 664 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX1, mtx1); |
NirT | 1:e8fac4061a5b | 665 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX2, mtx2); |
NirT | 1:e8fac4061a5b | 666 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX3, mtx3); |
NirT | 1:e8fac4061a5b | 667 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX4, mtx4); |
NirT | 1:e8fac4061a5b | 668 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX5, mtx5); |
NirT | 1:e8fac4061a5b | 669 | CAMERA_IO_Write(DeviceAddr, OV9655_SENSOR_MTX6, mtx6); |
NirT | 1:e8fac4061a5b | 670 | break; |
NirT | 1:e8fac4061a5b | 671 | } |
NirT | 1:e8fac4061a5b | 672 | default: |
NirT | 1:e8fac4061a5b | 673 | { |
NirT | 1:e8fac4061a5b | 674 | break; |
NirT | 1:e8fac4061a5b | 675 | } |
NirT | 1:e8fac4061a5b | 676 | } |
NirT | 1:e8fac4061a5b | 677 | } |
NirT | 1:e8fac4061a5b | 678 | |
NirT | 1:e8fac4061a5b | 679 | /** |
NirT | 1:e8fac4061a5b | 680 | * @brief Read the OV9655 Camera identity. |
NirT | 1:e8fac4061a5b | 681 | * @param DeviceAddr: Device address on communication Bus. |
NirT | 1:e8fac4061a5b | 682 | * @retval the OV9655 ID |
NirT | 1:e8fac4061a5b | 683 | */ |
NirT | 1:e8fac4061a5b | 684 | uint16_t ov9655_ReadID(uint16_t DeviceAddr) |
NirT | 1:e8fac4061a5b | 685 | { |
NirT | 1:e8fac4061a5b | 686 | /* Initialize I2C */ |
NirT | 1:e8fac4061a5b | 687 | CAMERA_IO_Init(); |
NirT | 1:e8fac4061a5b | 688 | |
NirT | 1:e8fac4061a5b | 689 | /* Get the camera ID */ |
NirT | 1:e8fac4061a5b | 690 | return (CAMERA_IO_Read(DeviceAddr, OV9655_SENSOR_PIDH)); |
NirT | 1:e8fac4061a5b | 691 | } |
NirT | 1:e8fac4061a5b | 692 | |
NirT | 1:e8fac4061a5b | 693 | /****************************************************************************** |
NirT | 1:e8fac4061a5b | 694 | Static Functions |
NirT | 1:e8fac4061a5b | 695 | *******************************************************************************/ |
NirT | 1:e8fac4061a5b | 696 | /** |
NirT | 1:e8fac4061a5b | 697 | * @brief Convert input values into ov9655 parameters. |
NirT | 1:e8fac4061a5b | 698 | * @param feature: Camera feature to be configured |
NirT | 1:e8fac4061a5b | 699 | * @param value: Value to be configured |
NirT | 1:e8fac4061a5b | 700 | * @retval The converted value |
NirT | 1:e8fac4061a5b | 701 | */ |
NirT | 1:e8fac4061a5b | 702 | static uint64_t ov9655_ConvertValue(uint32_t feature, uint32_t value) |
NirT | 1:e8fac4061a5b | 703 | { |
NirT | 1:e8fac4061a5b | 704 | uint64_t ret = 0; |
NirT | 1:e8fac4061a5b | 705 | |
NirT | 1:e8fac4061a5b | 706 | switch(feature) |
NirT | 1:e8fac4061a5b | 707 | { |
NirT | 1:e8fac4061a5b | 708 | case CAMERA_BLACK_WHITE: |
NirT | 1:e8fac4061a5b | 709 | { |
NirT | 1:e8fac4061a5b | 710 | switch(value) |
NirT | 1:e8fac4061a5b | 711 | { |
NirT | 1:e8fac4061a5b | 712 | case CAMERA_BLACK_WHITE_BW: |
NirT | 1:e8fac4061a5b | 713 | { |
NirT | 1:e8fac4061a5b | 714 | ret = OV9655_BLACK_WHITE_BW; |
NirT | 1:e8fac4061a5b | 715 | break; |
NirT | 1:e8fac4061a5b | 716 | } |
NirT | 1:e8fac4061a5b | 717 | case CAMERA_BLACK_WHITE_NEGATIVE: |
NirT | 1:e8fac4061a5b | 718 | { |
NirT | 1:e8fac4061a5b | 719 | ret = OV9655_BLACK_WHITE_NEGATIVE; |
NirT | 1:e8fac4061a5b | 720 | break; |
NirT | 1:e8fac4061a5b | 721 | } |
NirT | 1:e8fac4061a5b | 722 | case CAMERA_BLACK_WHITE_BW_NEGATIVE: |
NirT | 1:e8fac4061a5b | 723 | { |
NirT | 1:e8fac4061a5b | 724 | ret = OV9655_BLACK_WHITE_BW_NEGATIVE; |
NirT | 1:e8fac4061a5b | 725 | break; |
NirT | 1:e8fac4061a5b | 726 | } |
NirT | 1:e8fac4061a5b | 727 | case CAMERA_BLACK_WHITE_NORMAL: |
NirT | 1:e8fac4061a5b | 728 | { |
NirT | 1:e8fac4061a5b | 729 | ret = OV9655_BLACK_WHITE_NORMAL; |
NirT | 1:e8fac4061a5b | 730 | break; |
NirT | 1:e8fac4061a5b | 731 | } |
NirT | 1:e8fac4061a5b | 732 | default: |
NirT | 1:e8fac4061a5b | 733 | { |
NirT | 1:e8fac4061a5b | 734 | ret = OV9655_BLACK_WHITE_NORMAL; |
NirT | 1:e8fac4061a5b | 735 | break; |
NirT | 1:e8fac4061a5b | 736 | } |
NirT | 1:e8fac4061a5b | 737 | } |
NirT | 1:e8fac4061a5b | 738 | break; |
NirT | 1:e8fac4061a5b | 739 | } |
NirT | 1:e8fac4061a5b | 740 | case CAMERA_CONTRAST_BRIGHTNESS: |
NirT | 1:e8fac4061a5b | 741 | { |
NirT | 1:e8fac4061a5b | 742 | switch(value) |
NirT | 1:e8fac4061a5b | 743 | { |
NirT | 1:e8fac4061a5b | 744 | case CAMERA_BRIGHTNESS_LEVEL0: |
NirT | 1:e8fac4061a5b | 745 | { |
NirT | 1:e8fac4061a5b | 746 | ret = OV9655_BRIGHTNESS_LEVEL0; |
NirT | 1:e8fac4061a5b | 747 | break; |
NirT | 1:e8fac4061a5b | 748 | } |
NirT | 1:e8fac4061a5b | 749 | case CAMERA_BRIGHTNESS_LEVEL1: |
NirT | 1:e8fac4061a5b | 750 | { |
NirT | 1:e8fac4061a5b | 751 | ret = OV9655_BRIGHTNESS_LEVEL1; |
NirT | 1:e8fac4061a5b | 752 | break; |
NirT | 1:e8fac4061a5b | 753 | } |
NirT | 1:e8fac4061a5b | 754 | case CAMERA_BRIGHTNESS_LEVEL2: |
NirT | 1:e8fac4061a5b | 755 | { |
NirT | 1:e8fac4061a5b | 756 | ret = OV9655_BRIGHTNESS_LEVEL2; |
NirT | 1:e8fac4061a5b | 757 | break; |
NirT | 1:e8fac4061a5b | 758 | } |
NirT | 1:e8fac4061a5b | 759 | case CAMERA_BRIGHTNESS_LEVEL3: |
NirT | 1:e8fac4061a5b | 760 | { |
NirT | 1:e8fac4061a5b | 761 | ret = OV9655_BRIGHTNESS_LEVEL3; |
NirT | 1:e8fac4061a5b | 762 | break; |
NirT | 1:e8fac4061a5b | 763 | } |
NirT | 1:e8fac4061a5b | 764 | case CAMERA_BRIGHTNESS_LEVEL4: |
NirT | 1:e8fac4061a5b | 765 | { |
NirT | 1:e8fac4061a5b | 766 | ret = OV9655_BRIGHTNESS_LEVEL4; |
NirT | 1:e8fac4061a5b | 767 | break; |
NirT | 1:e8fac4061a5b | 768 | } |
NirT | 1:e8fac4061a5b | 769 | case CAMERA_CONTRAST_LEVEL0: |
NirT | 1:e8fac4061a5b | 770 | { |
NirT | 1:e8fac4061a5b | 771 | ret = OV9655_CONTRAST_LEVEL0; |
NirT | 1:e8fac4061a5b | 772 | break; |
NirT | 1:e8fac4061a5b | 773 | } |
NirT | 1:e8fac4061a5b | 774 | case CAMERA_CONTRAST_LEVEL1: |
NirT | 1:e8fac4061a5b | 775 | { |
NirT | 1:e8fac4061a5b | 776 | ret = OV9655_CONTRAST_LEVEL1; |
NirT | 1:e8fac4061a5b | 777 | break; |
NirT | 1:e8fac4061a5b | 778 | } |
NirT | 1:e8fac4061a5b | 779 | case CAMERA_CONTRAST_LEVEL2: |
NirT | 1:e8fac4061a5b | 780 | { |
NirT | 1:e8fac4061a5b | 781 | ret = OV9655_CONTRAST_LEVEL2; |
NirT | 1:e8fac4061a5b | 782 | break; |
NirT | 1:e8fac4061a5b | 783 | } |
NirT | 1:e8fac4061a5b | 784 | case CAMERA_CONTRAST_LEVEL3: |
NirT | 1:e8fac4061a5b | 785 | { |
NirT | 1:e8fac4061a5b | 786 | ret = OV9655_CONTRAST_LEVEL3; |
NirT | 1:e8fac4061a5b | 787 | break; |
NirT | 1:e8fac4061a5b | 788 | } |
NirT | 1:e8fac4061a5b | 789 | case CAMERA_CONTRAST_LEVEL4: |
NirT | 1:e8fac4061a5b | 790 | { |
NirT | 1:e8fac4061a5b | 791 | ret = OV9655_CONTRAST_LEVEL4; |
NirT | 1:e8fac4061a5b | 792 | break; |
NirT | 1:e8fac4061a5b | 793 | } |
NirT | 1:e8fac4061a5b | 794 | default: |
NirT | 1:e8fac4061a5b | 795 | { |
NirT | 1:e8fac4061a5b | 796 | ret = OV9655_CONTRAST_LEVEL0; |
NirT | 1:e8fac4061a5b | 797 | break; |
NirT | 1:e8fac4061a5b | 798 | } |
NirT | 1:e8fac4061a5b | 799 | } |
NirT | 1:e8fac4061a5b | 800 | break; |
NirT | 1:e8fac4061a5b | 801 | } |
NirT | 1:e8fac4061a5b | 802 | case CAMERA_COLOR_EFFECT: |
NirT | 1:e8fac4061a5b | 803 | { |
NirT | 1:e8fac4061a5b | 804 | switch(value) |
NirT | 1:e8fac4061a5b | 805 | { |
NirT | 1:e8fac4061a5b | 806 | case CAMERA_COLOR_EFFECT_ANTIQUE: |
NirT | 1:e8fac4061a5b | 807 | { |
NirT | 1:e8fac4061a5b | 808 | ret = OV9655_COLOR_EFFECT_ANTIQUE; |
NirT | 1:e8fac4061a5b | 809 | break; |
NirT | 1:e8fac4061a5b | 810 | } |
NirT | 1:e8fac4061a5b | 811 | case CAMERA_COLOR_EFFECT_BLUE: |
NirT | 1:e8fac4061a5b | 812 | { |
NirT | 1:e8fac4061a5b | 813 | ret = OV9655_COLOR_EFFECT_BLUE; |
NirT | 1:e8fac4061a5b | 814 | break; |
NirT | 1:e8fac4061a5b | 815 | } |
NirT | 1:e8fac4061a5b | 816 | case CAMERA_COLOR_EFFECT_GREEN: |
NirT | 1:e8fac4061a5b | 817 | { |
NirT | 1:e8fac4061a5b | 818 | ret = OV9655_COLOR_EFFECT_GREEN; |
NirT | 1:e8fac4061a5b | 819 | break; |
NirT | 1:e8fac4061a5b | 820 | } |
NirT | 1:e8fac4061a5b | 821 | case CAMERA_COLOR_EFFECT_RED: |
NirT | 1:e8fac4061a5b | 822 | { |
NirT | 1:e8fac4061a5b | 823 | ret = OV9655_COLOR_EFFECT_RED; |
NirT | 1:e8fac4061a5b | 824 | break; |
NirT | 1:e8fac4061a5b | 825 | } |
NirT | 1:e8fac4061a5b | 826 | case CAMERA_COLOR_EFFECT_NONE: |
NirT | 1:e8fac4061a5b | 827 | default: |
NirT | 1:e8fac4061a5b | 828 | { |
NirT | 1:e8fac4061a5b | 829 | ret = OV9655_COLOR_EFFECT_NONE; |
NirT | 1:e8fac4061a5b | 830 | break; |
NirT | 1:e8fac4061a5b | 831 | } |
NirT | 1:e8fac4061a5b | 832 | } |
NirT | 1:e8fac4061a5b | 833 | break; |
NirT | 1:e8fac4061a5b | 834 | default: |
NirT | 1:e8fac4061a5b | 835 | { |
NirT | 1:e8fac4061a5b | 836 | ret = 0; |
NirT | 1:e8fac4061a5b | 837 | break; |
NirT | 1:e8fac4061a5b | 838 | } |
NirT | 1:e8fac4061a5b | 839 | } |
NirT | 1:e8fac4061a5b | 840 | } |
NirT | 1:e8fac4061a5b | 841 | |
NirT | 1:e8fac4061a5b | 842 | return ret; |
NirT | 1:e8fac4061a5b | 843 | } |
NirT | 1:e8fac4061a5b | 844 | |
NirT | 1:e8fac4061a5b | 845 | /** |
NirT | 1:e8fac4061a5b | 846 | * @} |
NirT | 1:e8fac4061a5b | 847 | */ |
NirT | 1:e8fac4061a5b | 848 | |
NirT | 1:e8fac4061a5b | 849 | /** |
NirT | 1:e8fac4061a5b | 850 | * @} |
NirT | 1:e8fac4061a5b | 851 | */ |
NirT | 1:e8fac4061a5b | 852 | |
NirT | 1:e8fac4061a5b | 853 | /** |
NirT | 1:e8fac4061a5b | 854 | * @} |
NirT | 1:e8fac4061a5b | 855 | */ |
NirT | 1:e8fac4061a5b | 856 | |
NirT | 1:e8fac4061a5b | 857 | /** |
NirT | 1:e8fac4061a5b | 858 | * @} |
NirT | 1:e8fac4061a5b | 859 | */ |
NirT | 1:e8fac4061a5b | 860 | |
NirT | 1:e8fac4061a5b | 861 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |