AD9249 ADC
Fork of adc_ad9249 by
Revision 2:f300a1dafedc, committed 2014-10-07
- Comitter:
- NickRyder
- Date:
- Tue Oct 07 21:31:16 2014 +0000
- Parent:
- 1:01459a6ab296
- Commit message:
- Tidying up.
Changed in this revision
AD9249.cpp | Show annotated file Show diff for this revision Revisions of this file |
AD9249.h | Show annotated file Show diff for this revision Revisions of this file |
--- a/AD9249.cpp Sun Oct 05 17:10:44 2014 +0000 +++ b/AD9249.cpp Tue Oct 07 21:31:16 2014 +0000 @@ -39,101 +39,99 @@ */ -AD9249::AD9249( SWSPI_BI* spi_dev, DigitalOut* csb_pin):getVersion( AD9249_HDR_VER,AD9249_SRC_VER, __TIME__, __DATE__) { - spi=spi_dev;csb=csb_pin; +AD9249::AD9249(SWSPI_BI * spi_dev, DigitalOut * csb_pin): + getVersion(AD9249_HDR_VER, AD9249_SRC_VER, __TIME__, __DATE__) +{ + spi = spi_dev; + csb = csb_pin; } -AD9249::u32 AD9249::spi_cycle( u16 reg , bool rw , u16 nrbytes, u32 data){ +AD9249::u32 AD9249::spi_cycle(u16 reg, bool rw, u16 nrbytes, u32 data) { // format instruction - u32 read =0; - reg = 0x1FFF & reg; - if (rw) reg |=0x8000; - if (nrbytes > 2) return 0; // this function doesn't support stream - u32 stnrbytes = (nrbytes-1); - stnrbytes =stnrbytes <<13; - reg|=stnrbytes; // reg is now the instruction - spi->format(16,0); // should make sure the sclk is high - printf("send %04X \n\r",reg); - - - - if (rw) { - spi->write(reg, csb , false ,CS_POL,true ); - spi->format((nrbytes)*8 ,0); - read=spi->read(csb , true ,CS_POL ); - } - else{ - spi->write(reg, csb , false ,CS_POL ); - spi->format((nrbytes)*8 ,0); - spi->write(data, csb , true ,CS_POL ); - - } - - return read; - } + u32 read = 0; + reg = 0x1FFF & reg; + if (rw) reg |= 0x8000; + if (nrbytes > 2) return 0; // this function doesn't support stream + u32 stnrbytes = (nrbytes - 1); + stnrbytes = stnrbytes << 13; + reg |= stnrbytes; // reg is now the instruction + spi->format(16, 0); // should make sure the sclk is high + printf("send %04X \n\r", reg); + if (rw) { + spi->write(reg, csb, false, CS_POL, true); + spi->format((nrbytes) * 8, 0); + read=spi->read(csb, true, CS_POL); + } else{ + spi->write(reg, csb, false, CS_POL); + spi->format((nrbytes) * 8, 0); + spi->write(data, csb, true, CS_POL); + } + return read; +} - bool AD9249::getDevInfo(u8&chipid,u8& grade ,u16 &rb ){ - u32 data=spi_cycle( chip_grade_reg, true , 2 , 0); - rb=data; - chipid= data & 0XFF; - grade= (data >> 8) & 0xFF; - return true; - } +bool AD9249::getDevInfo(u8& chipid, u8& grade, u16 &rb) { + u32 data = spi_cycle(chip_grade_reg, true, 2, 0); + rb = data; + chipid = data & 0XFF; + grade = (data >> 8) & 0xFF; + return true; +} - bool AD9249::getDevId(u8&chipid ){ - bool rv=readReg8(chip_id_reg,chipid); - return rv; - } - bool AD9249::getGrade(u8&chipid ){ - bool rv=readReg8(chip_grade_reg,chipid); - return rv; - } +bool AD9249::getDevId(u8& chipid){ + bool rv = readReg8(chip_id_reg, chipid); + return rv; +} + +bool AD9249::getGrade(u8& chipid){ + bool rv = readReg8(chip_grade_reg, chipid); + return rv; +} - bool AD9249::readReg16( u16 regaddr, u16& data){ - u32 datai=spi_cycle( regaddr , true , 2 , 0); - data=(u16)( datai & 0XFFFF); - return true; - } +bool AD9249::readReg16(u16 regaddr, u16& data) { + u32 datai = spi_cycle(regaddr, true, 2, 0); + data = (u16) (datai & 0XFFFF); + return true; +} - bool AD9249::readReg8 ( u16 regaddr, u8& data){ - u32 datai=spi_cycle( regaddr, true , 1 , 0); - data=(u8)( datai & 0XFF); - return true; - } - - - - bool AD9249::setReg16( u16 regaddr, u16 data){ - u32 datai=spi_cycle( regaddr, false , 2 , (u32)data); - return true; - } +bool AD9249::readReg8(u16 regaddr, u8& data) { + u32 datai = spi_cycle(regaddr, true, 1, 0); + data = (u8) (datai & 0XFF); + return true; +} + +bool AD9249::setReg16(u16 regaddr, u16 data) { + u32 datai = spi_cycle(regaddr, false, 2, (u32) data); + return true; +} - bool AD9249::setReg8 ( u16 regaddr, u8 data){ - u32 datai=spi_cycle( regaddr, false , 1 , (u32)data); - return true; - } +bool AD9249::setReg8 (u16 regaddr, u8 data) { + u32 datai = spi_cycle(regaddr, false, 1, (u32) data); + return true; +} - bool AD9249::setPattern1(u16 pattern){ - bool rv=setReg16( usserpatt1_MSB_reg,pattern); - return rv; - } - bool AD9249::setPattern2(u16 pattern){ - bool rv=setReg16( usserpatt2_MSB_reg,pattern); - return rv; - } +bool AD9249::setPattern1(u16 pattern) { + bool rv = setReg16(usserpatt1_MSB_reg, pattern); + return rv; +} + +bool AD9249::setPattern2(u16 pattern) { + bool rv = setReg16(usserpatt2_MSB_reg, pattern); + return rv; +} - bool AD9249::readPattern1(u16& pattern){ - bool rv= readReg16( usserpatt1_MSB_reg,pattern); - return rv; - } - bool AD9249::readPattern2(u16& pattern){ - bool rv= readReg16( usserpatt2_MSB_reg,pattern); - return rv; +bool AD9249::readPattern1(u16& pattern) { + bool rv = readReg16(usserpatt1_MSB_reg, pattern); + return rv; +} + +bool AD9249::readPattern2(u16& pattern) { + bool rv = readReg16(usserpatt2_MSB_reg, pattern); + return rv; +} - } - - void AD9249::init1(){} - void AD9249::init2(){} +void AD9249::init1(){} + +void AD9249::init2(){} \ No newline at end of file
--- a/AD9249.h Sun Oct 05 17:10:44 2014 +0000 +++ b/AD9249.h Tue Oct 07 21:31:16 2014 +0000 @@ -22,62 +22,53 @@ typedef unsigned int u32; typedef unsigned short u16; // address defs - static const u16 configreg= 0x0; - static const u16 chip_id_reg= 0x1; - static const u16 chip_grade_reg= 0x2; + static const u16 configreg = 0x0; + static const u16 chip_id_reg = 0x1; + static const u16 chip_grade_reg = 0x2; // static const u16 unused_reg= { 0x3, 0x07, 0xA, 0xE, 0xF ,0x11, 0x12,0x13, 0x17, 0x1D, 0x1E, 0x1F,0x20 }; - static const u16 dev_index2_reg= 0x4; - static const u16 dev_index1_reg= 0x4; - static const u16 transfer_reg= 0xFF; - static const u16 power_mode_reg= 0x8; - static const u16 clock_gobal_reg= 0x9; - static const u16 clock_divide_reg= 0xB; - static const u16 enhancement_ctr_reg= 0xC; - static const u16 test_mode_reg= 0xD; - static const u16 offset_adj_reg= 0x10; - static const u16 output_mode_reg= 0x14; - static const u16 output_adj_reg= 0x15; - static const u16 output_phase_reg= 0x16; - static const u16 vref_reg= 0x18; - static const u16 usserpatt1_LSB_reg= 0x19; - static const u16 usserpatt1_MSB_reg= 0x1A; - static const u16 usserpatt2_LSB_reg= 0x1B; - static const u16 usserpatt2_MSB_reg= 0x1C; - static const u16 serial_out_cntr_reg= 0x21; - static const u16 serial_status_reg= 0x22; - static const u16 sample_rate_reg= 0x100; - static const u16 user_io_ctr2_reg= 0x101; - static const u16 user_io_ctr3_reg= 0x102; - static const u16 sync_reg= 0x109; + static const u16 dev_index2_reg = 0x4; + static const u16 dev_index1_reg = 0x4; + static const u16 transfer_reg = 0xFF; + static const u16 power_mode_reg = 0x8; + static const u16 clock_gobal_reg = 0x9; + static const u16 clock_divide_reg = 0xB; + static const u16 enhancement_ctr_reg = 0xC; + static const u16 test_mode_reg = 0xD; + static const u16 offset_adj_reg = 0x10; + static const u16 output_mode_reg = 0x14; + static const u16 output_adj_reg = 0x15; + static const u16 output_phase_reg = 0x16; + static const u16 vref_reg = 0x18; + static const u16 usserpatt1_LSB_reg = 0x19; + static const u16 usserpatt1_MSB_reg = 0x1A; + static const u16 usserpatt2_LSB_reg = 0x1B; + static const u16 usserpatt2_MSB_reg = 0x1C; + static const u16 serial_out_cntr_reg = 0x21; + static const u16 serial_status_reg = 0x22; + static const u16 sample_rate_reg = 0x100; + static const u16 user_io_ctr2_reg = 0x101; + static const u16 user_io_ctr3_reg = 0x102; + static const u16 sync_reg = 0x109; - u32 spi_cycle( u16 reg , bool rw , u16 nrbytes, u32 data); - SWSPI_BI* spi; - DigitalOut* csb; - public: - AD9249( SWSPI_BI* spi_dev, DigitalOut* csb_dev); - bool getDevInfo(u8& chipid,u8& grade, u16& rb ); - bool getDevId(u8&chipid ); - bool getGrade(u8&grade ); - bool setPattern1(u16 pattern); - bool setPattern2(u16 pattern); - bool readPattern1(u16& pattern); - bool readPattern2(u16& pattern); - //general read write - bool setReg16( u16 regaddr, u16 data); - bool setReg8 ( u16 regaddr, u8 data); - bool readReg16( u16 regaddr, u16& data); - bool readReg8 ( u16 regaddr, u8& data); - void init1(); - void init2(); - + u32 spi_cycle(u16 reg, bool rw, u16 nrbytes, u32 data); + SWSPI_BI * spi; + DigitalOut * csb; + public: + AD9249(SWSPI_BI * spi_dev, DigitalOut * csb_dev); + bool getDevInfo(u8& chipid, u8& grade, u16& rb); + bool getDevId(u8& chipid); + bool getGrade(u8& grade); + bool setPattern1(u16 pattern); + bool setPattern2(u16 pattern); + bool readPattern1(u16& pattern); + bool readPattern2(u16& pattern); + //general read write + bool setReg16(u16 regaddr, u16 data); + bool setReg8(u16 regaddr, u8 data); + bool readReg16(u16 regaddr, u16& data); + bool readReg8(u16 regaddr, u8& data); + void init1(); + void init2(); }; - - - - -#endif - - - - +#endif \ No newline at end of file