Diff: AD9249.cpp

Revision:

2:f300a1dafedc

Parent:

1:01459a6ab296

--- a/AD9249.cpp	Sun Oct 05 17:10:44 2014 +0000
+++ b/AD9249.cpp	Tue Oct 07 21:31:16 2014 +0000
@@ -39,101 +39,99 @@
   */ 
 
 
-AD9249::AD9249( SWSPI_BI* spi_dev, DigitalOut* csb_pin):getVersion( AD9249_HDR_VER,AD9249_SRC_VER, __TIME__, __DATE__) {  
-    spi=spi_dev;csb=csb_pin;
+AD9249::AD9249(SWSPI_BI * spi_dev, DigitalOut * csb_pin):
+    getVersion(AD9249_HDR_VER, AD9249_SRC_VER, __TIME__, __DATE__)
+{  
+    spi = spi_dev;
+    csb = csb_pin;
 }
 
 
-AD9249::u32 AD9249::spi_cycle( u16 reg , bool rw , u16 nrbytes, u32 data){
+AD9249::u32 AD9249::spi_cycle(u16 reg, bool rw, u16 nrbytes, u32 data) {
     // format instruction 
-        u32 read =0;
-        reg = 0x1FFF & reg;  
-        if (rw) reg |=0x8000;
-        if (nrbytes > 2) return 0; // this function doesn't support stream 
-        u32 stnrbytes = (nrbytes-1);
-        stnrbytes =stnrbytes  <<13;
-        reg|=stnrbytes;  // reg is now the instruction 
-        spi->format(16,0); // should make sure the sclk is high 
-        printf("send %04X \n\r",reg);
-        
-    
-        
-        if (rw) {
-            spi->write(reg, csb , false ,CS_POL,true );
-            spi->format((nrbytes)*8 ,0);
-            read=spi->read(csb , true ,CS_POL );                                        
-         }
-         else{
-            spi->write(reg, csb , false ,CS_POL );
-            spi->format((nrbytes)*8 ,0);
-            spi->write(data, csb , true ,CS_POL );
-            
-        }
-                
-        return read;
-    }
+    u32 read = 0;
+    reg = 0x1FFF & reg;  
+    if (rw) reg |= 0x8000;
+    if (nrbytes > 2) return 0; // this function doesn't support stream 
+    u32 stnrbytes = (nrbytes - 1);
+    stnrbytes = stnrbytes << 13;
+    reg |= stnrbytes;  // reg is now the instruction 
+    spi->format(16, 0); // should make sure the sclk is high 
+    printf("send %04X \n\r", reg);
+    if (rw) {
+        spi->write(reg, csb, false, CS_POL, true);
+        spi->format((nrbytes) * 8, 0); 
+        read=spi->read(csb, true, CS_POL);                                        
+    } else{
+        spi->write(reg, csb, false, CS_POL);
+        spi->format((nrbytes) * 8, 0);
+        spi->write(data, csb, true, CS_POL);
+    }         
+    return read;
+}
     
     
-     bool AD9249::getDevInfo(u8&chipid,u8& grade ,u16 &rb ){
-            u32 data=spi_cycle( chip_grade_reg, true , 2 , 0);
-            rb=data;
-            chipid= data & 0XFF;
-            grade= (data >> 8) & 0xFF;
-            return true;
-         }
+bool AD9249::getDevInfo(u8& chipid, u8& grade, u16 &rb) {
+    u32 data = spi_cycle(chip_grade_reg, true, 2, 0);
+    rb = data;
+    chipid = data & 0XFF;
+    grade = (data >> 8) & 0xFF;
+    return true;
+}
          
-     bool AD9249::getDevId(u8&chipid ){
-            bool rv=readReg8(chip_id_reg,chipid); 
-            return rv;
-         }
-     bool AD9249::getGrade(u8&chipid ){          
-            bool rv=readReg8(chip_grade_reg,chipid);                       
-            return rv;
-         }      
+bool AD9249::getDevId(u8& chipid){
+    bool rv = readReg8(chip_id_reg, chipid); 
+    return rv;
+}
+
+bool AD9249::getGrade(u8& chipid){          
+    bool rv = readReg8(chip_grade_reg, chipid);                       
+    return rv;
+}      
   
-   bool AD9249::readReg16( u16 regaddr, u16& data){
-       u32 datai=spi_cycle( regaddr , true , 2 , 0);
-       data=(u16)( datai & 0XFFFF);
-       return true;
-  }
+bool AD9249::readReg16(u16 regaddr, u16& data) {
+    u32 datai = spi_cycle(regaddr, true, 2, 0);
+    data = (u16) (datai & 0XFFFF);
+    return true;
+}
        
-   bool AD9249::readReg8 ( u16 regaddr, u8& data){
-        u32 datai=spi_cycle( regaddr, true , 1 , 0);
-       data=(u8)( datai & 0XFF);
-       return true;
-  }         
- 
- 
-         
-   bool AD9249::setReg16( u16 regaddr, u16 data){
-        u32 datai=spi_cycle( regaddr, false , 2 , (u32)data);
-        return true;
-    }
+bool AD9249::readReg8(u16 regaddr, u8& data) {
+    u32 datai = spi_cycle(regaddr, true, 1, 0);
+    data = (u8) (datai & 0XFF);
+    return true;
+}         
+          
+bool AD9249::setReg16(u16 regaddr, u16 data) {
+    u32 datai = spi_cycle(regaddr, false, 2, (u32) data);
+    return true;
+}
     
-   bool AD9249::setReg8 ( u16 regaddr, u8 data){
-       u32 datai=spi_cycle( regaddr, false , 1 , (u32)data);
-       return true;
-    }
+bool AD9249::setReg8 (u16 regaddr, u8 data) {
+    u32 datai = spi_cycle(regaddr, false, 1, (u32) data);
+    return true;
+}
     
          
-    bool AD9249::setPattern1(u16 pattern){
-        bool rv=setReg16( usserpatt1_MSB_reg,pattern);
-        return rv;
-        }
-   bool AD9249::setPattern2(u16 pattern){
-       bool rv=setReg16( usserpatt2_MSB_reg,pattern);
-       return rv;
-       }
+bool AD9249::setPattern1(u16 pattern) {
+    bool rv = setReg16(usserpatt1_MSB_reg, pattern);
+    return rv;
+}
+
+bool AD9249::setPattern2(u16 pattern) {
+    bool rv = setReg16(usserpatt2_MSB_reg, pattern);
+    return rv;
+}
    
-   bool AD9249::readPattern1(u16& pattern){
-        bool rv= readReg16( usserpatt1_MSB_reg,pattern);
-        return rv;
-       }
-   bool AD9249::readPattern2(u16& pattern){
-         bool rv= readReg16( usserpatt2_MSB_reg,pattern);
-        return rv;
+bool AD9249::readPattern1(u16& pattern) {
+    bool rv = readReg16(usserpatt1_MSB_reg, pattern);
+    return rv;
+}
+
+bool AD9249::readPattern2(u16& pattern) {
+    bool rv = readReg16(usserpatt2_MSB_reg, pattern);
+    return rv;
+}
        
-       }
-       
-       void AD9249::init1(){}
-       void AD9249::init2(){}
+void AD9249::init1(){}
+
+void AD9249::init2(){}
\ No newline at end of file