不韋 呂 / UITDSP_ADDA2

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Dependents:   UITDSP_ADDA_Example2

ADC_Interrupt.hpp@0:46d099dfd9d6, 2015-03-14 (annotated)

Committer:
MikamiUitOpen
Date:
Sat Mar 14 06:49:49 2015 +0000
Revision:
0:46d099dfd9d6
Child:
1:e997f4e94491
1

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MikamiUitOpen 0:46d099dfd9d6 1 //------------------------------------------------------
MikamiUitOpen 0:46d099dfd9d6 2 // Derived class of ADC_Base for use interrupt
MikamiUitOpen 0:46d099dfd9d6 3 //
MikamiUitOpen 0:46d099dfd9d6 4 // 2015/03/14, Copyright (c) 2015 MIKAMI, Naoki
MikamiUitOpen 0:46d099dfd9d6 5 //------------------------------------------------------
MikamiUitOpen 0:46d099dfd9d6 6
MikamiUitOpen 0:46d099dfd9d6 7 #ifndef ADC_INTERRUPT_HPP
MikamiUitOpen 0:46d099dfd9d6 8 #define ADC_INTERRUPT_HPP
MikamiUitOpen 0:46d099dfd9d6 9
MikamiUitOpen 0:46d099dfd9d6 10 #include "ADC_BuiltIn.hpp"
MikamiUitOpen 0:46d099dfd9d6 11
MikamiUitOpen 0:46d099dfd9d6 12 namespace Mikami
MikamiUitOpen 0:46d099dfd9d6 13 {
MikamiUitOpen 0:46d099dfd9d6 14 class ADC_Intr : public ADC_BuiltIn
MikamiUitOpen 0:46d099dfd9d6 15 {
MikamiUitOpen 0:46d099dfd9d6 16 private:
MikamiUitOpen 0:46d099dfd9d6 17 // for inhibition of copy constructor
MikamiUitOpen 0:46d099dfd9d6 18 ADC_Intr(const ADC_Intr&);
MikamiUitOpen 0:46d099dfd9d6 19 // for inhibition of substitute operator
MikamiUitOpen 0:46d099dfd9d6 20 ADC_Intr& operator=(const ADC_Intr&);
MikamiUitOpen 0:46d099dfd9d6 21
MikamiUitOpen 0:46d099dfd9d6 22 public:
MikamiUitOpen 0:46d099dfd9d6 23 ADC_Intr(PinName pin1, int frequency,
MikamiUitOpen 0:46d099dfd9d6 24 PinName pin2 = NC, PinName pin3 = NC)
MikamiUitOpen 0:46d099dfd9d6 25 : ADC_BuiltIn(pin1, frequency, pin2, pin3)
MikamiUitOpen 0:46d099dfd9d6 26 { myAdc_->CR1 |= ADC_CR1_EOCIE; } // Interrupt enable
MikamiUitOpen 0:46d099dfd9d6 27
MikamiUitOpen 0:46d099dfd9d6 28 // Set interrupt vector and enable IRQ of ADC
MikamiUitOpen 0:46d099dfd9d6 29 void SetIntrVec(void (*Func)())
MikamiUitOpen 0:46d099dfd9d6 30 {
MikamiUitOpen 0:46d099dfd9d6 31 NVIC_SetVector(ADC_IRQn, (uint32_t)Func); // See "cmsis_nvic.h"
MikamiUitOpen 0:46d099dfd9d6 32 NVIC_EnableIRQ(ADC_IRQn); // See "core_cm4.h"
MikamiUitOpen 0:46d099dfd9d6 33 }
MikamiUitOpen 0:46d099dfd9d6 34
MikamiUitOpen 0:46d099dfd9d6 35 // Read ADC, range: [0, 0x0FFF]
MikamiUitOpen 0:46d099dfd9d6 36 virtual uint16_t Read_u16()
MikamiUitOpen 0:46d099dfd9d6 37 { return myAdc_->DR; }
MikamiUitOpen 0:46d099dfd9d6 38
MikamiUitOpen 0:46d099dfd9d6 39 // Read ADC, range: [0, 0x0FFF]
MikamiUitOpen 0:46d099dfd9d6 40 virtual uint16_t ReadWait_u16()
MikamiUitOpen 0:46d099dfd9d6 41 {
MikamiUitOpen 0:46d099dfd9d6 42 WaitDone();
MikamiUitOpen 0:46d099dfd9d6 43 return myAdc_->DR;
MikamiUitOpen 0:46d099dfd9d6 44 }
MikamiUitOpen 0:46d099dfd9d6 45
MikamiUitOpen 0:46d099dfd9d6 46 // Read ADC, range: [-1.0f, 1.0f]
MikamiUitOpen 0:46d099dfd9d6 47 virtual float Read()
MikamiUitOpen 0:46d099dfd9d6 48 { return AMP_*((int16_t)myAdc_->DR - 2048); }
MikamiUitOpen 0:46d099dfd9d6 49
MikamiUitOpen 0:46d099dfd9d6 50 // Clear pending IRQ and enable IRQ
MikamiUitOpen 0:46d099dfd9d6 51 void ClearPending_EnableIRQ()
MikamiUitOpen 0:46d099dfd9d6 52 {
MikamiUitOpen 0:46d099dfd9d6 53 NVIC_ClearPendingIRQ(ADC_IRQn);
MikamiUitOpen 0:46d099dfd9d6 54 NVIC_EnableIRQ(ADC_IRQn);
MikamiUitOpen 0:46d099dfd9d6 55 }
MikamiUitOpen 0:46d099dfd9d6 56
MikamiUitOpen 0:46d099dfd9d6 57 // Software start with disable IRQ
MikamiUitOpen 0:46d099dfd9d6 58 virtual void SoftStart()
MikamiUitOpen 0:46d099dfd9d6 59 {
MikamiUitOpen 0:46d099dfd9d6 60 NVIC_DisableIRQ(ADC_IRQn);
MikamiUitOpen 0:46d099dfd9d6 61 myAdc_->CR2 |= ADC_CR2_SWSTART;
MikamiUitOpen 0:46d099dfd9d6 62 }
MikamiUitOpen 0:46d099dfd9d6 63 };
MikamiUitOpen 0:46d099dfd9d6 64 }
MikamiUitOpen 0:46d099dfd9d6 65 #endif // ADC_INTERRUPT_HPP