Class library for internal ADC and DAC connected by SPI. ADC is triggered by TIM2. This library support clock generator using TIM3 for switched-capacitor filter to smooth output signal of DAC. This library includes derivative class to support interrupt occured in end of AD conversion. Slave select of SPI for DAC is generated using TIM4. 内蔵 ADC と,SPI 接続の DAC のためのクラスライブラリ.ADC の変換開始トリガは TIM2 で発生.DAC の出力信号を平滑化するためのスイッチトキャパシタフィルタ用のクロックは TIM3 を使用.DAC の SPI 用スレーブ選択信号は TIM4 で発生.
Dependents: UITDSP_ADDA_Example2
ADC_Interrupt.hpp@1:e997f4e94491, 2015-03-16 (annotated)
- Committer:
- MikamiUitOpen
- Date:
- Mon Mar 16 23:59:49 2015 +0000
- Revision:
- 1:e997f4e94491
- Parent:
- 0:46d099dfd9d6
2
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
MikamiUitOpen | 0:46d099dfd9d6 | 1 | //------------------------------------------------------ |
MikamiUitOpen | 1:e997f4e94491 | 2 | // Derived class of InternalADC for use interrupt |
MikamiUitOpen | 0:46d099dfd9d6 | 3 | // |
MikamiUitOpen | 1:e997f4e94491 | 4 | // 2015/01/27, Copyright (c) 2015 MIKAMI, Naoki |
MikamiUitOpen | 0:46d099dfd9d6 | 5 | //------------------------------------------------------ |
MikamiUitOpen | 0:46d099dfd9d6 | 6 | |
MikamiUitOpen | 0:46d099dfd9d6 | 7 | #ifndef ADC_INTERRUPT_HPP |
MikamiUitOpen | 0:46d099dfd9d6 | 8 | #define ADC_INTERRUPT_HPP |
MikamiUitOpen | 0:46d099dfd9d6 | 9 | |
MikamiUitOpen | 1:e997f4e94491 | 10 | #include "InternalADC.hpp" |
MikamiUitOpen | 0:46d099dfd9d6 | 11 | |
MikamiUitOpen | 0:46d099dfd9d6 | 12 | namespace Mikami |
MikamiUitOpen | 0:46d099dfd9d6 | 13 | { |
MikamiUitOpen | 1:e997f4e94491 | 14 | class ADC_Intr : public InternalADC |
MikamiUitOpen | 0:46d099dfd9d6 | 15 | { |
MikamiUitOpen | 0:46d099dfd9d6 | 16 | private: |
MikamiUitOpen | 0:46d099dfd9d6 | 17 | // for inhibition of copy constructor |
MikamiUitOpen | 0:46d099dfd9d6 | 18 | ADC_Intr(const ADC_Intr&); |
MikamiUitOpen | 0:46d099dfd9d6 | 19 | // for inhibition of substitute operator |
MikamiUitOpen | 0:46d099dfd9d6 | 20 | ADC_Intr& operator=(const ADC_Intr&); |
MikamiUitOpen | 0:46d099dfd9d6 | 21 | |
MikamiUitOpen | 0:46d099dfd9d6 | 22 | public: |
MikamiUitOpen | 1:e997f4e94491 | 23 | ADC_Intr(PinName pin1, PinName pin2 = NC, PinName pin3 = NC) |
MikamiUitOpen | 1:e997f4e94491 | 24 | : InternalADC(pin1, pin2, pin3) |
MikamiUitOpen | 1:e997f4e94491 | 25 | { myAdc_->CR1 |= ADC_CR1_EOCIE; } // EOC interrupt enable |
MikamiUitOpen | 0:46d099dfd9d6 | 26 | |
MikamiUitOpen | 0:46d099dfd9d6 | 27 | // Set interrupt vector and enable IRQ of ADC |
MikamiUitOpen | 0:46d099dfd9d6 | 28 | void SetIntrVec(void (*Func)()) |
MikamiUitOpen | 0:46d099dfd9d6 | 29 | { |
MikamiUitOpen | 0:46d099dfd9d6 | 30 | NVIC_SetVector(ADC_IRQn, (uint32_t)Func); // See "cmsis_nvic.h" |
MikamiUitOpen | 0:46d099dfd9d6 | 31 | NVIC_EnableIRQ(ADC_IRQn); // See "core_cm4.h" |
MikamiUitOpen | 0:46d099dfd9d6 | 32 | } |
MikamiUitOpen | 0:46d099dfd9d6 | 33 | |
MikamiUitOpen | 0:46d099dfd9d6 | 34 | // Read ADC, range: [0, 0x0FFF] |
MikamiUitOpen | 0:46d099dfd9d6 | 35 | virtual uint16_t Read_u16() |
MikamiUitOpen | 0:46d099dfd9d6 | 36 | { return myAdc_->DR; } |
MikamiUitOpen | 0:46d099dfd9d6 | 37 | |
MikamiUitOpen | 0:46d099dfd9d6 | 38 | // Read ADC, range: [0, 0x0FFF] |
MikamiUitOpen | 1:e997f4e94491 | 39 | uint16_t ReadWait_u16() |
MikamiUitOpen | 0:46d099dfd9d6 | 40 | { |
MikamiUitOpen | 0:46d099dfd9d6 | 41 | WaitDone(); |
MikamiUitOpen | 0:46d099dfd9d6 | 42 | return myAdc_->DR; |
MikamiUitOpen | 0:46d099dfd9d6 | 43 | } |
MikamiUitOpen | 0:46d099dfd9d6 | 44 | |
MikamiUitOpen | 0:46d099dfd9d6 | 45 | // Read ADC, range: [-1.0f, 1.0f] |
MikamiUitOpen | 0:46d099dfd9d6 | 46 | virtual float Read() |
MikamiUitOpen | 0:46d099dfd9d6 | 47 | { return AMP_*((int16_t)myAdc_->DR - 2048); } |
MikamiUitOpen | 0:46d099dfd9d6 | 48 | |
MikamiUitOpen | 0:46d099dfd9d6 | 49 | // Clear pending IRQ and enable IRQ |
MikamiUitOpen | 0:46d099dfd9d6 | 50 | void ClearPending_EnableIRQ() |
MikamiUitOpen | 0:46d099dfd9d6 | 51 | { |
MikamiUitOpen | 0:46d099dfd9d6 | 52 | NVIC_ClearPendingIRQ(ADC_IRQn); |
MikamiUitOpen | 0:46d099dfd9d6 | 53 | NVIC_EnableIRQ(ADC_IRQn); |
MikamiUitOpen | 0:46d099dfd9d6 | 54 | } |
MikamiUitOpen | 0:46d099dfd9d6 | 55 | |
MikamiUitOpen | 0:46d099dfd9d6 | 56 | // Software start with disable IRQ |
MikamiUitOpen | 1:e997f4e94491 | 57 | void SoftStartDisableIRQ() |
MikamiUitOpen | 0:46d099dfd9d6 | 58 | { |
MikamiUitOpen | 0:46d099dfd9d6 | 59 | NVIC_DisableIRQ(ADC_IRQn); |
MikamiUitOpen | 0:46d099dfd9d6 | 60 | myAdc_->CR2 |= ADC_CR2_SWSTART; |
MikamiUitOpen | 0:46d099dfd9d6 | 61 | } |
MikamiUitOpen | 0:46d099dfd9d6 | 62 | }; |
MikamiUitOpen | 0:46d099dfd9d6 | 63 | } |
MikamiUitOpen | 0:46d099dfd9d6 | 64 | #endif // ADC_INTERRUPT_HPP |
MikamiUitOpen | 1:e997f4e94491 | 65 |