Test of the Nucleo boards standby mode. sleep() and deepsleep() use the STM32 SLEEP and STOP modes. This uses the 3rd low power mode STANDBY. Utilises the WakeUp code here: https://developer.mbed.org/users/Sissors/code/WakeUp/ Adds a ClearWakeUp so that Standby can be entered repeatedly.
main.cpp@0:1ecaa40f74d0, 2016-05-07 (annotated)
- Committer:
- MichaelW
- Date:
- Sat May 07 11:51:56 2016 +0000
- Revision:
- 0:1ecaa40f74d0
- Child:
- 1:085a87258f10
Working Code
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
MichaelW | 0:1ecaa40f74d0 | 1 | // Depending on the LED connections either the LED is off the 2 seconds |
MichaelW | 0:1ecaa40f74d0 | 2 | // the target spends in deepsleep(), and on for the other second. Or it is inverted |
MichaelW | 0:1ecaa40f74d0 | 3 | |
MichaelW | 0:1ecaa40f74d0 | 4 | |
MichaelW | 0:1ecaa40f74d0 | 5 | #include "mbed.h" |
MichaelW | 0:1ecaa40f74d0 | 6 | #include "WakeUp.h" |
MichaelW | 0:1ecaa40f74d0 | 7 | #include "stm32f0xx_hal.h" |
MichaelW | 0:1ecaa40f74d0 | 8 | #include "stm32f0xx_hal_rtc_ex.h" |
MichaelW | 0:1ecaa40f74d0 | 9 | #include "rtc_wakeup.h" |
MichaelW | 0:1ecaa40f74d0 | 10 | |
MichaelW | 0:1ecaa40f74d0 | 11 | #define RTC_CR_WUTE (1<<10) |
MichaelW | 0:1ecaa40f74d0 | 12 | #define RTC_CR_WUTIE (1<<14) |
MichaelW | 0:1ecaa40f74d0 | 13 | #define EXTI_IMR_MR20 0x00100000 |
MichaelW | 0:1ecaa40f74d0 | 14 | |
MichaelW | 0:1ecaa40f74d0 | 15 | |
MichaelW | 0:1ecaa40f74d0 | 16 | DigitalOut myled(LED1); |
MichaelW | 0:1ecaa40f74d0 | 17 | DigitalOut Buzz(A2); |
MichaelW | 0:1ecaa40f74d0 | 18 | DigitalOut RST(D0); |
MichaelW | 0:1ecaa40f74d0 | 19 | |
MichaelW | 0:1ecaa40f74d0 | 20 | static RTC_HandleTypeDef RtcHandle; |
MichaelW | 0:1ecaa40f74d0 | 21 | |
MichaelW | 0:1ecaa40f74d0 | 22 | void ClearWakeUp(void); |
MichaelW | 0:1ecaa40f74d0 | 23 | |
MichaelW | 0:1ecaa40f74d0 | 24 | int main() |
MichaelW | 0:1ecaa40f74d0 | 25 | { |
MichaelW | 0:1ecaa40f74d0 | 26 | ClearWakeUp(); |
MichaelW | 0:1ecaa40f74d0 | 27 | RST = 1; |
MichaelW | 0:1ecaa40f74d0 | 28 | Buzz = 0; |
MichaelW | 0:1ecaa40f74d0 | 29 | myled = 1; |
MichaelW | 0:1ecaa40f74d0 | 30 | wait(0.2); |
MichaelW | 0:1ecaa40f74d0 | 31 | myled = 0; |
MichaelW | 0:1ecaa40f74d0 | 32 | wait(0.2); |
MichaelW | 0:1ecaa40f74d0 | 33 | //print("Wake %i\r\n", TM_LOWPOWER_StandbyReset() ); |
MichaelW | 0:1ecaa40f74d0 | 34 | //The low-power oscillator can be quite inaccurate on some targets |
MichaelW | 0:1ecaa40f74d0 | 35 | //this function calibrates it against the main clock |
MichaelW | 0:1ecaa40f74d0 | 36 | WakeUp::calibrate(); |
MichaelW | 0:1ecaa40f74d0 | 37 | |
MichaelW | 0:1ecaa40f74d0 | 38 | |
MichaelW | 0:1ecaa40f74d0 | 39 | |
MichaelW | 0:1ecaa40f74d0 | 40 | //RCC_APB1PeriphResetCmd(RCC_APB1Periph_PWR, DISABLE); //Need write access to DBP bit |
MichaelW | 0:1ecaa40f74d0 | 41 | |
MichaelW | 0:1ecaa40f74d0 | 42 | //__HAL_RCC_PWR_CLK_ENABLE(); |
MichaelW | 0:1ecaa40f74d0 | 43 | //PWR->CR |= PWR_CR_DBP; |
MichaelW | 0:1ecaa40f74d0 | 44 | //SET_BIT(PWR->CR, PWR_CR_DBP); |
MichaelW | 0:1ecaa40f74d0 | 45 | /* //Wait for Backup domain Write protection disable |
MichaelW | 0:1ecaa40f74d0 | 46 | uint32_t tickstart = HAL_GetTick(); |
MichaelW | 0:1ecaa40f74d0 | 47 | |
MichaelW | 0:1ecaa40f74d0 | 48 | |
MichaelW | 0:1ecaa40f74d0 | 49 | while((PWR->CR & PWR_CR_DBP) == RESET) |
MichaelW | 0:1ecaa40f74d0 | 50 | { |
MichaelW | 0:1ecaa40f74d0 | 51 | if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) |
MichaelW | 0:1ecaa40f74d0 | 52 | { |
MichaelW | 0:1ecaa40f74d0 | 53 | return HAL_TIMEOUT; |
MichaelW | 0:1ecaa40f74d0 | 54 | } |
MichaelW | 0:1ecaa40f74d0 | 55 | } |
MichaelW | 0:1ecaa40f74d0 | 56 | */ |
MichaelW | 0:1ecaa40f74d0 | 57 | /* |
MichaelW | 0:1ecaa40f74d0 | 58 | HAL_PWR_EnableBkUpAccess(); |
MichaelW | 0:1ecaa40f74d0 | 59 | |
MichaelW | 0:1ecaa40f74d0 | 60 | RtcHandle.Instance = RTC; |
MichaelW | 0:1ecaa40f74d0 | 61 | __HAL_RTC_WRITEPROTECTION_DISABLE(&RtcHandle); |
MichaelW | 0:1ecaa40f74d0 | 62 | |
MichaelW | 0:1ecaa40f74d0 | 63 | __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); |
MichaelW | 0:1ecaa40f74d0 | 64 | __HAL_RTC_ALARM_CLEAR_FLAG(&RtcHandle, RTC_FLAG_ALRAF); |
MichaelW | 0:1ecaa40f74d0 | 65 | __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&RtcHandle, RTC_FLAG_WUTF); |
MichaelW | 0:1ecaa40f74d0 | 66 | //__HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() ; |
MichaelW | 0:1ecaa40f74d0 | 67 | |
MichaelW | 0:1ecaa40f74d0 | 68 | // __HAL_RCC_BACKUPRESET_FORCE(); |
MichaelW | 0:1ecaa40f74d0 | 69 | //__HAL_RCC_BACKUPRESET_FORCE(); |
MichaelW | 0:1ecaa40f74d0 | 70 | |
MichaelW | 0:1ecaa40f74d0 | 71 | __HAL_RTC_WRITEPROTECTION_ENABLE(&RtcHandle); |
MichaelW | 0:1ecaa40f74d0 | 72 | |
MichaelW | 0:1ecaa40f74d0 | 73 | */ |
MichaelW | 0:1ecaa40f74d0 | 74 | |
MichaelW | 0:1ecaa40f74d0 | 75 | ///Direct register access version *************************************************** |
MichaelW | 0:1ecaa40f74d0 | 76 | |
MichaelW | 0:1ecaa40f74d0 | 77 | // ClearWakeUp(); |
MichaelW | 0:1ecaa40f74d0 | 78 | |
MichaelW | 0:1ecaa40f74d0 | 79 | //RCC_APB1PeriphCmd(RCC_APB1Periph_PWR, ENABLE); |
MichaelW | 0:1ecaa40f74d0 | 80 | |
MichaelW | 0:1ecaa40f74d0 | 81 | // __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB); |
MichaelW | 0:1ecaa40f74d0 | 82 | //From Below works *************************************************** |
MichaelW | 0:1ecaa40f74d0 | 83 | |
MichaelW | 0:1ecaa40f74d0 | 84 | WakeUp::set_ms(2000); |
MichaelW | 0:1ecaa40f74d0 | 85 | |
MichaelW | 0:1ecaa40f74d0 | 86 | //Enter deepsleep, the program won't go beyond this point until it is woken up |
MichaelW | 0:1ecaa40f74d0 | 87 | //deepsleep(); |
MichaelW | 0:1ecaa40f74d0 | 88 | |
MichaelW | 0:1ecaa40f74d0 | 89 | printf("Standby Mode\r\n"); |
MichaelW | 0:1ecaa40f74d0 | 90 | |
MichaelW | 0:1ecaa40f74d0 | 91 | ClearWakeUp(); |
MichaelW | 0:1ecaa40f74d0 | 92 | |
MichaelW | 0:1ecaa40f74d0 | 93 | HAL_PWR_EnterSTANDBYMode(); |
MichaelW | 0:1ecaa40f74d0 | 94 | |
MichaelW | 0:1ecaa40f74d0 | 95 | //This will never be executed |
MichaelW | 0:1ecaa40f74d0 | 96 | printf("After sleep\r\n"); |
MichaelW | 0:1ecaa40f74d0 | 97 | } |
MichaelW | 0:1ecaa40f74d0 | 98 | void ClearWakeUp(void){ |
MichaelW | 0:1ecaa40f74d0 | 99 | PWR->CR |= PWR_CR_DBP; //Enable power domain |
MichaelW | 0:1ecaa40f74d0 | 100 | RTC->WPR = 0xCA; //Disable RTC write protection |
MichaelW | 0:1ecaa40f74d0 | 101 | RTC->WPR = 0x53; |
MichaelW | 0:1ecaa40f74d0 | 102 | |
MichaelW | 0:1ecaa40f74d0 | 103 | __HAL_PWR_CLEAR_FLAG(PWR_FLAG_WU); |
MichaelW | 0:1ecaa40f74d0 | 104 | __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB); |
MichaelW | 0:1ecaa40f74d0 | 105 | |
MichaelW | 0:1ecaa40f74d0 | 106 | RTC->WPR = 0xFF; //Enable RTC write protection |
MichaelW | 0:1ecaa40f74d0 | 107 | PWR->CR &= ~PWR_CR_DBP; //Disable power domain |
MichaelW | 0:1ecaa40f74d0 | 108 | } |
MichaelW | 0:1ecaa40f74d0 | 109 | |
MichaelW | 0:1ecaa40f74d0 | 110 | void ClearWakeUp2(void) |
MichaelW | 0:1ecaa40f74d0 | 111 | { |
MichaelW | 0:1ecaa40f74d0 | 112 | ///Direct register access version *************************************************** |
MichaelW | 0:1ecaa40f74d0 | 113 | RtcHandle.Instance = RTC; |
MichaelW | 0:1ecaa40f74d0 | 114 | |
MichaelW | 0:1ecaa40f74d0 | 115 | __HAL_RTC_WAKEUPTIMER_DISABLE(&RtcHandle); |
MichaelW | 0:1ecaa40f74d0 | 116 | __HAL_RTC_WAKEUPTIMER_DISABLE_IT(&RtcHandle,RTC_IT_WUT); |
MichaelW | 0:1ecaa40f74d0 | 117 | |
MichaelW | 0:1ecaa40f74d0 | 118 | PWR->CR |= PWR_CR_DBP; //Enable power domain //******************* |
MichaelW | 0:1ecaa40f74d0 | 119 | RTC->WPR = 0xCA; //Disable RTC write protection |
MichaelW | 0:1ecaa40f74d0 | 120 | RTC->WPR = 0x53; |
MichaelW | 0:1ecaa40f74d0 | 121 | |
MichaelW | 0:1ecaa40f74d0 | 122 | __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() ; |
MichaelW | 0:1ecaa40f74d0 | 123 | __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_EVENT() ; |
MichaelW | 0:1ecaa40f74d0 | 124 | |
MichaelW | 0:1ecaa40f74d0 | 125 | /* Disable the Alarm A interrupt */ |
MichaelW | 0:1ecaa40f74d0 | 126 | __HAL_RTC_ALARMA_DISABLE(&RtcHandle); |
MichaelW | 0:1ecaa40f74d0 | 127 | |
MichaelW | 0:1ecaa40f74d0 | 128 | /* Clear flag alarm A */ |
MichaelW | 0:1ecaa40f74d0 | 129 | __HAL_RTC_ALARM_CLEAR_FLAG(&RtcHandle, RTC_FLAG_ALRAF); |
MichaelW | 0:1ecaa40f74d0 | 130 | |
MichaelW | 0:1ecaa40f74d0 | 131 | __HAL_RTC_ALARM_EXTI_CLEAR_FLAG(); |
MichaelW | 0:1ecaa40f74d0 | 132 | __HAL_RTC_ALARM_CLEAR_FLAG(&RtcHandle, RTC_FLAG_ALRAF); |
MichaelW | 0:1ecaa40f74d0 | 133 | __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&RtcHandle, RTC_FLAG_WUTF); |
MichaelW | 0:1ecaa40f74d0 | 134 | |
MichaelW | 0:1ecaa40f74d0 | 135 | // #define __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = RTC_EXTI_LINE_WAKEUPTIMER_EVENT) |
MichaelW | 0:1ecaa40f74d0 | 136 | __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() ; |
MichaelW | 0:1ecaa40f74d0 | 137 | |
MichaelW | 0:1ecaa40f74d0 | 138 | EXTI->PR = RTC_EXTI_LINE_WAKEUPTIMER_EVENT ; |
MichaelW | 0:1ecaa40f74d0 | 139 | EXTI->PR = 0x007FFFFF; |
MichaelW | 0:1ecaa40f74d0 | 140 | RTC->WPR = 0xFF; //Enable RTC write protection |
MichaelW | 0:1ecaa40f74d0 | 141 | PWR->CR &= ~PWR_CR_DBP; //Disable power domain |
MichaelW | 0:1ecaa40f74d0 | 142 | |
MichaelW | 0:1ecaa40f74d0 | 143 | } |