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Interrupts and flags management functions
Functions

Interrupts and flags management functions
[DMA_Private_Functions]

Interrupts and flags management functions. More...

Functions

void DMA_ITConfig (DMA_Channel_TypeDef *DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState)
 Enables or disables the specified DMAy Channelx interrupts.
FlagStatus DMA_GetFlagStatus (uint32_t DMAy_FLAG)
 Checks whether the specified DMAy Channelx flag is set or not.
void DMA_ClearFlag (uint32_t DMAy_FLAG)
 Clears the DMAy Channelx's pending flags.
ITStatus DMA_GetITStatus (uint32_t DMAy_IT)
 Checks whether the specified DMAy Channelx interrupt has occurred or not.
void DMA_ClearITPendingBit (uint32_t DMAy_IT)
 Clears the DMAy Channelx's interrupt pending bits.

Detailed Description

Interrupts and flags management functions. 

 ===============================================================================
          ##### Interrupts and flags management functions #####
 ===============================================================================
    [..] This subsection provides functions allowing to configure the DMA Interrupt 
         sources and check or clear the flags or pending bits status.
         The user should identify which mode will be used in his application to manage 
         the DMA controller events: Polling mode or Interrupt mode. 
  
  *** Polling Mode ***
  ====================
    [..] Each DMA channel can be managed through 4 event Flags (y : DMA Controller 
         number, x : DMA channel number):
         (#) DMAy_FLAG_TCx : to indicate that a Transfer Complete event occurred.
         (#) DMAy_FLAG_HTx : to indicate that a Half-Transfer Complete event occurred.
         (#) DMAy_FLAG_TEx : to indicate that a Transfer Error occurred.
         (#) DMAy_FLAG_GLx : to indicate that at least one of the events described 
             above occurred.
    [..]         
    (@) Clearing DMAy_FLAG_GLx results in clearing all other pending flags of the 
        same channel (DMAy_FLAG_TCx, DMAy_FLAG_HTx and DMAy_FLAG_TEx).
    [..] In this Mode it is advised to use the following functions:
         (+) FlagStatus DMA_GetFlagStatus(uint32_t DMA_FLAG);
         (+) void DMA_ClearFlag(uint32_t DMA_FLAG);

  *** Interrupt Mode ***
  ======================
    [..] Each DMA channel can be managed through 4 Interrupts:
    (+) Interrupt Source
       (##) DMA_IT_TC: specifies the interrupt source for the Transfer Complete 
            event.
       (##) DMA_IT_HT: specifies the interrupt source for the Half-transfer Complete 
            event.
       (##) DMA_IT_TE: specifies the interrupt source for the transfer errors event.
       (##) DMA_IT_GL: to indicate that at least one of the interrupts described 
            above occurred.
    -@@- Clearing DMA_IT_GL interrupt results in clearing all other interrupts of 
         the same channel (DMA_IT_TCx, DMA_IT_HT and DMA_IT_TE).
    [..] In this Mode it is advised to use the following functions:
         (+) void DMA_ITConfig(DMA_Channel_TypeDef* DMAy_Channelx, uint32_t DMA_IT, FunctionalState NewState);
         (+) ITStatus DMA_GetITStatus(uint32_t DMA_IT);
         (+) void DMA_ClearITPendingBit(uint32_t DMA_IT);

Function Documentation

void DMA_ClearFlag ( uint32_t  DMAy_FLAG )

Clears the DMAy Channelx's pending flags.

Parameters:
DMAy_FLAG,:specifies the flag to clear. This parameter can be any combination (for the same DMA) of the following values:

  • DMA1_FLAG_GL1: DMA1 Channel1 global flag.
  • DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
  • DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
  • DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
  • DMA1_FLAG_GL2: DMA1 Channel2 global flag.
  • DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
  • DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
  • DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
  • DMA1_FLAG_GL3: DMA1 Channel3 global flag.
  • DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
  • DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
  • DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
  • DMA1_FLAG_GL4: DMA1 Channel4 global flag.
  • DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
  • DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
  • DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
  • DMA1_FLAG_GL5: DMA1 Channel5 global flag.
  • DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
  • DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
  • DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
  • DMA1_FLAG_GL6: DMA1 Channel6 global flag.
  • DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag.
  • DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag.
  • DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag.
  • DMA1_FLAG_GL7: DMA1 Channel7 global flag.
  • DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag.
  • DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag.
  • DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag.
  • DMA2_FLAG_GL1: DMA2 Channel1 global flag.
  • DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag.
  • DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag.
  • DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag.
  • DMA2_FLAG_GL2: DMA2 Channel2 global flag.
  • DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag.
  • DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag.
  • DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag.
  • DMA2_FLAG_GL3: DMA2 Channel3 global flag.
  • DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag.
  • DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag.
  • DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag.
  • DMA2_FLAG_GL4: DMA2 Channel4 global flag.
  • DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag.
  • DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag.
  • DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag.
  • DMA2_FLAG_GL5: DMA2 Channel5 global flag.
  • DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag.
  • DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag.
  • DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag.
Note:
Clearing the Global flag (DMAy_FLAG_GLx) results in clearing all other flags relative to the same channel (Transfer Complete, Half-transfer Complete and Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx and DMAy_FLAG_TEx).
Return values:
None

Definition at line 657 of file stm32f30x_dma.c.

void DMA_ClearITPendingBit ( uint32_t  DMAy_IT )

Clears the DMAy Channelx's interrupt pending bits.

Parameters:
DMAy_IT,:specifies the DMAy interrupt pending bit to clear. This parameter can be any combination (for the same DMA) of the following values:

  • DMA1_IT_GL1: DMA1 Channel1 global interrupt.
  • DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
  • DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
  • DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
  • DMA1_IT_GL2: DMA1 Channel2 global interrupt.
  • DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
  • DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
  • DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
  • DMA1_IT_GL3: DMA1 Channel3 global interrupt.
  • DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
  • DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
  • DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
  • DMA1_IT_GL4: DMA1 Channel4 global interrupt.
  • DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
  • DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
  • DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
  • DMA1_IT_GL5: DMA1 Channel5 global interrupt.
  • DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
  • DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
  • DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
  • DMA1_IT_GL6: DMA1 Channel6 global interrupt.
  • DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt.
  • DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt.
  • DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt.
  • DMA1_IT_GL7: DMA1 Channel7 global interrupt.
  • DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt.
  • DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt.
  • DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt.
  • DMA2_IT_GL1: DMA2 Channel1 global interrupt.
  • DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt.
  • DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt.
  • DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt.
  • DMA2_IT_GL2: DMA2 Channel2 global interrupt.
  • DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt.
  • DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt.
  • DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt.
  • DMA2_IT_GL3: DMA2 Channel3 global interrupt.
  • DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt.
  • DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt.
  • DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt.
  • DMA2_IT_GL4: DMA2 Channel4 global interrupt.
  • DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt.
  • DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt.
  • DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt.
  • DMA2_IT_GL5: DMA2 Channel5 global interrupt.
  • DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt.
  • DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt.
  • DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt.
Note:
Clearing the Global interrupt (DMAy_IT_GLx) results in clearing all other interrupts relative to the same channel (Transfer Complete, Half-transfer Complete and Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx and DMAy_IT_TEx).
Return values:
None

Definition at line 832 of file stm32f30x_dma.c.

FlagStatus DMA_GetFlagStatus ( uint32_t  DMAy_FLAG )

Checks whether the specified DMAy Channelx flag is set or not.

Parameters:
DMAy_FLAG,:specifies the flag to check. This parameter can be one of the following values:

  • DMA1_FLAG_GL1: DMA1 Channel1 global flag.
  • DMA1_FLAG_TC1: DMA1 Channel1 transfer complete flag.
  • DMA1_FLAG_HT1: DMA1 Channel1 half transfer flag.
  • DMA1_FLAG_TE1: DMA1 Channel1 transfer error flag.
  • DMA1_FLAG_GL2: DMA1 Channel2 global flag.
  • DMA1_FLAG_TC2: DMA1 Channel2 transfer complete flag.
  • DMA1_FLAG_HT2: DMA1 Channel2 half transfer flag.
  • DMA1_FLAG_TE2: DMA1 Channel2 transfer error flag.
  • DMA1_FLAG_GL3: DMA1 Channel3 global flag.
  • DMA1_FLAG_TC3: DMA1 Channel3 transfer complete flag.
  • DMA1_FLAG_HT3: DMA1 Channel3 half transfer flag.
  • DMA1_FLAG_TE3: DMA1 Channel3 transfer error flag.
  • DMA1_FLAG_GL4: DMA1 Channel4 global flag.
  • DMA1_FLAG_TC4: DMA1 Channel4 transfer complete flag.
  • DMA1_FLAG_HT4: DMA1 Channel4 half transfer flag.
  • DMA1_FLAG_TE4: DMA1 Channel4 transfer error flag.
  • DMA1_FLAG_GL5: DMA1 Channel5 global flag.
  • DMA1_FLAG_TC5: DMA1 Channel5 transfer complete flag.
  • DMA1_FLAG_HT5: DMA1 Channel5 half transfer flag.
  • DMA1_FLAG_TE5: DMA1 Channel5 transfer error flag.
  • DMA1_FLAG_GL6: DMA1 Channel6 global flag.
  • DMA1_FLAG_TC6: DMA1 Channel6 transfer complete flag.
  • DMA1_FLAG_HT6: DMA1 Channel6 half transfer flag.
  • DMA1_FLAG_TE6: DMA1 Channel6 transfer error flag.
  • DMA1_FLAG_GL7: DMA1 Channel7 global flag.
  • DMA1_FLAG_TC7: DMA1 Channel7 transfer complete flag.
  • DMA1_FLAG_HT7: DMA1 Channel7 half transfer flag.
  • DMA1_FLAG_TE7: DMA1 Channel7 transfer error flag.
  • DMA2_FLAG_GL1: DMA2 Channel1 global flag.
  • DMA2_FLAG_TC1: DMA2 Channel1 transfer complete flag.
  • DMA2_FLAG_HT1: DMA2 Channel1 half transfer flag.
  • DMA2_FLAG_TE1: DMA2 Channel1 transfer error flag.
  • DMA2_FLAG_GL2: DMA2 Channel2 global flag.
  • DMA2_FLAG_TC2: DMA2 Channel2 transfer complete flag.
  • DMA2_FLAG_HT2: DMA2 Channel2 half transfer flag.
  • DMA2_FLAG_TE2: DMA2 Channel2 transfer error flag.
  • DMA2_FLAG_GL3: DMA2 Channel3 global flag.
  • DMA2_FLAG_TC3: DMA2 Channel3 transfer complete flag.
  • DMA2_FLAG_HT3: DMA2 Channel3 half transfer flag.
  • DMA2_FLAG_TE3: DMA2 Channel3 transfer error flag.
  • DMA2_FLAG_GL4: DMA2 Channel4 global flag.
  • DMA2_FLAG_TC4: DMA2 Channel4 transfer complete flag.
  • DMA2_FLAG_HT4: DMA2 Channel4 half transfer flag.
  • DMA2_FLAG_TE4: DMA2 Channel4 transfer error flag.
  • DMA2_FLAG_GL5: DMA2 Channel5 global flag.
  • DMA2_FLAG_TC5: DMA2 Channel5 transfer complete flag.
  • DMA2_FLAG_HT5: DMA2 Channel5 half transfer flag.
  • DMA2_FLAG_TE5: DMA2 Channel5 transfer error flag.
Note:
The Global flag (DMAy_FLAG_GLx) is set whenever any of the other flags relative to the same channel is set (Transfer Complete, Half-transfer Complete or Transfer Error flags: DMAy_FLAG_TCx, DMAy_FLAG_HTx or DMAy_FLAG_TEx).
Return values:
Thenew state of DMAy_FLAG (SET or RESET).

Definition at line 561 of file stm32f30x_dma.c.

ITStatus DMA_GetITStatus ( uint32_t  DMAy_IT )

Checks whether the specified DMAy Channelx interrupt has occurred or not.

Parameters:
DMAy_IT,:specifies the DMAy interrupt source to check. This parameter can be one of the following values:

  • DMA1_IT_GL1: DMA1 Channel1 global interrupt.
  • DMA1_IT_TC1: DMA1 Channel1 transfer complete interrupt.
  • DMA1_IT_HT1: DMA1 Channel1 half transfer interrupt.
  • DMA1_IT_TE1: DMA1 Channel1 transfer error interrupt.
  • DMA1_IT_GL2: DMA1 Channel2 global interrupt.
  • DMA1_IT_TC2: DMA1 Channel2 transfer complete interrupt.
  • DMA1_IT_HT2: DMA1 Channel2 half transfer interrupt.
  • DMA1_IT_TE2: DMA1 Channel2 transfer error interrupt.
  • DMA1_IT_GL3: DMA1 Channel3 global interrupt.
  • DMA1_IT_TC3: DMA1 Channel3 transfer complete interrupt.
  • DMA1_IT_HT3: DMA1 Channel3 half transfer interrupt.
  • DMA1_IT_TE3: DMA1 Channel3 transfer error interrupt.
  • DMA1_IT_GL4: DMA1 Channel4 global interrupt.
  • DMA1_IT_TC4: DMA1 Channel4 transfer complete interrupt.
  • DMA1_IT_HT4: DMA1 Channel4 half transfer interrupt.
  • DMA1_IT_TE4: DMA1 Channel4 transfer error interrupt.
  • DMA1_IT_GL5: DMA1 Channel5 global interrupt.
  • DMA1_IT_TC5: DMA1 Channel5 transfer complete interrupt.
  • DMA1_IT_HT5: DMA1 Channel5 half transfer interrupt.
  • DMA1_IT_TE5: DMA1 Channel5 transfer error interrupt.
  • DMA1_IT_GL6: DMA1 Channel6 global interrupt.
  • DMA1_IT_TC6: DMA1 Channel6 transfer complete interrupt.
  • DMA1_IT_HT6: DMA1 Channel6 half transfer interrupt.
  • DMA1_IT_TE6: DMA1 Channel6 transfer error interrupt.
  • DMA1_IT_GL7: DMA1 Channel7 global interrupt.
  • DMA1_IT_TC7: DMA1 Channel7 transfer complete interrupt.
  • DMA1_IT_HT7: DMA1 Channel7 half transfer interrupt.
  • DMA1_IT_TE7: DMA1 Channel7 transfer error interrupt.
  • DMA2_IT_GL1: DMA2 Channel1 global interrupt.
  • DMA2_IT_TC1: DMA2 Channel1 transfer complete interrupt.
  • DMA2_IT_HT1: DMA2 Channel1 half transfer interrupt.
  • DMA2_IT_TE1: DMA2 Channel1 transfer error interrupt.
  • DMA2_IT_GL2: DMA2 Channel2 global interrupt.
  • DMA2_IT_TC2: DMA2 Channel2 transfer complete interrupt.
  • DMA2_IT_HT2: DMA2 Channel2 half transfer interrupt.
  • DMA2_IT_TE2: DMA2 Channel2 transfer error interrupt.
  • DMA2_IT_GL3: DMA2 Channel3 global interrupt.
  • DMA2_IT_TC3: DMA2 Channel3 transfer complete interrupt.
  • DMA2_IT_HT3: DMA2 Channel3 half transfer interrupt.
  • DMA2_IT_TE3: DMA2 Channel3 transfer error interrupt.
  • DMA2_IT_GL4: DMA2 Channel4 global interrupt.
  • DMA2_IT_TC4: DMA2 Channel4 transfer complete interrupt.
  • DMA2_IT_HT4: DMA2 Channel4 half transfer interrupt.
  • DMA2_IT_TE4: DMA2 Channel4 transfer error interrupt.
  • DMA2_IT_GL5: DMA2 Channel5 global interrupt.
  • DMA2_IT_TC5: DMA2 Channel5 transfer complete interrupt.
  • DMA2_IT_HT5: DMA2 Channel5 half transfer interrupt.
  • DMA2_IT_TE5: DMA2 Channel5 transfer error interrupt.
Note:
The Global interrupt (DMAy_FLAG_GLx) is set whenever any of the other interrupts relative to the same channel is set (Transfer Complete, Half-transfer Complete or Transfer Error interrupts: DMAy_IT_TCx, DMAy_IT_HTx or DMAy_IT_TEx).
Return values:
Thenew state of DMAy_IT (SET or RESET).

Definition at line 736 of file stm32f30x_dma.c.

void DMA_ITConfig ( DMA_Channel_TypeDef *  DMAy_Channelx,
uint32_t  DMA_IT,
FunctionalState  NewState 
)

Enables or disables the specified DMAy Channelx interrupts.

Parameters:
DMAy_Channelx,:where y can be 1 or 2 to select the DMA and x can be 1 to 7 for DMA1 and 1 to 5 for DMA2 to select the DMA Channel.
DMA_IT,:specifies the DMA interrupts sources to be enabled or disabled. This parameter can be any combination of the following values:

  • DMA_IT_TC: Transfer complete interrupt mask
  • DMA_IT_HT: Half transfer interrupt mask
  • DMA_IT_TE: Transfer error interrupt mask
NewState,:new state of the specified DMA interrupts. This parameter can be: ENABLE or DISABLE.
Return values:
None

Definition at line 481 of file stm32f30x_dma.c.

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