Toyomasa Watarai / FM25W256

Cypress F-RAM FM25W256 library

Dependents:   Hello-FM25W256 Hello-FM25W256

FM25W256.h@1:bb2b1e4bfb6e, 2016-03-05 (annotated)

Committer:
MACRUM
Date:
Sat Mar 05 14:05:39 2016 +0000
Revision:
1:bb2b1e4bfb6e
Parent:
0:5a552209903c
Child:
2:4939ff09bf12
Add write protect functions and more comments

Who changed what in which revision?

UserRevisionLine numberNew contents of line
MACRUM 1:bb2b1e4bfb6e 1 /* Cypress FM25W256 F-RAM component library
MACRUM 1:bb2b1e4bfb6e 2 *
MACRUM 1:bb2b1e4bfb6e 3 * Copyright (c) 2016 ARM Limited
MACRUM 1:bb2b1e4bfb6e 4 *
MACRUM 1:bb2b1e4bfb6e 5 * Licensed under the Apache License, Version 2.0 (the "License");
MACRUM 1:bb2b1e4bfb6e 6 * you may not use this file except in compliance with the License.
MACRUM 1:bb2b1e4bfb6e 7 * You may obtain a copy of the License at
MACRUM 1:bb2b1e4bfb6e 8 *
MACRUM 1:bb2b1e4bfb6e 9 * http://www.apache.org/licenses/LICENSE-2.0
MACRUM 1:bb2b1e4bfb6e 10 *
MACRUM 1:bb2b1e4bfb6e 11 * Unless required by applicable law or agreed to in writing, software
MACRUM 1:bb2b1e4bfb6e 12 * distributed under the License is distributed on an "AS IS" BASIS,
MACRUM 1:bb2b1e4bfb6e 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
MACRUM 1:bb2b1e4bfb6e 14 * See the License for the specific language governing permissions and
MACRUM 1:bb2b1e4bfb6e 15 * limitations under the License.
MACRUM 1:bb2b1e4bfb6e 16 * *
MACRUM 1:bb2b1e4bfb6e 17 * @author Toyomasa Watarai
MACRUM 1:bb2b1e4bfb6e 18 * @version 1.0
MACRUM 1:bb2b1e4bfb6e 19 * @date 5-March-2016
MACRUM 1:bb2b1e4bfb6e 20 *
MACRUM 1:bb2b1e4bfb6e 21 * http://www.cypress.com/products/nonvolatile-ram
MACRUM 1:bb2b1e4bfb6e 22 * http://www.cypress.com/documentation/datasheets/fm25w256-256-kbit-32-k-8-serial-spi-f-ram?source=search&keywords=FM25W256&cat=technical_documents
MACRUM 1:bb2b1e4bfb6e 23 *
MACRUM 1:bb2b1e4bfb6e 24 */
MACRUM 1:bb2b1e4bfb6e 25
MACRUM 0:5a552209903c 26 #include "mbed.h"
MACRUM 0:5a552209903c 27
MACRUM 0:5a552209903c 28 #ifndef __FM25W256_HEAD__
MACRUM 0:5a552209903c 29 #define __FM25W256_HEAD__
MACRUM 0:5a552209903c 30
MACRUM 0:5a552209903c 31 #define CMD_WREN 0x06
MACRUM 0:5a552209903c 32 #define CMD_WRDI 0x04
MACRUM 0:5a552209903c 33 #define CMD_RDSR 0x05
MACRUM 0:5a552209903c 34 #define CMD_WRSR 0x01
MACRUM 0:5a552209903c 35 #define CMD_READ 0x03
MACRUM 0:5a552209903c 36 #define CMD_WRITE 0x02
MACRUM 0:5a552209903c 37
MACRUM 1:bb2b1e4bfb6e 38 #define FM25W256_CLK (20000000) // SPI clock 20MHz
MACRUM 1:bb2b1e4bfb6e 39
MACRUM 1:bb2b1e4bfb6e 40 /** An interface for the Cypress 32k byte FM25W256 F-RAM over SPI
MACRUM 1:bb2b1e4bfb6e 41
MACRUM 1:bb2b1e4bfb6e 42 @code
MACRUM 1:bb2b1e4bfb6e 43 #include "mbed.h"
MACRUM 1:bb2b1e4bfb6e 44 #include "FM25W256.h"
MACRUM 1:bb2b1e4bfb6e 45
MACRUM 1:bb2b1e4bfb6e 46 Serial pc(USBTX, USBRX);
MACRUM 1:bb2b1e4bfb6e 47 FM25W256 f_ram(dp2, dp1, dp6, dp18);
MACRUM 1:bb2b1e4bfb6e 48
MACRUM 1:bb2b1e4bfb6e 49 int main()
MACRUM 1:bb2b1e4bfb6e 50 {
MACRUM 1:bb2b1e4bfb6e 51 uint8_t buf[16];
MACRUM 1:bb2b1e4bfb6e 52 // Fill buffer
MACRUM 1:bb2b1e4bfb6e 53 for(int i=0; i<16; i++) {
MACRUM 1:bb2b1e4bfb6e 54 buf[i] = i;
MACRUM 1:bb2b1e4bfb6e 55 }
MACRUM 1:bb2b1e4bfb6e 56 // Write data to F-RAM
MACRUM 1:bb2b1e4bfb6e 57 f_ram.write(0, buf, 16);
MACRUM 1:bb2b1e4bfb6e 58
MACRUM 1:bb2b1e4bfb6e 59 // Read data from F-RAM
MACRUM 1:bb2b1e4bfb6e 60 uint16_t adrs = 0;
MACRUM 1:bb2b1e4bfb6e 61 for(int i=0; i<16; i++) {
MACRUM 1:bb2b1e4bfb6e 62 pc.printf("0x%04X : ", i * 16);
MACRUM 1:bb2b1e4bfb6e 63 for(int j=0; j<16; j++) {
MACRUM 1:bb2b1e4bfb6e 64 pc.printf("%02X ", f_ram.read(adrs++));
MACRUM 1:bb2b1e4bfb6e 65 }
MACRUM 1:bb2b1e4bfb6e 66 pc.printf("\n");
MACRUM 1:bb2b1e4bfb6e 67 }
MACRUM 1:bb2b1e4bfb6e 68
MACRUM 1:bb2b1e4bfb6e 69 while(1) {
MACRUM 1:bb2b1e4bfb6e 70 }
MACRUM 1:bb2b1e4bfb6e 71 }
MACRUM 1:bb2b1e4bfb6e 72 */
MACRUM 0:5a552209903c 73 class FM25W256 {
MACRUM 0:5a552209903c 74 public:
MACRUM 1:bb2b1e4bfb6e 75
MACRUM 1:bb2b1e4bfb6e 76 enum E_WP {
MACRUM 1:bb2b1e4bfb6e 77 BANK_NONE = 0,
MACRUM 1:bb2b1e4bfb6e 78 BANK_UPPER_QUARTER = 1,
MACRUM 1:bb2b1e4bfb6e 79 BANK_UPPER_HALF = 2,
MACRUM 1:bb2b1e4bfb6e 80 BANK_ALL = 3
MACRUM 1:bb2b1e4bfb6e 81 };
MACRUM 1:bb2b1e4bfb6e 82
MACRUM 1:bb2b1e4bfb6e 83 /** Create an interface
MACRUM 1:bb2b1e4bfb6e 84 *
MACRUM 1:bb2b1e4bfb6e 85 * @param mosi SPI master-out-slave-in
MACRUM 1:bb2b1e4bfb6e 86 * @param miso SPI master-in-slave-out
MACRUM 1:bb2b1e4bfb6e 87 * @param clk SPI clock
MACRUM 1:bb2b1e4bfb6e 88 * @param cs chip select pin - any free Digital pin will do
MACRUM 1:bb2b1e4bfb6e 89 */
MACRUM 0:5a552209903c 90 FM25W256(PinName mosi, PinName miso, PinName clk, PinName cs);
MACRUM 1:bb2b1e4bfb6e 91
MACRUM 1:bb2b1e4bfb6e 92 /** Create an interface
MACRUM 1:bb2b1e4bfb6e 93 *
MACRUM 1:bb2b1e4bfb6e 94 * @param &spi SPI instance
MACRUM 1:bb2b1e4bfb6e 95 * @param cs chip select pin - any free Digital pin will do
MACRUM 1:bb2b1e4bfb6e 96 */
MACRUM 0:5a552209903c 97 FM25W256(SPI &spi, PinName cs);
MACRUM 1:bb2b1e4bfb6e 98
MACRUM 1:bb2b1e4bfb6e 99 /** write a byte to F-RAM
MACRUM 1:bb2b1e4bfb6e 100 * @param address The address F-RAM to write to
MACRUM 1:bb2b1e4bfb6e 101 * @param data The byte to write there
MACRUM 1:bb2b1e4bfb6e 102 */
MACRUM 0:5a552209903c 103 void write(uint16_t address, uint8_t data);
MACRUM 1:bb2b1e4bfb6e 104
MACRUM 1:bb2b1e4bfb6e 105 /** write multiple bytes to F-RAM from a buffer
MACRUM 1:bb2b1e4bfb6e 106 * @param address The F-RAM address write to
MACRUM 1:bb2b1e4bfb6e 107 * @param data The buffer to write from
MACRUM 1:bb2b1e4bfb6e 108 * @param size The number of bytes to write
MACRUM 1:bb2b1e4bfb6e 109 */
MACRUM 0:5a552209903c 110 void write(uint16_t address, uint8_t *data, uint16_t size);
MACRUM 1:bb2b1e4bfb6e 111
MACRUM 1:bb2b1e4bfb6e 112 /** read a byte from F-RAM
MACRUM 1:bb2b1e4bfb6e 113 * @param address The address to read from
MACRUM 1:bb2b1e4bfb6e 114 * @return the character at that address
MACRUM 1:bb2b1e4bfb6e 115 */
MACRUM 0:5a552209903c 116 uint8_t read(uint16_t address);
MACRUM 1:bb2b1e4bfb6e 117
MACRUM 1:bb2b1e4bfb6e 118 /** read multiple bytes from F-RAM into a buffer
MACRUM 1:bb2b1e4bfb6e 119 * @param address The F-RAM address to read from
MACRUM 1:bb2b1e4bfb6e 120 * @param data The buffer to read into (must be big enough!)
MACRUM 1:bb2b1e4bfb6e 121 * @param size The number of bytes to read
MACRUM 1:bb2b1e4bfb6e 122 */
MACRUM 0:5a552209903c 123 void read(uint16_t address, uint8_t *data, uint16_t size);
MACRUM 0:5a552209903c 124
MACRUM 1:bb2b1e4bfb6e 125 /** write a byte to the status register
MACRUM 1:bb2b1e4bfb6e 126 * @param data The byte to write the register
MACRUM 1:bb2b1e4bfb6e 127 */
MACRUM 1:bb2b1e4bfb6e 128 void wirte_status(uint8_t data);
MACRUM 1:bb2b1e4bfb6e 129
MACRUM 1:bb2b1e4bfb6e 130 /** read a byte from the status register
MACRUM 1:bb2b1e4bfb6e 131 * @return the character at the register
MACRUM 1:bb2b1e4bfb6e 132 */
MACRUM 1:bb2b1e4bfb6e 133 uint8_t read_status();
MACRUM 1:bb2b1e4bfb6e 134
MACRUM 1:bb2b1e4bfb6e 135 /** Set write protect mode
MACRUM 1:bb2b1e4bfb6e 136 * @param bp E_WP enum value
MACRUM 1:bb2b1e4bfb6e 137 */
MACRUM 1:bb2b1e4bfb6e 138 void set_write_protect(E_WP bp);
MACRUM 1:bb2b1e4bfb6e 139
MACRUM 1:bb2b1e4bfb6e 140 /** Set write protect to non-protect mode
MACRUM 1:bb2b1e4bfb6e 141 */
MACRUM 1:bb2b1e4bfb6e 142 void clear_write_protect();
MACRUM 1:bb2b1e4bfb6e 143
MACRUM 0:5a552209903c 144 protected:
MACRUM 0:5a552209903c 145 SPI _spi;
MACRUM 0:5a552209903c 146 DigitalOut _cs;
MACRUM 0:5a552209903c 147 };
MACRUM 0:5a552209903c 148
MACRUM 0:5a552209903c 149 #endif