Sungwoo Kim
/
HydraulicControlBoard_PostLIGHT_Original
Original Version of STM Board
Diff: INIT_HW/INIT_HW.cpp
- Revision:
- 11:82d8768d7351
- Parent:
- 2:a1c0a37df760
- Child:
- 15:bd0d12728506
diff -r 83a6baa77a2e -r 82d8768d7351 INIT_HW/INIT_HW.cpp --- a/INIT_HW/INIT_HW.cpp Fri Aug 23 01:02:32 2019 +0000 +++ b/INIT_HW/INIT_HW.cpp Fri Aug 23 12:28:08 2019 +0000 @@ -52,3 +52,25 @@ TIM4->CR1 |= TIM_CR1_CEN; // enable TIM4 } + +void Init_TMR3(){ + RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; // enable TIM3 clock + + //ISR Setup + + NVIC_EnableIRQ(TIM3_IRQn); //Enable TIM3 IRQ + + TIM3->DIER |= TIM_DIER_UIE; // enable update interrupt + TIM3->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode + TIM3->CR1 |= TIM_CR1_UDIS; + TIM3->CR1 |= TIM_CR1_ARPE; // autoreload on, + TIM3->RCR |= 0x001; // update event once per up/down count of TIM3 + TIM3->EGR |= TIM_EGR_UG; + + //PWM Setup + + TIM3->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock + TIM3->ARR = TMR3_COUNT; // set auto reload, 40 khz + TIM3->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on. + TIM3->CR1 |= TIM_CR1_CEN; // enable TIM4 +} \ No newline at end of file