HSUEH YU-MIN / flash_at45db

SPI Flash AT45DBXXXD

Fork of at45db161d by Suga koubou

at45db161d.cpp@9:8b1cf34d290e, 2015-04-17 (annotated)

Committer:
LeoHsueh
Date:
Fri Apr 17 11:49:27 2015 +0000
Revision:
9:8b1cf34d290e
Parent:
8:1ec3997fe258 
Fix inactive.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 0:2e953bbaf3a5 1 /**
okini3939 0:2e953bbaf3a5 2 * AT45DB161D module for arduino (C) Vincent
okini3939 0:2e953bbaf3a5 3 * SPI flash memory
okini3939 0:2e953bbaf3a5 4 * http://blog.blockos.org/?p=27
okini3939 0:2e953bbaf3a5 5 *
okini3939 0:2e953bbaf3a5 6 * bug fix by todotani
okini3939 0:2e953bbaf3a5 7 * http://todotani.cocolog-nifty.com/blog/2009/07/arduino-4cf4.html
okini3939 0:2e953bbaf3a5 8 *
okini3939 0:2e953bbaf3a5 9 * Modified for mbed, 2011 Suga.
okini3939 0:2e953bbaf3a5 10 */
LeoHsueh 6:1872f591d604 11
okini3939 0:2e953bbaf3a5 12 #include "at45db161d.h"
LeoHsueh 6:1872f591d604 13 #include "at45db161d_commands.h"
okini3939 0:2e953bbaf3a5 14
LeoHsueh 6:1872f591d604 15 #define DF_CS_inactive _cs = 1
LeoHsueh 6:1872f591d604 16 #define DF_CS_active _cs = 0
LeoHsueh 6:1872f591d604 17
LeoHsueh 6:1872f591d604 18 ATD45DB161D::ATD45DB161D(SPI *spi, PinName cs) :
LeoHsueh 6:1872f591d604 19 _spi(spi), _cs(cs) {
LeoHsueh 7:2f9d8b47704f 20 // pageSize = 264;
LeoHsueh 7:2f9d8b47704f 21 // pageLength = 4095;
LeoHsueh 6:1872f591d604 22 /* Disable device */
LeoHsueh 6:1872f591d604 23 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 24
okini3939 0:2e953bbaf3a5 25 /* Setup SPI */
LeoHsueh 5:ef7247c6f073 26 _spi->format(8, 0);
LeoHsueh 5:ef7247c6f073 27 _spi->frequency(10000000);
LeoHsueh 7:2f9d8b47704f 28
LeoHsueh 7:2f9d8b47704f 29 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 7:2f9d8b47704f 30 DF_CS_active; /* to reset Dataflash command decoder */
LeoHsueh 7:2f9d8b47704f 31
LeoHsueh 7:2f9d8b47704f 32 /* Send status read command */
LeoHsueh 7:2f9d8b47704f 33 _spi->write(AT45DB161D_READ_MANUFACTURER_AND_DEVICE_ID);
LeoHsueh 7:2f9d8b47704f 34
LeoHsueh 7:2f9d8b47704f 35 /* Manufacturer ID */
LeoHsueh 7:2f9d8b47704f 36 _info.manufacturer = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 37 /* Device ID (part 1) */
LeoHsueh 7:2f9d8b47704f 38 _info.device[0] = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 39 /* Device ID (part 2) */
LeoHsueh 7:2f9d8b47704f 40 _info.device[1] = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 41 /* Extended Device Information String Length */
LeoHsueh 7:2f9d8b47704f 42 _info.extendedInfoLength = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 43 _info.pageSize = 264;
LeoHsueh 7:2f9d8b47704f 44 _info.pageLength = 4095;
LeoHsueh 9:8b1cf34d290e 45 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 46 }
okini3939 0:2e953bbaf3a5 47
okini3939 0:2e953bbaf3a5 48 /**
okini3939 0:2e953bbaf3a5 49 * Read status register
okini3939 0:2e953bbaf3a5 50 * @return The content of the status register
okini3939 0:2e953bbaf3a5 51 **/
LeoHsueh 6:1872f591d604 52 uint8_t ATD45DB161D::ReadStatusRegister() {
okini3939 0:2e953bbaf3a5 53 uint8_t status;
okini3939 0:2e953bbaf3a5 54
LeoHsueh 6:1872f591d604 55 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 56 DF_CS_active; /* to reset Dataflash command decoder */
LeoHsueh 6:1872f591d604 57
okini3939 0:2e953bbaf3a5 58 /* Send status read command */
LeoHsueh 5:ef7247c6f073 59 _spi->write(AT45DB161D_STATUS_REGISTER_READ);
okini3939 0:2e953bbaf3a5 60 /* Get result with a dummy write */
LeoHsueh 5:ef7247c6f073 61 status = _spi->write(0x00);
okini3939 0:2e953bbaf3a5 62
okini3939 0:2e953bbaf3a5 63 return status;
okini3939 0:2e953bbaf3a5 64 }
okini3939 0:2e953bbaf3a5 65
okini3939 0:2e953bbaf3a5 66 /**
okini3939 0:2e953bbaf3a5 67 * Read Manufacturer and Device ID
okini3939 0:2e953bbaf3a5 68 * @note if id.extendedInfoLength is not equal to zero,
LeoHsueh 5:ef7247c6f073 69 * successive calls to _spi->write(0xff) will return
okini3939 0:2e953bbaf3a5 70 * the extended device information string bytes.
okini3939 0:2e953bbaf3a5 71 * @param id Pointer to the ID structure to initialize
okini3939 0:2e953bbaf3a5 72 **/
LeoHsueh 7:2f9d8b47704f 73 ATD45DB161D::Info *ATD45DB161D::getInfo() {
LeoHsueh 7:2f9d8b47704f 74 return &_info;
okini3939 0:2e953bbaf3a5 75 }
okini3939 0:2e953bbaf3a5 76
okini3939 0:2e953bbaf3a5 77 /**
okini3939 0:2e953bbaf3a5 78 * Main Memory Page Read.
okini3939 0:2e953bbaf3a5 79 * A main memory page read allows the user to read data directly from
okini3939 0:2e953bbaf3a5 80 * any one of the 4096 pages in the main memory, bypassing both of the
okini3939 0:2e953bbaf3a5 81 * data buffers and leaving the contents of the buffers unchanged.
okini3939 0:2e953bbaf3a5 82 *
okini3939 0:2e953bbaf3a5 83 * @param page Page of the main memory to read
okini3939 0:2e953bbaf3a5 84 * @param offset Starting byte address within the page
okini3939 0:2e953bbaf3a5 85 **/
LeoHsueh 6:1872f591d604 86 void ATD45DB161D::ReadMainMemoryPage(uint16_t page, uint16_t offset) {
LeoHsueh 6:1872f591d604 87 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 88 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 89
okini3939 0:2e953bbaf3a5 90 /* Send opcode */
LeoHsueh 5:ef7247c6f073 91 _spi->write(AT45DB161D_PAGE_READ);
okini3939 0:2e953bbaf3a5 92
okini3939 0:2e953bbaf3a5 93 /* Address (page | offset) */
LeoHsueh 6:1872f591d604 94 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 95 _spi->write((uint8_t) ((page << 2) | (offset >> 8)));
LeoHsueh 6:1872f591d604 96 _spi->write((uint8_t) (offset & 0xff));
okini3939 0:2e953bbaf3a5 97
okini3939 0:2e953bbaf3a5 98 /* 4 "don't care" bytes */
LeoHsueh 5:ef7247c6f073 99 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 100 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 101 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 102 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 103 }
okini3939 0:2e953bbaf3a5 104
okini3939 0:2e953bbaf3a5 105 /**
okini3939 0:2e953bbaf3a5 106 * Continuous Array Read.
okini3939 0:2e953bbaf3a5 107 * Sequentially read a continuous stream of data.
okini3939 0:2e953bbaf3a5 108 * @param page Page of the main memory where the sequential read will start
okini3939 0:2e953bbaf3a5 109 * @param offset Starting byte address within the page
okini3939 0:2e953bbaf3a5 110 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false).
okini3939 0:2e953bbaf3a5 111 * @note The legacy mode is not currently supported
okini3939 0:2e953bbaf3a5 112 **/
LeoHsueh 6:1872f591d604 113 void ATD45DB161D::ContinuousArrayRead(uint16_t page, uint16_t offset, uint8_t low) {
LeoHsueh 6:1872f591d604 114 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 115 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 116
okini3939 0:2e953bbaf3a5 117 /* Send opcode */
LeoHsueh 6:1872f591d604 118 _spi->write(low ? AT45DB161D_CONTINUOUS_READ_LOW_FREQ :
LeoHsueh 6:1872f591d604 119 AT45DB161D_CONTINUOUS_READ_HIGH_FREQ);
okini3939 0:2e953bbaf3a5 120
okini3939 0:2e953bbaf3a5 121 /* Address (page | offset) */
LeoHsueh 6:1872f591d604 122 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 123 _spi->write((uint8_t) ((page << 2) | (offset >> 8)));
LeoHsueh 6:1872f591d604 124 _spi->write((uint8_t) (offset & 0xff));
okini3939 0:2e953bbaf3a5 125
LeoHsueh 6:1872f591d604 126 if (!low) {
LeoHsueh 6:1872f591d604 127 _spi->write(0x00);
LeoHsueh 6:1872f591d604 128 }
okini3939 0:2e953bbaf3a5 129 }
okini3939 0:2e953bbaf3a5 130
LeoHsueh 8:1ec3997fe258 131 void ATD45DB161D::readBuffer(uint16_t page, void *ptr, uint16_t len) {
leolleeooleo 4:943690efda8b 132 uint8_t *buf = reinterpret_cast<uint8_t*>(ptr);
LeoHsueh 7:2f9d8b47704f 133 uint16_t i;
LeoHsueh 7:2f9d8b47704f 134 while (len > 0) {
LeoHsueh 8:1ec3997fe258 135 PageToBuffer(page++, 1);
LeoHsueh 8:1ec3997fe258 136 BufferRead(1, 0, 1);
LeoHsueh 7:2f9d8b47704f 137 uint16_t wlen = (_info.pageSize < len ? _info.pageSize : len);
LeoHsueh 7:2f9d8b47704f 138 for (i = 0; i < wlen; i++) {
LeoHsueh 7:2f9d8b47704f 139 *buf++ = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 140 }
LeoHsueh 7:2f9d8b47704f 141 len -= wlen;
??? 3:82157896d90d 142 }
LeoHsueh 9:8b1cf34d290e 143 DF_CS_inactive;
??? 3:82157896d90d 144 }
??? 3:82157896d90d 145
LeoHsueh 8:1ec3997fe258 146 void ATD45DB161D::writeBuffer(uint16_t page, void *ptr, uint16_t len) {
leolleeooleo 4:943690efda8b 147 uint8_t *buf = reinterpret_cast<uint8_t*>(ptr);
??? 3:82157896d90d 148 uint16_t i;
??? 3:82157896d90d 149 while (len > 0) {
LeoHsueh 8:1ec3997fe258 150 BufferWrite(2, 0);
LeoHsueh 7:2f9d8b47704f 151 uint16_t wlen = (_info.pageSize < len ? _info.pageSize : len);
leolleeooleo 4:943690efda8b 152 for (i = 0; i < wlen; i++) {
LeoHsueh 5:ef7247c6f073 153 _spi->write(*buf++);
??? 3:82157896d90d 154 }
LeoHsueh 8:1ec3997fe258 155 BufferToPage(2, page++, 1);
leolleeooleo 4:943690efda8b 156 len -= wlen;
??? 3:82157896d90d 157 }
LeoHsueh 9:8b1cf34d290e 158 DF_CS_inactive;
??? 3:82157896d90d 159 }
okini3939 0:2e953bbaf3a5 160
okini3939 0:2e953bbaf3a5 161 /**
okini3939 0:2e953bbaf3a5 162 * Read the content of one of the SRAM data buffers (in low or high speed mode).
okini3939 0:2e953bbaf3a5 163 * @param bufferNum Buffer to read (1 or 2)
okini3939 0:2e953bbaf3a5 164 * @param offset Starting byte within the buffer
okini3939 0:2e953bbaf3a5 165 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false).
okini3939 0:2e953bbaf3a5 166 **/
LeoHsueh 6:1872f591d604 167 void ATD45DB161D::BufferRead(uint8_t bufferNum, uint16_t offset, uint8_t low) {
LeoHsueh 6:1872f591d604 168 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 169 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 170
okini3939 0:2e953bbaf3a5 171 /* Send opcode */
LeoHsueh 6:1872f591d604 172 if (bufferNum == 1) {
LeoHsueh 5:ef7247c6f073 173 _spi->write(low ? AT45DB161D_BUFFER_1_READ_LOW_FREQ :
LeoHsueh 6:1872f591d604 174 AT45DB161D_BUFFER_1_READ);
LeoHsueh 6:1872f591d604 175 } else {
LeoHsueh 5:ef7247c6f073 176 _spi->write(low ? AT45DB161D_BUFFER_2_READ_LOW_FREQ :
LeoHsueh 6:1872f591d604 177 AT45DB161D_BUFFER_2_READ);
okini3939 0:2e953bbaf3a5 178
okini3939 0:2e953bbaf3a5 179 }
okini3939 0:2e953bbaf3a5 180
okini3939 0:2e953bbaf3a5 181 /* 14 "Don't care" bits */
LeoHsueh 5:ef7247c6f073 182 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 183 /* Rest of the "don't care" bits + bits 8,9 of the offset */
LeoHsueh 6:1872f591d604 184 _spi->write((uint8_t) (offset >> 8));
okini3939 0:2e953bbaf3a5 185 /* bits 7-0 of the offset */
LeoHsueh 6:1872f591d604 186 _spi->write((uint8_t) (offset & 0xff));
okini3939 0:2e953bbaf3a5 187 }
okini3939 0:2e953bbaf3a5 188
okini3939 0:2e953bbaf3a5 189 /**
okini3939 0:2e953bbaf3a5 190 * Write data to one of the SRAM data buffers. Any further call to
okini3939 0:2e953bbaf3a5 191 * spi_tranfer will return bytes contained in the data buffer until
okini3939 0:2e953bbaf3a5 192 * a low-to-high transition is detected on the CS pin. If the end of
okini3939 0:2e953bbaf3a5 193 * the data buffer is reached, the device will wrap around back to the
okini3939 0:2e953bbaf3a5 194 * beginning of the buffer.
okini3939 0:2e953bbaf3a5 195 * @param bufferNum Buffer to read (1 or 2)
okini3939 0:2e953bbaf3a5 196 * @param offset Starting byte within the buffer
okini3939 0:2e953bbaf3a5 197 **/
LeoHsueh 6:1872f591d604 198 void ATD45DB161D::BufferWrite(uint8_t bufferNum, uint16_t offset) {
LeoHsueh 6:1872f591d604 199 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 200 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 201
LeoHsueh 6:1872f591d604 202 _spi->write((bufferNum == 1) ? AT45DB161D_BUFFER_1_WRITE :
LeoHsueh 6:1872f591d604 203 AT45DB161D_BUFFER_2_WRITE);
okini3939 0:2e953bbaf3a5 204
okini3939 0:2e953bbaf3a5 205 /* 14 "Don't care" bits */
LeoHsueh 5:ef7247c6f073 206 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 207 /* Rest of the "don't care" bits + bits 8,9 of the offset */
LeoHsueh 6:1872f591d604 208 _spi->write((uint8_t) (offset >> 8));
okini3939 0:2e953bbaf3a5 209 /* bits 7-0 of the offset */
LeoHsueh 6:1872f591d604 210 _spi->write((uint8_t) (offset & 0xff));
okini3939 0:2e953bbaf3a5 211 }
okini3939 0:2e953bbaf3a5 212
okini3939 0:2e953bbaf3a5 213 /**
okini3939 0:2e953bbaf3a5 214 * Transfer data from buffer 1 or 2 to main memory page.
okini3939 0:2e953bbaf3a5 215 * @param bufferNum Buffer to use (1 or 2)
okini3939 0:2e953bbaf3a5 216 * @param page Page where the content of the buffer will transfered
okini3939 0:2e953bbaf3a5 217 * @param erase If set the page will be first erased before the buffer transfer.
okini3939 0:2e953bbaf3a5 218 * @note If erase is equal to zero, the page must have been previously erased using one of the erase command (Page or Block Erase).
okini3939 0:2e953bbaf3a5 219 **/
LeoHsueh 6:1872f591d604 220 void ATD45DB161D::BufferToPage(uint8_t bufferNum, uint16_t page, uint8_t erase) {
LeoHsueh 6:1872f591d604 221 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 222 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 223
okini3939 0:2e953bbaf3a5 224 /* Opcode */
LeoHsueh 6:1872f591d604 225 if (erase) {
LeoHsueh 6:1872f591d604 226 _spi->write((bufferNum == 1) ? AT45DB161D_BUFFER_1_TO_PAGE_WITH_ERASE :
LeoHsueh 6:1872f591d604 227 AT45DB161D_BUFFER_2_TO_PAGE_WITH_ERASE);
LeoHsueh 6:1872f591d604 228 } else {
LeoHsueh 6:1872f591d604 229 _spi->write((bufferNum == 1) ? AT45DB161D_BUFFER_1_TO_PAGE_WITHOUT_ERASE :
LeoHsueh 6:1872f591d604 230 AT45DB161D_BUFFER_2_TO_PAGE_WITHOUT_ERASE);
okini3939 0:2e953bbaf3a5 231 }
okini3939 0:2e953bbaf3a5 232
okini3939 0:2e953bbaf3a5 233 /*
okini3939 0:2e953bbaf3a5 234 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 235 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 236 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 237 * the main memory to be written
okini3939 0:2e953bbaf3a5 238 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 239 */
LeoHsueh 6:1872f591d604 240 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 241 _spi->write((uint8_t) (page << 2));
LeoHsueh 5:ef7247c6f073 242 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 243
LeoHsueh 6:1872f591d604 244 DF_CS_inactive; /* Start transfer */
LeoHsueh 6:1872f591d604 245 DF_CS_active; /* If erase was set, the page will first be erased */
okini3939 0:2e953bbaf3a5 246
okini3939 0:2e953bbaf3a5 247 /* Wait for the end of the transfer */
LeoHsueh 6:1872f591d604 248 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 249 }
okini3939 0:2e953bbaf3a5 250 }
okini3939 0:2e953bbaf3a5 251
okini3939 0:2e953bbaf3a5 252 /**
okini3939 0:2e953bbaf3a5 253 * Transfer a page of data from main memory to buffer 1 or 2.
okini3939 0:2e953bbaf3a5 254 * @param page Main memory page to transfer
okini3939 0:2e953bbaf3a5 255 * @param buffer Buffer (1 or 2) where the data will be written
okini3939 0:2e953bbaf3a5 256 **/
LeoHsueh 6:1872f591d604 257 void ATD45DB161D::PageToBuffer(uint16_t page, uint8_t bufferNum) {
LeoHsueh 6:1872f591d604 258 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 259 DF_CS_active; /* to reset Dataflash command decoder */
LeoHsueh 6:1872f591d604 260
okini3939 0:2e953bbaf3a5 261 /* Send opcode */
LeoHsueh 5:ef7247c6f073 262 _spi->write((bufferNum == 1) ? AT45DB161D_TRANSFER_PAGE_TO_BUFFER_1 :
LeoHsueh 6:1872f591d604 263 AT45DB161D_TRANSFER_PAGE_TO_BUFFER_2);
okini3939 0:2e953bbaf3a5 264
okini3939 0:2e953bbaf3a5 265 /*
okini3939 0:2e953bbaf3a5 266 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 267 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 268 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 269 * the main memory to be written
okini3939 0:2e953bbaf3a5 270 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 271 */
LeoHsueh 6:1872f591d604 272 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 273 _spi->write((uint8_t) (page << 2));
LeoHsueh 5:ef7247c6f073 274 _spi->write(0x00);
LeoHsueh 6:1872f591d604 275
LeoHsueh 6:1872f591d604 276 DF_CS_inactive; /* Start page transfer */
okini3939 0:2e953bbaf3a5 277 DF_CS_active;
okini3939 0:2e953bbaf3a5 278
okini3939 0:2e953bbaf3a5 279 /* Wait for the end of the transfer */
LeoHsueh 6:1872f591d604 280 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 281 }
okini3939 0:2e953bbaf3a5 282 }
okini3939 0:2e953bbaf3a5 283
okini3939 0:2e953bbaf3a5 284 /**
okini3939 0:2e953bbaf3a5 285 * Erase a page in the main memory array.
okini3939 0:2e953bbaf3a5 286 * @param page Page to erase
okini3939 0:2e953bbaf3a5 287 **/
LeoHsueh 6:1872f591d604 288 void ATD45DB161D::PageErase(uint16_t page) {
LeoHsueh 6:1872f591d604 289 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 290 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 291
okini3939 0:2e953bbaf3a5 292 /* Send opcode */
LeoHsueh 5:ef7247c6f073 293 _spi->write(AT45DB161D_PAGE_ERASE);
okini3939 0:2e953bbaf3a5 294
okini3939 0:2e953bbaf3a5 295 /*
okini3939 0:2e953bbaf3a5 296 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 297 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 298 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 299 * the main memory to be written
okini3939 0:2e953bbaf3a5 300 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 301 */
LeoHsueh 6:1872f591d604 302 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 303 _spi->write((uint8_t) (page << 2));
LeoHsueh 5:ef7247c6f073 304 _spi->write(0x00);
LeoHsueh 6:1872f591d604 305
LeoHsueh 6:1872f591d604 306 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 307 DF_CS_active;
okini3939 0:2e953bbaf3a5 308
okini3939 0:2e953bbaf3a5 309 /* Wait for the end of the block erase operation */
LeoHsueh 6:1872f591d604 310 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 311 }
okini3939 0:2e953bbaf3a5 312 }
okini3939 0:2e953bbaf3a5 313
okini3939 0:2e953bbaf3a5 314 /**
okini3939 0:2e953bbaf3a5 315 * Erase a block of eight pages at one time.
okini3939 0:2e953bbaf3a5 316 * @param block Index of the block to erase
okini3939 0:2e953bbaf3a5 317 **/
LeoHsueh 6:1872f591d604 318 void ATD45DB161D::BlockErase(uint16_t block) {
LeoHsueh 6:1872f591d604 319 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 320 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 321
okini3939 0:2e953bbaf3a5 322 /* Send opcode */
LeoHsueh 5:ef7247c6f073 323 _spi->write(AT45DB161D_BLOCK_ERASE);
okini3939 0:2e953bbaf3a5 324
okini3939 0:2e953bbaf3a5 325 /*
okini3939 0:2e953bbaf3a5 326 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 327 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 328 * - 9 block address bits (PA11 - PA3)
okini3939 0:2e953bbaf3a5 329 * - 13 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 330 */
LeoHsueh 6:1872f591d604 331 _spi->write((uint8_t) (block >> 3));
LeoHsueh 6:1872f591d604 332 _spi->write((uint8_t) (block << 5));
LeoHsueh 5:ef7247c6f073 333 _spi->write(0x00);
LeoHsueh 6:1872f591d604 334
LeoHsueh 6:1872f591d604 335 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 336 DF_CS_active;
okini3939 0:2e953bbaf3a5 337
okini3939 0:2e953bbaf3a5 338 /* Wait for the end of the block erase operation */
LeoHsueh 6:1872f591d604 339 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 340 }
okini3939 0:2e953bbaf3a5 341 }
okini3939 0:2e953bbaf3a5 342
okini3939 0:2e953bbaf3a5 343 /**
okini3939 0:2e953bbaf3a5 344 * Erase a sector in main memory. There are 16 sector on the
okini3939 0:2e953bbaf3a5 345 * at45db161d and only one can be erased at one time.
okini3939 0:2e953bbaf3a5 346 * @param sector Sector to erase (1-15)
okini3939 0:2e953bbaf3a5 347 **/
LeoHsueh 6:1872f591d604 348 void ATD45DB161D::SectoreErase(uint8_t sector) {
LeoHsueh 6:1872f591d604 349 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 350 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 351
okini3939 0:2e953bbaf3a5 352 /* Send opcode */
LeoHsueh 5:ef7247c6f073 353 _spi->write(AT45DB161D_SECTOR_ERASE);
okini3939 0:2e953bbaf3a5 354
okini3939 0:2e953bbaf3a5 355 /*
okini3939 0:2e953bbaf3a5 356 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 357 */
LeoHsueh 6:1872f591d604 358 if ((sector == 0x0a) || (sector == 0x0b)) {
okini3939 0:2e953bbaf3a5 359 /*
okini3939 0:2e953bbaf3a5 360 * - 11 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 361 * -
okini3939 0:2e953bbaf3a5 362 * - 12 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 363 */
LeoHsueh 5:ef7247c6f073 364 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 365 _spi->write(((sector & 0x01) << 4));
LeoHsueh 5:ef7247c6f073 366 _spi->write(0x00);
LeoHsueh 6:1872f591d604 367 } else {
okini3939 0:2e953bbaf3a5 368 /*
okini3939 0:2e953bbaf3a5 369 * - 2 don't care bits
okini3939 0:2e953bbaf3a5 370 * - 4 sector number bits
okini3939 0:2e953bbaf3a5 371 * - 18 don't care bits
okini3939 0:2e953bbaf3a5 372 */
LeoHsueh 5:ef7247c6f073 373 _spi->write(sector << 1);
LeoHsueh 5:ef7247c6f073 374 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 375 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 376 }
LeoHsueh 6:1872f591d604 377
LeoHsueh 6:1872f591d604 378 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 379 DF_CS_active;
okini3939 0:2e953bbaf3a5 380
okini3939 0:2e953bbaf3a5 381 /* Wait for the end of the block erase operation */
LeoHsueh 6:1872f591d604 382 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 383 }
okini3939 0:2e953bbaf3a5 384 }
okini3939 0:2e953bbaf3a5 385
okini3939 0:2e953bbaf3a5 386 /**
okini3939 0:2e953bbaf3a5 387 * Erase the entire chip memory. Sectors proteced or locked down will
okini3939 0:2e953bbaf3a5 388 * not be erased.
okini3939 0:2e953bbaf3a5 389 **/
LeoHsueh 6:1872f591d604 390 void ATD45DB161D::ChipErase() {
LeoHsueh 6:1872f591d604 391 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 392 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 393
okini3939 0:2e953bbaf3a5 394 /* Send chip erase sequence */
LeoHsueh 5:ef7247c6f073 395 _spi->write(AT45DB161D_CHIP_ERASE_0);
LeoHsueh 5:ef7247c6f073 396 _spi->write(AT45DB161D_CHIP_ERASE_1);
LeoHsueh 5:ef7247c6f073 397 _spi->write(AT45DB161D_CHIP_ERASE_2);
LeoHsueh 5:ef7247c6f073 398 _spi->write(AT45DB161D_CHIP_ERASE_3);
LeoHsueh 6:1872f591d604 399
LeoHsueh 6:1872f591d604 400 DF_CS_inactive; /* Start chip erase */
okini3939 0:2e953bbaf3a5 401 DF_CS_active;
okini3939 0:2e953bbaf3a5 402
okini3939 0:2e953bbaf3a5 403 /* Wait for the end of the chip erase operation */
LeoHsueh 6:1872f591d604 404 while (!(ReadStatusRegister() & READY_BUSY))
LeoHsueh 6:1872f591d604 405 ;
okini3939 0:2e953bbaf3a5 406 }
okini3939 0:2e953bbaf3a5 407
okini3939 0:2e953bbaf3a5 408 /**
okini3939 0:2e953bbaf3a5 409 * This a combination of Buffer Write and Buffer to Page with
okini3939 0:2e953bbaf3a5 410 * Built-in Erase.
okini3939 0:2e953bbaf3a5 411 * @note You must call EndAndWait in order to start transfering data from buffer to page
okini3939 0:2e953bbaf3a5 412 * @param page Page where the content of the buffer will transfered
okini3939 0:2e953bbaf3a5 413 * @param offset Starting byte address within the buffer
okini3939 0:2e953bbaf3a5 414 * @param bufferNum Buffer to use (1 or 2)
okini3939 0:2e953bbaf3a5 415 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 416 **/
LeoHsueh 6:1872f591d604 417 void ATD45DB161D::BeginPageWriteThroughBuffer(uint16_t page, uint16_t offset, uint8_t bufferNum) {
LeoHsueh 6:1872f591d604 418 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 419 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 420
okini3939 0:2e953bbaf3a5 421 /* Send opcode */
LeoHsueh 5:ef7247c6f073 422 _spi->write((bufferNum == 1) ? AT45DB161D_PAGE_THROUGH_BUFFER_1 :
LeoHsueh 6:1872f591d604 423 AT45DB161D_PAGE_THROUGH_BUFFER_2);
okini3939 0:2e953bbaf3a5 424
okini3939 0:2e953bbaf3a5 425 /* Address */
LeoHsueh 6:1872f591d604 426 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 427 _spi->write((uint8_t) ((page << 2) | (offset >> 8)));
LeoHsueh 6:1872f591d604 428 _spi->write((uint8_t) offset);
okini3939 0:2e953bbaf3a5 429 }
okini3939 0:2e953bbaf3a5 430
okini3939 0:2e953bbaf3a5 431 /**
okini3939 0:2e953bbaf3a5 432 * Perform a low-to-high transition on the CS pin and then poll
okini3939 0:2e953bbaf3a5 433 * the status register to check if the dataflash is busy.
okini3939 0:2e953bbaf3a5 434 **/
LeoHsueh 6:1872f591d604 435 void ATD45DB161D::EndAndWait() {
LeoHsueh 6:1872f591d604 436 DF_CS_inactive; /* End current operation */
LeoHsueh 6:1872f591d604 437 DF_CS_active; /* Some internal operation may occur
LeoHsueh 6:1872f591d604 438 * (buffer to page transfer, page erase, etc... ) */
okini3939 0:2e953bbaf3a5 439
okini3939 0:2e953bbaf3a5 440 /* Wait for the chip to be ready */
LeoHsueh 6:1872f591d604 441 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 442 }
LeoHsueh 6:1872f591d604 443
LeoHsueh 6:1872f591d604 444 DF_CS_inactive; /* Release SPI Bus */
okini3939 0:2e953bbaf3a5 445 }
okini3939 0:2e953bbaf3a5 446
okini3939 0:2e953bbaf3a5 447 /**
okini3939 0:2e953bbaf3a5 448 * Compare a page of data in main memory to the data in buffer 1 or 2.
okini3939 0:2e953bbaf3a5 449 * @param page Page to test
okini3939 0:2e953bbaf3a5 450 * @param bufferNum Buffer number
okini3939 0:2e953bbaf3a5 451 * @return
okini3939 0:2e953bbaf3a5 452 * - 1 if the page and the buffer contains the same data
okini3939 0:2e953bbaf3a5 453 * - 0 else
okini3939 0:2e953bbaf3a5 454 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 455 **/
LeoHsueh 6:1872f591d604 456 int8_t ATD45DB161D::ComparePageToBuffer(uint16_t page, uint8_t bufferNum) {
okini3939 0:2e953bbaf3a5 457 uint8_t status;
okini3939 0:2e953bbaf3a5 458
LeoHsueh 6:1872f591d604 459 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 460 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 461
okini3939 0:2e953bbaf3a5 462 /* Send opcode */
LeoHsueh 5:ef7247c6f073 463 _spi->write((bufferNum == 1) ? AT45DB161D_COMPARE_PAGE_TO_BUFFER_1 :
LeoHsueh 6:1872f591d604 464 AT45DB161D_COMPARE_PAGE_TO_BUFFER_2);
okini3939 0:2e953bbaf3a5 465
okini3939 0:2e953bbaf3a5 466 /* Page address */
LeoHsueh 6:1872f591d604 467 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 468 _spi->write((uint8_t) (page << 2));
LeoHsueh 5:ef7247c6f073 469 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 470
LeoHsueh 6:1872f591d604 471 DF_CS_inactive; /* Start comparaison */
okini3939 0:2e953bbaf3a5 472 DF_CS_active;
okini3939 0:2e953bbaf3a5 473
okini3939 0:2e953bbaf3a5 474 /* Wait for the end of the comparaison and get the result */
LeoHsueh 6:1872f591d604 475 while (!((status = ReadStatusRegister()) & READY_BUSY)) {
LeoHsueh 6:1872f591d604 476 }
LeoHsueh 6:1872f591d604 477
okini3939 0:2e953bbaf3a5 478 // return ((status & COMPARE) == COMPARE);
LeoHsueh 6:1872f591d604 479 return ((status & COMPARE) ? 0 : 1);
okini3939 0:2e953bbaf3a5 480 }
okini3939 0:2e953bbaf3a5 481
okini3939 0:2e953bbaf3a5 482 /**
okini3939 0:2e953bbaf3a5 483 * Put the device into the lowest power consumption mode.
okini3939 0:2e953bbaf3a5 484 * Once the device has entered the Deep Power-down mode, all
okini3939 0:2e953bbaf3a5 485 * instructions are ignored except the Resume from Deep
okini3939 0:2e953bbaf3a5 486 * Power-down command.
okini3939 0:2e953bbaf3a5 487 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 488 **/
LeoHsueh 6:1872f591d604 489 void ATD45DB161D::DeepPowerDown() {
LeoHsueh 6:1872f591d604 490 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 491 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 492
okini3939 0:2e953bbaf3a5 493 /* Send opcode */
LeoHsueh 5:ef7247c6f073 494 _spi->write(AT45DB161D_DEEP_POWER_DOWN);
okini3939 0:2e953bbaf3a5 495
okini3939 0:2e953bbaf3a5 496 /* Enter Deep Power-Down mode */
okini3939 0:2e953bbaf3a5 497 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 498
okini3939 0:2e953bbaf3a5 499 /* Safety delay */
okini3939 0:2e953bbaf3a5 500 // delay(100);
okini3939 0:2e953bbaf3a5 501 wait_ms(100);
okini3939 0:2e953bbaf3a5 502 }
okini3939 0:2e953bbaf3a5 503
okini3939 0:2e953bbaf3a5 504 /**
okini3939 0:2e953bbaf3a5 505 * Takes the device out of Deep Power-down mode.
okini3939 0:2e953bbaf3a5 506 **/
LeoHsueh 6:1872f591d604 507 void ATD45DB161D::ResumeFromDeepPowerDown() {
LeoHsueh 6:1872f591d604 508 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 509 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 510
okini3939 0:2e953bbaf3a5 511 /* Send opcode */
LeoHsueh 5:ef7247c6f073 512 _spi->write(AT45DB161D_RESUME_FROM_DEEP_POWER_DOWN);
okini3939 0:2e953bbaf3a5 513
okini3939 0:2e953bbaf3a5 514 /* Resume device */
okini3939 0:2e953bbaf3a5 515 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 516
okini3939 0:2e953bbaf3a5 517 /* The CS pin must stay high during t_RDPD microseconds before the device
okini3939 0:2e953bbaf3a5 518 * can receive any commands.
okini3939 0:2e953bbaf3a5 519 * On the at45db161D t_RDPD = 35 microseconds. But we will wait 100
okini3939 0:2e953bbaf3a5 520 * (just to be sure). */
okini3939 0:2e953bbaf3a5 521 // delay(100);
okini3939 0:2e953bbaf3a5 522 wait_ms(100);
okini3939 0:2e953bbaf3a5 523 }
LeoHsueh 6:1872f591d604 524
okini3939 0:2e953bbaf3a5 525 /** **/