HSUEH YU-MIN / flash_at45db

SPI Flash AT45DBXXXD

Fork of at45db161d by Suga koubou

at45db161d.cpp@8:1ec3997fe258, 2015-03-06 (annotated)

Committer:
LeoHsueh
Date:
Fri Mar 06 19:54:06 2015 +0800
Revision:
8:1ec3997fe258
Parent:
7:2f9d8b47704f
Child:
9:8b1cf34d290e
Fix addr to page.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
okini3939 0:2e953bbaf3a5 1 /**
okini3939 0:2e953bbaf3a5 2 * AT45DB161D module for arduino (C) Vincent
okini3939 0:2e953bbaf3a5 3 * SPI flash memory
okini3939 0:2e953bbaf3a5 4 * http://blog.blockos.org/?p=27
okini3939 0:2e953bbaf3a5 5 *
okini3939 0:2e953bbaf3a5 6 * bug fix by todotani
okini3939 0:2e953bbaf3a5 7 * http://todotani.cocolog-nifty.com/blog/2009/07/arduino-4cf4.html
okini3939 0:2e953bbaf3a5 8 *
okini3939 0:2e953bbaf3a5 9 * Modified for mbed, 2011 Suga.
okini3939 0:2e953bbaf3a5 10 */
LeoHsueh 6:1872f591d604 11
okini3939 0:2e953bbaf3a5 12 #include "at45db161d.h"
LeoHsueh 6:1872f591d604 13 #include "at45db161d_commands.h"
okini3939 0:2e953bbaf3a5 14
LeoHsueh 6:1872f591d604 15 #define DF_CS_inactive _cs = 1
LeoHsueh 6:1872f591d604 16 #define DF_CS_active _cs = 0
LeoHsueh 6:1872f591d604 17
LeoHsueh 6:1872f591d604 18 ATD45DB161D::ATD45DB161D(SPI *spi, PinName cs) :
LeoHsueh 6:1872f591d604 19 _spi(spi), _cs(cs) {
LeoHsueh 7:2f9d8b47704f 20 // pageSize = 264;
LeoHsueh 7:2f9d8b47704f 21 // pageLength = 4095;
LeoHsueh 6:1872f591d604 22 /* Disable device */
LeoHsueh 6:1872f591d604 23 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 24
okini3939 0:2e953bbaf3a5 25 /* Setup SPI */
LeoHsueh 5:ef7247c6f073 26 _spi->format(8, 0);
LeoHsueh 5:ef7247c6f073 27 _spi->frequency(10000000);
LeoHsueh 7:2f9d8b47704f 28
LeoHsueh 7:2f9d8b47704f 29 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 7:2f9d8b47704f 30 DF_CS_active; /* to reset Dataflash command decoder */
LeoHsueh 7:2f9d8b47704f 31
LeoHsueh 7:2f9d8b47704f 32 /* Send status read command */
LeoHsueh 7:2f9d8b47704f 33 _spi->write(AT45DB161D_READ_MANUFACTURER_AND_DEVICE_ID);
LeoHsueh 7:2f9d8b47704f 34
LeoHsueh 7:2f9d8b47704f 35 /* Manufacturer ID */
LeoHsueh 7:2f9d8b47704f 36 _info.manufacturer = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 37 /* Device ID (part 1) */
LeoHsueh 7:2f9d8b47704f 38 _info.device[0] = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 39 /* Device ID (part 2) */
LeoHsueh 7:2f9d8b47704f 40 _info.device[1] = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 41 /* Extended Device Information String Length */
LeoHsueh 7:2f9d8b47704f 42 _info.extendedInfoLength = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 43 _info.pageSize = 264;
LeoHsueh 7:2f9d8b47704f 44 _info.pageLength = 4095;
okini3939 0:2e953bbaf3a5 45 }
okini3939 0:2e953bbaf3a5 46
okini3939 0:2e953bbaf3a5 47 /**
okini3939 0:2e953bbaf3a5 48 * Read status register
okini3939 0:2e953bbaf3a5 49 * @return The content of the status register
okini3939 0:2e953bbaf3a5 50 **/
LeoHsueh 6:1872f591d604 51 uint8_t ATD45DB161D::ReadStatusRegister() {
okini3939 0:2e953bbaf3a5 52 uint8_t status;
okini3939 0:2e953bbaf3a5 53
LeoHsueh 6:1872f591d604 54 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 55 DF_CS_active; /* to reset Dataflash command decoder */
LeoHsueh 6:1872f591d604 56
okini3939 0:2e953bbaf3a5 57 /* Send status read command */
LeoHsueh 5:ef7247c6f073 58 _spi->write(AT45DB161D_STATUS_REGISTER_READ);
okini3939 0:2e953bbaf3a5 59 /* Get result with a dummy write */
LeoHsueh 5:ef7247c6f073 60 status = _spi->write(0x00);
okini3939 0:2e953bbaf3a5 61
okini3939 0:2e953bbaf3a5 62 return status;
okini3939 0:2e953bbaf3a5 63 }
okini3939 0:2e953bbaf3a5 64
okini3939 0:2e953bbaf3a5 65 /**
okini3939 0:2e953bbaf3a5 66 * Read Manufacturer and Device ID
okini3939 0:2e953bbaf3a5 67 * @note if id.extendedInfoLength is not equal to zero,
LeoHsueh 5:ef7247c6f073 68 * successive calls to _spi->write(0xff) will return
okini3939 0:2e953bbaf3a5 69 * the extended device information string bytes.
okini3939 0:2e953bbaf3a5 70 * @param id Pointer to the ID structure to initialize
okini3939 0:2e953bbaf3a5 71 **/
LeoHsueh 7:2f9d8b47704f 72 ATD45DB161D::Info *ATD45DB161D::getInfo() {
LeoHsueh 7:2f9d8b47704f 73 return &_info;
okini3939 0:2e953bbaf3a5 74 }
okini3939 0:2e953bbaf3a5 75
okini3939 0:2e953bbaf3a5 76 /**
okini3939 0:2e953bbaf3a5 77 * Main Memory Page Read.
okini3939 0:2e953bbaf3a5 78 * A main memory page read allows the user to read data directly from
okini3939 0:2e953bbaf3a5 79 * any one of the 4096 pages in the main memory, bypassing both of the
okini3939 0:2e953bbaf3a5 80 * data buffers and leaving the contents of the buffers unchanged.
okini3939 0:2e953bbaf3a5 81 *
okini3939 0:2e953bbaf3a5 82 * @param page Page of the main memory to read
okini3939 0:2e953bbaf3a5 83 * @param offset Starting byte address within the page
okini3939 0:2e953bbaf3a5 84 **/
LeoHsueh 6:1872f591d604 85 void ATD45DB161D::ReadMainMemoryPage(uint16_t page, uint16_t offset) {
LeoHsueh 6:1872f591d604 86 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 87 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 88
okini3939 0:2e953bbaf3a5 89 /* Send opcode */
LeoHsueh 5:ef7247c6f073 90 _spi->write(AT45DB161D_PAGE_READ);
okini3939 0:2e953bbaf3a5 91
okini3939 0:2e953bbaf3a5 92 /* Address (page | offset) */
LeoHsueh 6:1872f591d604 93 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 94 _spi->write((uint8_t) ((page << 2) | (offset >> 8)));
LeoHsueh 6:1872f591d604 95 _spi->write((uint8_t) (offset & 0xff));
okini3939 0:2e953bbaf3a5 96
okini3939 0:2e953bbaf3a5 97 /* 4 "don't care" bytes */
LeoHsueh 5:ef7247c6f073 98 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 99 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 100 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 101 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 102 }
okini3939 0:2e953bbaf3a5 103
okini3939 0:2e953bbaf3a5 104 /**
okini3939 0:2e953bbaf3a5 105 * Continuous Array Read.
okini3939 0:2e953bbaf3a5 106 * Sequentially read a continuous stream of data.
okini3939 0:2e953bbaf3a5 107 * @param page Page of the main memory where the sequential read will start
okini3939 0:2e953bbaf3a5 108 * @param offset Starting byte address within the page
okini3939 0:2e953bbaf3a5 109 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false).
okini3939 0:2e953bbaf3a5 110 * @note The legacy mode is not currently supported
okini3939 0:2e953bbaf3a5 111 **/
LeoHsueh 6:1872f591d604 112 void ATD45DB161D::ContinuousArrayRead(uint16_t page, uint16_t offset, uint8_t low) {
LeoHsueh 6:1872f591d604 113 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 114 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 115
okini3939 0:2e953bbaf3a5 116 /* Send opcode */
LeoHsueh 6:1872f591d604 117 _spi->write(low ? AT45DB161D_CONTINUOUS_READ_LOW_FREQ :
LeoHsueh 6:1872f591d604 118 AT45DB161D_CONTINUOUS_READ_HIGH_FREQ);
okini3939 0:2e953bbaf3a5 119
okini3939 0:2e953bbaf3a5 120 /* Address (page | offset) */
LeoHsueh 6:1872f591d604 121 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 122 _spi->write((uint8_t) ((page << 2) | (offset >> 8)));
LeoHsueh 6:1872f591d604 123 _spi->write((uint8_t) (offset & 0xff));
okini3939 0:2e953bbaf3a5 124
LeoHsueh 6:1872f591d604 125 if (!low) {
LeoHsueh 6:1872f591d604 126 _spi->write(0x00);
LeoHsueh 6:1872f591d604 127 }
okini3939 0:2e953bbaf3a5 128 }
okini3939 0:2e953bbaf3a5 129
LeoHsueh 8:1ec3997fe258 130 void ATD45DB161D::readBuffer(uint16_t page, void *ptr, uint16_t len) {
leolleeooleo 4:943690efda8b 131 uint8_t *buf = reinterpret_cast<uint8_t*>(ptr);
LeoHsueh 7:2f9d8b47704f 132 uint16_t i;
LeoHsueh 7:2f9d8b47704f 133 while (len > 0) {
LeoHsueh 8:1ec3997fe258 134 PageToBuffer(page++, 1);
LeoHsueh 8:1ec3997fe258 135 BufferRead(1, 0, 1);
LeoHsueh 7:2f9d8b47704f 136 uint16_t wlen = (_info.pageSize < len ? _info.pageSize : len);
LeoHsueh 7:2f9d8b47704f 137 for (i = 0; i < wlen; i++) {
LeoHsueh 7:2f9d8b47704f 138 *buf++ = _spi->write(0xff);
LeoHsueh 7:2f9d8b47704f 139 }
LeoHsueh 7:2f9d8b47704f 140 len -= wlen;
??? 3:82157896d90d 141 }
??? 3:82157896d90d 142 }
??? 3:82157896d90d 143
LeoHsueh 8:1ec3997fe258 144 void ATD45DB161D::writeBuffer(uint16_t page, void *ptr, uint16_t len) {
leolleeooleo 4:943690efda8b 145 uint8_t *buf = reinterpret_cast<uint8_t*>(ptr);
??? 3:82157896d90d 146 uint16_t i;
??? 3:82157896d90d 147 while (len > 0) {
LeoHsueh 8:1ec3997fe258 148 BufferWrite(2, 0);
LeoHsueh 7:2f9d8b47704f 149 uint16_t wlen = (_info.pageSize < len ? _info.pageSize : len);
leolleeooleo 4:943690efda8b 150 for (i = 0; i < wlen; i++) {
LeoHsueh 5:ef7247c6f073 151 _spi->write(*buf++);
??? 3:82157896d90d 152 }
LeoHsueh 8:1ec3997fe258 153 BufferToPage(2, page++, 1);
leolleeooleo 4:943690efda8b 154 len -= wlen;
??? 3:82157896d90d 155 }
??? 3:82157896d90d 156 }
okini3939 0:2e953bbaf3a5 157
okini3939 0:2e953bbaf3a5 158 /**
okini3939 0:2e953bbaf3a5 159 * Read the content of one of the SRAM data buffers (in low or high speed mode).
okini3939 0:2e953bbaf3a5 160 * @param bufferNum Buffer to read (1 or 2)
okini3939 0:2e953bbaf3a5 161 * @param offset Starting byte within the buffer
okini3939 0:2e953bbaf3a5 162 * @param low If true the read operation will be performed in low speed mode (and in high speed mode if it's false).
okini3939 0:2e953bbaf3a5 163 **/
LeoHsueh 6:1872f591d604 164 void ATD45DB161D::BufferRead(uint8_t bufferNum, uint16_t offset, uint8_t low) {
LeoHsueh 6:1872f591d604 165 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 166 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 167
okini3939 0:2e953bbaf3a5 168 /* Send opcode */
LeoHsueh 6:1872f591d604 169 if (bufferNum == 1) {
LeoHsueh 5:ef7247c6f073 170 _spi->write(low ? AT45DB161D_BUFFER_1_READ_LOW_FREQ :
LeoHsueh 6:1872f591d604 171 AT45DB161D_BUFFER_1_READ);
LeoHsueh 6:1872f591d604 172 } else {
LeoHsueh 5:ef7247c6f073 173 _spi->write(low ? AT45DB161D_BUFFER_2_READ_LOW_FREQ :
LeoHsueh 6:1872f591d604 174 AT45DB161D_BUFFER_2_READ);
okini3939 0:2e953bbaf3a5 175
okini3939 0:2e953bbaf3a5 176 }
okini3939 0:2e953bbaf3a5 177
okini3939 0:2e953bbaf3a5 178 /* 14 "Don't care" bits */
LeoHsueh 5:ef7247c6f073 179 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 180 /* Rest of the "don't care" bits + bits 8,9 of the offset */
LeoHsueh 6:1872f591d604 181 _spi->write((uint8_t) (offset >> 8));
okini3939 0:2e953bbaf3a5 182 /* bits 7-0 of the offset */
LeoHsueh 6:1872f591d604 183 _spi->write((uint8_t) (offset & 0xff));
okini3939 0:2e953bbaf3a5 184 }
okini3939 0:2e953bbaf3a5 185
okini3939 0:2e953bbaf3a5 186 /**
okini3939 0:2e953bbaf3a5 187 * Write data to one of the SRAM data buffers. Any further call to
okini3939 0:2e953bbaf3a5 188 * spi_tranfer will return bytes contained in the data buffer until
okini3939 0:2e953bbaf3a5 189 * a low-to-high transition is detected on the CS pin. If the end of
okini3939 0:2e953bbaf3a5 190 * the data buffer is reached, the device will wrap around back to the
okini3939 0:2e953bbaf3a5 191 * beginning of the buffer.
okini3939 0:2e953bbaf3a5 192 * @param bufferNum Buffer to read (1 or 2)
okini3939 0:2e953bbaf3a5 193 * @param offset Starting byte within the buffer
okini3939 0:2e953bbaf3a5 194 **/
LeoHsueh 6:1872f591d604 195 void ATD45DB161D::BufferWrite(uint8_t bufferNum, uint16_t offset) {
LeoHsueh 6:1872f591d604 196 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 197 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 198
LeoHsueh 6:1872f591d604 199 _spi->write((bufferNum == 1) ? AT45DB161D_BUFFER_1_WRITE :
LeoHsueh 6:1872f591d604 200 AT45DB161D_BUFFER_2_WRITE);
okini3939 0:2e953bbaf3a5 201
okini3939 0:2e953bbaf3a5 202 /* 14 "Don't care" bits */
LeoHsueh 5:ef7247c6f073 203 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 204 /* Rest of the "don't care" bits + bits 8,9 of the offset */
LeoHsueh 6:1872f591d604 205 _spi->write((uint8_t) (offset >> 8));
okini3939 0:2e953bbaf3a5 206 /* bits 7-0 of the offset */
LeoHsueh 6:1872f591d604 207 _spi->write((uint8_t) (offset & 0xff));
okini3939 0:2e953bbaf3a5 208 }
okini3939 0:2e953bbaf3a5 209
okini3939 0:2e953bbaf3a5 210 /**
okini3939 0:2e953bbaf3a5 211 * Transfer data from buffer 1 or 2 to main memory page.
okini3939 0:2e953bbaf3a5 212 * @param bufferNum Buffer to use (1 or 2)
okini3939 0:2e953bbaf3a5 213 * @param page Page where the content of the buffer will transfered
okini3939 0:2e953bbaf3a5 214 * @param erase If set the page will be first erased before the buffer transfer.
okini3939 0:2e953bbaf3a5 215 * @note If erase is equal to zero, the page must have been previously erased using one of the erase command (Page or Block Erase).
okini3939 0:2e953bbaf3a5 216 **/
LeoHsueh 6:1872f591d604 217 void ATD45DB161D::BufferToPage(uint8_t bufferNum, uint16_t page, uint8_t erase) {
LeoHsueh 6:1872f591d604 218 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 219 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 220
okini3939 0:2e953bbaf3a5 221 /* Opcode */
LeoHsueh 6:1872f591d604 222 if (erase) {
LeoHsueh 6:1872f591d604 223 _spi->write((bufferNum == 1) ? AT45DB161D_BUFFER_1_TO_PAGE_WITH_ERASE :
LeoHsueh 6:1872f591d604 224 AT45DB161D_BUFFER_2_TO_PAGE_WITH_ERASE);
LeoHsueh 6:1872f591d604 225 } else {
LeoHsueh 6:1872f591d604 226 _spi->write((bufferNum == 1) ? AT45DB161D_BUFFER_1_TO_PAGE_WITHOUT_ERASE :
LeoHsueh 6:1872f591d604 227 AT45DB161D_BUFFER_2_TO_PAGE_WITHOUT_ERASE);
okini3939 0:2e953bbaf3a5 228 }
okini3939 0:2e953bbaf3a5 229
okini3939 0:2e953bbaf3a5 230 /*
okini3939 0:2e953bbaf3a5 231 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 232 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 233 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 234 * the main memory to be written
okini3939 0:2e953bbaf3a5 235 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 236 */
LeoHsueh 6:1872f591d604 237 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 238 _spi->write((uint8_t) (page << 2));
LeoHsueh 5:ef7247c6f073 239 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 240
LeoHsueh 6:1872f591d604 241 DF_CS_inactive; /* Start transfer */
LeoHsueh 6:1872f591d604 242 DF_CS_active; /* If erase was set, the page will first be erased */
okini3939 0:2e953bbaf3a5 243
okini3939 0:2e953bbaf3a5 244 /* Wait for the end of the transfer */
LeoHsueh 6:1872f591d604 245 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 246 }
okini3939 0:2e953bbaf3a5 247 }
okini3939 0:2e953bbaf3a5 248
okini3939 0:2e953bbaf3a5 249 /**
okini3939 0:2e953bbaf3a5 250 * Transfer a page of data from main memory to buffer 1 or 2.
okini3939 0:2e953bbaf3a5 251 * @param page Main memory page to transfer
okini3939 0:2e953bbaf3a5 252 * @param buffer Buffer (1 or 2) where the data will be written
okini3939 0:2e953bbaf3a5 253 **/
LeoHsueh 6:1872f591d604 254 void ATD45DB161D::PageToBuffer(uint16_t page, uint8_t bufferNum) {
LeoHsueh 6:1872f591d604 255 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 256 DF_CS_active; /* to reset Dataflash command decoder */
LeoHsueh 6:1872f591d604 257
okini3939 0:2e953bbaf3a5 258 /* Send opcode */
LeoHsueh 5:ef7247c6f073 259 _spi->write((bufferNum == 1) ? AT45DB161D_TRANSFER_PAGE_TO_BUFFER_1 :
LeoHsueh 6:1872f591d604 260 AT45DB161D_TRANSFER_PAGE_TO_BUFFER_2);
okini3939 0:2e953bbaf3a5 261
okini3939 0:2e953bbaf3a5 262 /*
okini3939 0:2e953bbaf3a5 263 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 264 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 265 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 266 * the main memory to be written
okini3939 0:2e953bbaf3a5 267 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 268 */
LeoHsueh 6:1872f591d604 269 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 270 _spi->write((uint8_t) (page << 2));
LeoHsueh 5:ef7247c6f073 271 _spi->write(0x00);
LeoHsueh 6:1872f591d604 272
LeoHsueh 6:1872f591d604 273 DF_CS_inactive; /* Start page transfer */
okini3939 0:2e953bbaf3a5 274 DF_CS_active;
okini3939 0:2e953bbaf3a5 275
okini3939 0:2e953bbaf3a5 276 /* Wait for the end of the transfer */
LeoHsueh 6:1872f591d604 277 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 278 }
okini3939 0:2e953bbaf3a5 279 }
okini3939 0:2e953bbaf3a5 280
okini3939 0:2e953bbaf3a5 281 /**
okini3939 0:2e953bbaf3a5 282 * Erase a page in the main memory array.
okini3939 0:2e953bbaf3a5 283 * @param page Page to erase
okini3939 0:2e953bbaf3a5 284 **/
LeoHsueh 6:1872f591d604 285 void ATD45DB161D::PageErase(uint16_t page) {
LeoHsueh 6:1872f591d604 286 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 287 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 288
okini3939 0:2e953bbaf3a5 289 /* Send opcode */
LeoHsueh 5:ef7247c6f073 290 _spi->write(AT45DB161D_PAGE_ERASE);
okini3939 0:2e953bbaf3a5 291
okini3939 0:2e953bbaf3a5 292 /*
okini3939 0:2e953bbaf3a5 293 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 294 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 295 * - 12 page address bits (PA11 - PA0) that specify the page in
okini3939 0:2e953bbaf3a5 296 * the main memory to be written
okini3939 0:2e953bbaf3a5 297 * - 10 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 298 */
LeoHsueh 6:1872f591d604 299 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 300 _spi->write((uint8_t) (page << 2));
LeoHsueh 5:ef7247c6f073 301 _spi->write(0x00);
LeoHsueh 6:1872f591d604 302
LeoHsueh 6:1872f591d604 303 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 304 DF_CS_active;
okini3939 0:2e953bbaf3a5 305
okini3939 0:2e953bbaf3a5 306 /* Wait for the end of the block erase operation */
LeoHsueh 6:1872f591d604 307 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 308 }
okini3939 0:2e953bbaf3a5 309 }
okini3939 0:2e953bbaf3a5 310
okini3939 0:2e953bbaf3a5 311 /**
okini3939 0:2e953bbaf3a5 312 * Erase a block of eight pages at one time.
okini3939 0:2e953bbaf3a5 313 * @param block Index of the block to erase
okini3939 0:2e953bbaf3a5 314 **/
LeoHsueh 6:1872f591d604 315 void ATD45DB161D::BlockErase(uint16_t block) {
LeoHsueh 6:1872f591d604 316 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 317 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 318
okini3939 0:2e953bbaf3a5 319 /* Send opcode */
LeoHsueh 5:ef7247c6f073 320 _spi->write(AT45DB161D_BLOCK_ERASE);
okini3939 0:2e953bbaf3a5 321
okini3939 0:2e953bbaf3a5 322 /*
okini3939 0:2e953bbaf3a5 323 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 324 * - 2 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 325 * - 9 block address bits (PA11 - PA3)
okini3939 0:2e953bbaf3a5 326 * - 13 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 327 */
LeoHsueh 6:1872f591d604 328 _spi->write((uint8_t) (block >> 3));
LeoHsueh 6:1872f591d604 329 _spi->write((uint8_t) (block << 5));
LeoHsueh 5:ef7247c6f073 330 _spi->write(0x00);
LeoHsueh 6:1872f591d604 331
LeoHsueh 6:1872f591d604 332 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 333 DF_CS_active;
okini3939 0:2e953bbaf3a5 334
okini3939 0:2e953bbaf3a5 335 /* Wait for the end of the block erase operation */
LeoHsueh 6:1872f591d604 336 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 337 }
okini3939 0:2e953bbaf3a5 338 }
okini3939 0:2e953bbaf3a5 339
okini3939 0:2e953bbaf3a5 340 /**
okini3939 0:2e953bbaf3a5 341 * Erase a sector in main memory. There are 16 sector on the
okini3939 0:2e953bbaf3a5 342 * at45db161d and only one can be erased at one time.
okini3939 0:2e953bbaf3a5 343 * @param sector Sector to erase (1-15)
okini3939 0:2e953bbaf3a5 344 **/
LeoHsueh 6:1872f591d604 345 void ATD45DB161D::SectoreErase(uint8_t sector) {
LeoHsueh 6:1872f591d604 346 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 347 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 348
okini3939 0:2e953bbaf3a5 349 /* Send opcode */
LeoHsueh 5:ef7247c6f073 350 _spi->write(AT45DB161D_SECTOR_ERASE);
okini3939 0:2e953bbaf3a5 351
okini3939 0:2e953bbaf3a5 352 /*
okini3939 0:2e953bbaf3a5 353 * 3 address bytes consist of :
okini3939 0:2e953bbaf3a5 354 */
LeoHsueh 6:1872f591d604 355 if ((sector == 0x0a) || (sector == 0x0b)) {
okini3939 0:2e953bbaf3a5 356 /*
okini3939 0:2e953bbaf3a5 357 * - 11 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 358 * -
okini3939 0:2e953bbaf3a5 359 * - 12 don&#65533;ft care bits
okini3939 0:2e953bbaf3a5 360 */
LeoHsueh 5:ef7247c6f073 361 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 362 _spi->write(((sector & 0x01) << 4));
LeoHsueh 5:ef7247c6f073 363 _spi->write(0x00);
LeoHsueh 6:1872f591d604 364 } else {
okini3939 0:2e953bbaf3a5 365 /*
okini3939 0:2e953bbaf3a5 366 * - 2 don't care bits
okini3939 0:2e953bbaf3a5 367 * - 4 sector number bits
okini3939 0:2e953bbaf3a5 368 * - 18 don't care bits
okini3939 0:2e953bbaf3a5 369 */
LeoHsueh 5:ef7247c6f073 370 _spi->write(sector << 1);
LeoHsueh 5:ef7247c6f073 371 _spi->write(0x00);
LeoHsueh 5:ef7247c6f073 372 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 373 }
LeoHsueh 6:1872f591d604 374
LeoHsueh 6:1872f591d604 375 DF_CS_inactive; /* Start block erase */
okini3939 0:2e953bbaf3a5 376 DF_CS_active;
okini3939 0:2e953bbaf3a5 377
okini3939 0:2e953bbaf3a5 378 /* Wait for the end of the block erase operation */
LeoHsueh 6:1872f591d604 379 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 380 }
okini3939 0:2e953bbaf3a5 381 }
okini3939 0:2e953bbaf3a5 382
okini3939 0:2e953bbaf3a5 383 /**
okini3939 0:2e953bbaf3a5 384 * Erase the entire chip memory. Sectors proteced or locked down will
okini3939 0:2e953bbaf3a5 385 * not be erased.
okini3939 0:2e953bbaf3a5 386 **/
LeoHsueh 6:1872f591d604 387 void ATD45DB161D::ChipErase() {
LeoHsueh 6:1872f591d604 388 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 389 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 390
okini3939 0:2e953bbaf3a5 391 /* Send chip erase sequence */
LeoHsueh 5:ef7247c6f073 392 _spi->write(AT45DB161D_CHIP_ERASE_0);
LeoHsueh 5:ef7247c6f073 393 _spi->write(AT45DB161D_CHIP_ERASE_1);
LeoHsueh 5:ef7247c6f073 394 _spi->write(AT45DB161D_CHIP_ERASE_2);
LeoHsueh 5:ef7247c6f073 395 _spi->write(AT45DB161D_CHIP_ERASE_3);
LeoHsueh 6:1872f591d604 396
LeoHsueh 6:1872f591d604 397 DF_CS_inactive; /* Start chip erase */
okini3939 0:2e953bbaf3a5 398 DF_CS_active;
okini3939 0:2e953bbaf3a5 399
okini3939 0:2e953bbaf3a5 400 /* Wait for the end of the chip erase operation */
LeoHsueh 6:1872f591d604 401 while (!(ReadStatusRegister() & READY_BUSY))
LeoHsueh 6:1872f591d604 402 ;
okini3939 0:2e953bbaf3a5 403 }
okini3939 0:2e953bbaf3a5 404
okini3939 0:2e953bbaf3a5 405 /**
okini3939 0:2e953bbaf3a5 406 * This a combination of Buffer Write and Buffer to Page with
okini3939 0:2e953bbaf3a5 407 * Built-in Erase.
okini3939 0:2e953bbaf3a5 408 * @note You must call EndAndWait in order to start transfering data from buffer to page
okini3939 0:2e953bbaf3a5 409 * @param page Page where the content of the buffer will transfered
okini3939 0:2e953bbaf3a5 410 * @param offset Starting byte address within the buffer
okini3939 0:2e953bbaf3a5 411 * @param bufferNum Buffer to use (1 or 2)
okini3939 0:2e953bbaf3a5 412 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 413 **/
LeoHsueh 6:1872f591d604 414 void ATD45DB161D::BeginPageWriteThroughBuffer(uint16_t page, uint16_t offset, uint8_t bufferNum) {
LeoHsueh 6:1872f591d604 415 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 416 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 417
okini3939 0:2e953bbaf3a5 418 /* Send opcode */
LeoHsueh 5:ef7247c6f073 419 _spi->write((bufferNum == 1) ? AT45DB161D_PAGE_THROUGH_BUFFER_1 :
LeoHsueh 6:1872f591d604 420 AT45DB161D_PAGE_THROUGH_BUFFER_2);
okini3939 0:2e953bbaf3a5 421
okini3939 0:2e953bbaf3a5 422 /* Address */
LeoHsueh 6:1872f591d604 423 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 424 _spi->write((uint8_t) ((page << 2) | (offset >> 8)));
LeoHsueh 6:1872f591d604 425 _spi->write((uint8_t) offset);
okini3939 0:2e953bbaf3a5 426 }
okini3939 0:2e953bbaf3a5 427
okini3939 0:2e953bbaf3a5 428 /**
okini3939 0:2e953bbaf3a5 429 * Perform a low-to-high transition on the CS pin and then poll
okini3939 0:2e953bbaf3a5 430 * the status register to check if the dataflash is busy.
okini3939 0:2e953bbaf3a5 431 **/
LeoHsueh 6:1872f591d604 432 void ATD45DB161D::EndAndWait() {
LeoHsueh 6:1872f591d604 433 DF_CS_inactive; /* End current operation */
LeoHsueh 6:1872f591d604 434 DF_CS_active; /* Some internal operation may occur
LeoHsueh 6:1872f591d604 435 * (buffer to page transfer, page erase, etc... ) */
okini3939 0:2e953bbaf3a5 436
okini3939 0:2e953bbaf3a5 437 /* Wait for the chip to be ready */
LeoHsueh 6:1872f591d604 438 while (!(ReadStatusRegister() & READY_BUSY)) {
LeoHsueh 6:1872f591d604 439 }
LeoHsueh 6:1872f591d604 440
LeoHsueh 6:1872f591d604 441 DF_CS_inactive; /* Release SPI Bus */
okini3939 0:2e953bbaf3a5 442 }
okini3939 0:2e953bbaf3a5 443
okini3939 0:2e953bbaf3a5 444 /**
okini3939 0:2e953bbaf3a5 445 * Compare a page of data in main memory to the data in buffer 1 or 2.
okini3939 0:2e953bbaf3a5 446 * @param page Page to test
okini3939 0:2e953bbaf3a5 447 * @param bufferNum Buffer number
okini3939 0:2e953bbaf3a5 448 * @return
okini3939 0:2e953bbaf3a5 449 * - 1 if the page and the buffer contains the same data
okini3939 0:2e953bbaf3a5 450 * - 0 else
okini3939 0:2e953bbaf3a5 451 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 452 **/
LeoHsueh 6:1872f591d604 453 int8_t ATD45DB161D::ComparePageToBuffer(uint16_t page, uint8_t bufferNum) {
okini3939 0:2e953bbaf3a5 454 uint8_t status;
okini3939 0:2e953bbaf3a5 455
LeoHsueh 6:1872f591d604 456 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 457 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 458
okini3939 0:2e953bbaf3a5 459 /* Send opcode */
LeoHsueh 5:ef7247c6f073 460 _spi->write((bufferNum == 1) ? AT45DB161D_COMPARE_PAGE_TO_BUFFER_1 :
LeoHsueh 6:1872f591d604 461 AT45DB161D_COMPARE_PAGE_TO_BUFFER_2);
okini3939 0:2e953bbaf3a5 462
okini3939 0:2e953bbaf3a5 463 /* Page address */
LeoHsueh 6:1872f591d604 464 _spi->write((uint8_t) (page >> 6));
LeoHsueh 6:1872f591d604 465 _spi->write((uint8_t) (page << 2));
LeoHsueh 5:ef7247c6f073 466 _spi->write(0x00);
okini3939 0:2e953bbaf3a5 467
LeoHsueh 6:1872f591d604 468 DF_CS_inactive; /* Start comparaison */
okini3939 0:2e953bbaf3a5 469 DF_CS_active;
okini3939 0:2e953bbaf3a5 470
okini3939 0:2e953bbaf3a5 471 /* Wait for the end of the comparaison and get the result */
LeoHsueh 6:1872f591d604 472 while (!((status = ReadStatusRegister()) & READY_BUSY)) {
LeoHsueh 6:1872f591d604 473 }
LeoHsueh 6:1872f591d604 474
okini3939 0:2e953bbaf3a5 475 // return ((status & COMPARE) == COMPARE);
LeoHsueh 6:1872f591d604 476 return ((status & COMPARE) ? 0 : 1);
okini3939 0:2e953bbaf3a5 477 }
okini3939 0:2e953bbaf3a5 478
okini3939 0:2e953bbaf3a5 479 /**
okini3939 0:2e953bbaf3a5 480 * Put the device into the lowest power consumption mode.
okini3939 0:2e953bbaf3a5 481 * Once the device has entered the Deep Power-down mode, all
okini3939 0:2e953bbaf3a5 482 * instructions are ignored except the Resume from Deep
okini3939 0:2e953bbaf3a5 483 * Power-down command.
okini3939 0:2e953bbaf3a5 484 * @warning UNTESTED
okini3939 0:2e953bbaf3a5 485 **/
LeoHsueh 6:1872f591d604 486 void ATD45DB161D::DeepPowerDown() {
LeoHsueh 6:1872f591d604 487 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 488 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 489
okini3939 0:2e953bbaf3a5 490 /* Send opcode */
LeoHsueh 5:ef7247c6f073 491 _spi->write(AT45DB161D_DEEP_POWER_DOWN);
okini3939 0:2e953bbaf3a5 492
okini3939 0:2e953bbaf3a5 493 /* Enter Deep Power-Down mode */
okini3939 0:2e953bbaf3a5 494 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 495
okini3939 0:2e953bbaf3a5 496 /* Safety delay */
okini3939 0:2e953bbaf3a5 497 // delay(100);
okini3939 0:2e953bbaf3a5 498 wait_ms(100);
okini3939 0:2e953bbaf3a5 499 }
okini3939 0:2e953bbaf3a5 500
okini3939 0:2e953bbaf3a5 501 /**
okini3939 0:2e953bbaf3a5 502 * Takes the device out of Deep Power-down mode.
okini3939 0:2e953bbaf3a5 503 **/
LeoHsueh 6:1872f591d604 504 void ATD45DB161D::ResumeFromDeepPowerDown() {
LeoHsueh 6:1872f591d604 505 DF_CS_inactive; /* Make sure to toggle CS signal in order */
LeoHsueh 6:1872f591d604 506 DF_CS_active; /* to reset Dataflash command decoder */
okini3939 0:2e953bbaf3a5 507
okini3939 0:2e953bbaf3a5 508 /* Send opcode */
LeoHsueh 5:ef7247c6f073 509 _spi->write(AT45DB161D_RESUME_FROM_DEEP_POWER_DOWN);
okini3939 0:2e953bbaf3a5 510
okini3939 0:2e953bbaf3a5 511 /* Resume device */
okini3939 0:2e953bbaf3a5 512 DF_CS_inactive;
okini3939 0:2e953bbaf3a5 513
okini3939 0:2e953bbaf3a5 514 /* The CS pin must stay high during t_RDPD microseconds before the device
okini3939 0:2e953bbaf3a5 515 * can receive any commands.
okini3939 0:2e953bbaf3a5 516 * On the at45db161D t_RDPD = 35 microseconds. But we will wait 100
okini3939 0:2e953bbaf3a5 517 * (just to be sure). */
okini3939 0:2e953bbaf3a5 518 // delay(100);
okini3939 0:2e953bbaf3a5 519 wait_ms(100);
okini3939 0:2e953bbaf3a5 520 }
LeoHsueh 6:1872f591d604 521
okini3939 0:2e953bbaf3a5 522 /** **/