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InputOutput.h@0:8ad47e2b6f00, 2016-01-30 (annotated)
- Committer:
- igor_v
- Date:
- Sat Jan 30 13:00:39 2016 +0000
- Revision:
- 0:8ad47e2b6f00
- Child:
- 1:f2adcae3d304
2016_01_30;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
igor_v | 0:8ad47e2b6f00 | 1 | |
igor_v | 0:8ad47e2b6f00 | 2 | #include "Global.h" |
igor_v | 0:8ad47e2b6f00 | 3 | |
igor_v | 0:8ad47e2b6f00 | 4 | #include "stdint.h" |
igor_v | 0:8ad47e2b6f00 | 5 | |
igor_v | 0:8ad47e2b6f00 | 6 | //******************************I2C************************************************* |
igor_v | 0:8ad47e2b6f00 | 7 | #define I2C0 |
igor_v | 0:8ad47e2b6f00 | 8 | |
igor_v | 0:8ad47e2b6f00 | 9 | #define I2C_IDLE 1 |
igor_v | 0:8ad47e2b6f00 | 10 | #define I2C_BUSY 0 |
igor_v | 0:8ad47e2b6f00 | 11 | |
igor_v | 0:8ad47e2b6f00 | 12 | #define I2CONSET_I2EN 0x0000040 /* I2C Control Set Register */ |
igor_v | 0:8ad47e2b6f00 | 13 | #define I2CONSET_AA 0x0000004 |
igor_v | 0:8ad47e2b6f00 | 14 | #define I2CONSET_SI 0x0000008 |
igor_v | 0:8ad47e2b6f00 | 15 | #define I2CONSET_STO 0x0000010 |
igor_v | 0:8ad47e2b6f00 | 16 | #define I2CONSET_STA 0x0000020 |
igor_v | 0:8ad47e2b6f00 | 17 | |
igor_v | 0:8ad47e2b6f00 | 18 | #define I2CONCLR_AAC 0x0000004 /* I2C Control clear Register */ |
igor_v | 0:8ad47e2b6f00 | 19 | #define I2CONCLR_SIC 0x0000008 |
igor_v | 0:8ad47e2b6f00 | 20 | #define I2CONCLR_STAC 0x0000020 |
igor_v | 0:8ad47e2b6f00 | 21 | #define I2CONCLR_I2ENC 0x0000040 |
igor_v | 0:8ad47e2b6f00 | 22 | |
igor_v | 0:8ad47e2b6f00 | 23 | #define I2SCLH_SCLH 0x00000080 /* I2C SCL Duty Cycle High Reg */ |
igor_v | 0:8ad47e2b6f00 | 24 | #define I2SCLL_SCLL 0x00000080 /* I2C SCL Duty Cycle Low Reg */ |
igor_v | 0:8ad47e2b6f00 | 25 | |
igor_v | 0:8ad47e2b6f00 | 26 | #define I2C_WRITELENGTH 0x00000006 /*Buffer length*/ |
igor_v | 0:8ad47e2b6f00 | 27 | #define A_ADDRESS 0x0000005E /*address of slave potentiometer (table 6-2 of pot's manual)*/ |
igor_v | 0:8ad47e2b6f00 | 28 | #define B_ADDRESS 0x0000005C /*address of slave potentiometer (table 6-2 of pot's manual)*/ |
igor_v | 0:8ad47e2b6f00 | 29 | #define WRITE_CMD 0x00000000 /*address of wiper0 register in memory map*/ |
igor_v | 0:8ad47e2b6f00 | 30 | |
igor_v | 0:8ad47e2b6f00 | 31 | //********************************SPI************************************************ |
igor_v | 0:8ad47e2b6f00 | 32 | #define HALFWORDS_FOR_ADCs 3 |
igor_v | 0:8ad47e2b6f00 | 33 | |
igor_v | 0:8ad47e2b6f00 | 34 | #define WRITE_DAC0 0x00000030 //write data to DAC 0 |
igor_v | 0:8ad47e2b6f00 | 35 | #define WRITE_DAC1 0x00000031 //write data to DAC 1 |
igor_v | 0:8ad47e2b6f00 | 36 | |
igor_v | 0:8ad47e2b6f00 | 37 | #define DAC (1<<23) //DAC identifer |
igor_v | 0:8ad47e2b6f00 | 38 | #define ADC (1<<16) //ADC identifer |
igor_v | 0:8ad47e2b6f00 | 39 | |
igor_v | 0:8ad47e2b6f00 | 40 | #define SetCS(a) LPC_GPIO0->FIOSET = a //set CS signal for ADC or DAC |
igor_v | 0:8ad47e2b6f00 | 41 | #define ResetCS(a) LPC_GPIO0->FIOCLR = a //reset CS signal for ADC or DAC |
igor_v | 0:8ad47e2b6f00 | 42 | #define SetDAC(a) LPC_GPIO0->FIOSET = a //set CS signal for ADC or DAC |
igor_v | 0:8ad47e2b6f00 | 43 | #define ResetDAC(a) LPC_GPIO0->FIOCLR = a //reset CS signal for ADC or DAC |
igor_v | 0:8ad47e2b6f00 | 44 | |
igor_v | 0:8ad47e2b6f00 | 45 | |
igor_v | 0:8ad47e2b6f00 | 46 | |
igor_v | 0:8ad47e2b6f00 | 47 | #define SSPCR1_SSE 0x00000002 |
igor_v | 0:8ad47e2b6f00 | 48 | |
igor_v | 0:8ad47e2b6f00 | 49 | #define TX_SSP_EMPT 0x00000001 |
igor_v | 0:8ad47e2b6f00 | 50 | #define RX_SSP_notEMPT 0x00000004 |
igor_v | 0:8ad47e2b6f00 | 51 | #define TX_SSP_notFULL 0x00000002 |
igor_v | 0:8ad47e2b6f00 | 52 | #define RX_SSP_FULL 0x00000008 |
igor_v | 0:8ad47e2b6f00 | 53 | #define SSP_BUSY 0x00000010 |
igor_v | 0:8ad47e2b6f00 | 54 | |
igor_v | 0:8ad47e2b6f00 | 55 | #define ADC_ERR_MSK 0x00000001 |
igor_v | 0:8ad47e2b6f00 | 56 | #define DAC_ERR_MSK 0x00000002 |
igor_v | 0:8ad47e2b6f00 | 57 | |
igor_v | 0:8ad47e2b6f00 | 58 | #define TIMEOUT 1000 |
igor_v | 0:8ad47e2b6f00 | 59 | |
igor_v | 0:8ad47e2b6f00 | 60 | typedef union { |
igor_v | 0:8ad47e2b6f00 | 61 | int ArrayOut[31]; |
igor_v | 0:8ad47e2b6f00 | 62 | struct { |
igor_v | 0:8ad47e2b6f00 | 63 | int WP_reg; //e. PLC output voltage |
igor_v | 0:8ad47e2b6f00 | 64 | int WP_sin; //r. ������ ������ ��� - ����� 250 �� |
igor_v | 0:8ad47e2b6f00 | 65 | int WP_pll; //r. ����� XOR �� ������� ��� |
igor_v | 0:8ad47e2b6f00 | 66 | int HF_reg; //e. HFO output voltage |
igor_v | 0:8ad47e2b6f00 | 67 | |
igor_v | 0:8ad47e2b6f00 | 68 | int HF_dif; |
igor_v | 0:8ad47e2b6f00 | 69 | |
igor_v | 0:8ad47e2b6f00 | 70 | int WP_Phase_Det_Array[8]; //e. arrays for "worms" output //r. ������� ��� ������ "���������" |
igor_v | 0:8ad47e2b6f00 | 71 | int WP_sin_Array[8]; |
igor_v | 0:8ad47e2b6f00 | 72 | int WP_scope1, WP_scope2; //e. temporary variables for Rate3 monitoring //r. ��������� ���������� ��� ���������� � Rate3 |
igor_v | 0:8ad47e2b6f00 | 73 | |
igor_v | 0:8ad47e2b6f00 | 74 | uint32_t F_ras; //e. really output frequency, divided by 16 (for transmission) |
igor_v | 0:8ad47e2b6f00 | 75 | uint32_t L_Vibro; //e. period of oscillation of the dither drive //r. ������ ��������� ������������ |
igor_v | 0:8ad47e2b6f00 | 76 | uint32_t T_Vibro; //e. pulse width of the dither drive //r. ������������ �������� ������������ |
igor_v | 0:8ad47e2b6f00 | 77 | uint32_t T_VB_pll; //e. PD output of the frequency regulator of the dither drive //r. ����� �� ���������� ������� ������������ |
igor_v | 0:8ad47e2b6f00 | 78 | |
igor_v | 0:8ad47e2b6f00 | 79 | int PS_dif; |
igor_v | 0:8ad47e2b6f00 | 80 | int BINS_dif; |
igor_v | 0:8ad47e2b6f00 | 81 | int Cnt_Dif; |
igor_v | 0:8ad47e2b6f00 | 82 | int Cnt_Pls; |
igor_v | 0:8ad47e2b6f00 | 83 | int Cnt_Mns; |
igor_v | 0:8ad47e2b6f00 | 84 | int Tmp_Out[6]; |
igor_v | 0:8ad47e2b6f00 | 85 | |
igor_v | 0:8ad47e2b6f00 | 86 | __int64 SF_dif; |
igor_v | 0:8ad47e2b6f00 | 87 | |
igor_v | 0:8ad47e2b6f00 | 88 | } Str; |
igor_v | 0:8ad47e2b6f00 | 89 | } OUTPUT; |
igor_v | 0:8ad47e2b6f00 | 90 | |
igor_v | 0:8ad47e2b6f00 | 91 | |
igor_v | 0:8ad47e2b6f00 | 92 | typedef union { |
igor_v | 0:8ad47e2b6f00 | 93 | int ArrayIn[3]; |
igor_v | 0:8ad47e2b6f00 | 94 | struct { |
igor_v | 0:8ad47e2b6f00 | 95 | int Tmp_in[2]; |
igor_v | 0:8ad47e2b6f00 | 96 | int HF_out; |
igor_v | 0:8ad47e2b6f00 | 97 | int WP_sel; |
igor_v | 0:8ad47e2b6f00 | 98 | } StrIn; |
igor_v | 0:8ad47e2b6f00 | 99 | } INPUT; |
igor_v | 0:8ad47e2b6f00 | 100 | |
igor_v | 0:8ad47e2b6f00 | 101 | |
igor_v | 0:8ad47e2b6f00 | 102 | |
igor_v | 0:8ad47e2b6f00 | 103 | extern INPUT Input; |
igor_v | 0:8ad47e2b6f00 | 104 | extern OUTPUT Output; |
igor_v | 0:8ad47e2b6f00 | 105 | |
igor_v | 0:8ad47e2b6f00 | 106 | void DAC_ADC_Exchange_Init(void); |
igor_v | 0:8ad47e2b6f00 | 107 | void DAC_ADC_Exchange(void); |
igor_v | 0:8ad47e2b6f00 | 108 | void ADC_Input(void); |
igor_v | 0:8ad47e2b6f00 | 109 | |
igor_v | 0:8ad47e2b6f00 | 110 | void clc_HFO(void); |
igor_v | 0:8ad47e2b6f00 | 111 | |
igor_v | 0:8ad47e2b6f00 | 112 | int clc_WP_sin(void); |
igor_v | 0:8ad47e2b6f00 | 113 | void clc_PLC(void); |
igor_v | 0:8ad47e2b6f00 | 114 | void init_PLC(void); |
igor_v | 0:8ad47e2b6f00 | 115 | |
igor_v | 0:8ad47e2b6f00 | 116 | void clc_Pulses(void); |
igor_v | 0:8ad47e2b6f00 | 117 | void SOI_Init(void); |
igor_v | 0:8ad47e2b6f00 | 118 | |
igor_v | 0:8ad47e2b6f00 | 119 | void VibroDither_SwitchOn(void); |
igor_v | 0:8ad47e2b6f00 | 120 | void VibroDither_SwitchOff(void); |
igor_v | 0:8ad47e2b6f00 | 121 | void VibroDither_Set(void); |
igor_v | 0:8ad47e2b6f00 | 122 | void DACInit(void); |
igor_v | 0:8ad47e2b6f00 | 123 | void DAC_Output(int); |
igor_v | 0:8ad47e2b6f00 | 124 | void clc_ThermoSensors(void); |
igor_v | 0:8ad47e2b6f00 | 125 | |
igor_v | 0:8ad47e2b6f00 | 126 | void Out_G_photo(unsigned, unsigned); |
igor_v | 0:8ad47e2b6f00 | 127 | void G_Photo_Init( void ); |
igor_v | 0:8ad47e2b6f00 | 128 | void G_Photo_Exchange(void); |
igor_v | 0:8ad47e2b6f00 | 129 | |
igor_v | 0:8ad47e2b6f00 | 130 | //endof file |
igor_v | 0:8ad47e2b6f00 | 131 |