Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_wdog.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
50:a417edff4437 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 2 * @file em_wdog.c
<> 144:ef7eb2e8f9f7 3 * @brief Watchdog (WDOG) peripheral API
<> 144:ef7eb2e8f9f7 4 * devices.
<> 144:ef7eb2e8f9f7 5 * @version 4.2.1
<> 144:ef7eb2e8f9f7 6 *******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @section License
<> 144:ef7eb2e8f9f7 8 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
<> 144:ef7eb2e8f9f7 9 *******************************************************************************
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Permission is granted to anyone to use this software for any purpose,
<> 144:ef7eb2e8f9f7 12 * including commercial applications, and to alter it and redistribute it
<> 144:ef7eb2e8f9f7 13 * freely, subject to the following restrictions:
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 * 1. The origin of this software must not be misrepresented; you must not
<> 144:ef7eb2e8f9f7 16 * claim that you wrote the original software.
<> 144:ef7eb2e8f9f7 17 * 2. Altered source versions must be plainly marked as such, and must not be
<> 144:ef7eb2e8f9f7 18 * misrepresented as being the original software.
<> 144:ef7eb2e8f9f7 19 * 3. This notice may not be removed or altered from any source distribution.
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
<> 144:ef7eb2e8f9f7 22 * obligation to support this Software. Silicon Labs is providing the
<> 144:ef7eb2e8f9f7 23 * Software "AS IS", with no express or implied warranties of any kind,
<> 144:ef7eb2e8f9f7 24 * including, but not limited to, any implied warranties of merchantability
<> 144:ef7eb2e8f9f7 25 * or fitness for any particular purpose or warranties against infringement
<> 144:ef7eb2e8f9f7 26 * of any proprietary rights of a third party.
<> 144:ef7eb2e8f9f7 27 *
<> 144:ef7eb2e8f9f7 28 * Silicon Labs will not be liable for any consequential, incidental, or
<> 144:ef7eb2e8f9f7 29 * special damages, or any other relief, or for any claim by any third party,
<> 144:ef7eb2e8f9f7 30 * arising from your use of this Software.
<> 144:ef7eb2e8f9f7 31 *
<> 144:ef7eb2e8f9f7 32 ******************************************************************************/
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #include "em_wdog.h"
<> 144:ef7eb2e8f9f7 35 #if defined(WDOG_COUNT) && (WDOG_COUNT > 0)
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #if defined(WDOG0)
<> 144:ef7eb2e8f9f7 38 #define WDOG WDOG0
<> 144:ef7eb2e8f9f7 39 #if (WDOG_COUNT > 1)
<> 144:ef7eb2e8f9f7 40 #warning "Multiple watchdogs not supported"
<> 144:ef7eb2e8f9f7 41 #endif
<> 144:ef7eb2e8f9f7 42 #endif
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #include "em_bus.h"
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 47 * @addtogroup EM_Library
<> 144:ef7eb2e8f9f7 48 * @{
<> 144:ef7eb2e8f9f7 49 ******************************************************************************/
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 52 * @addtogroup WDOG
<> 144:ef7eb2e8f9f7 53 * @brief Watchdog (WDOG) Peripheral API
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 ******************************************************************************/
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /*******************************************************************************
<> 144:ef7eb2e8f9f7 58 ************************** GLOBAL FUNCTIONS *******************************
<> 144:ef7eb2e8f9f7 59 ******************************************************************************/
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 62 * @brief
<> 144:ef7eb2e8f9f7 63 * Enable/disable the watchdog timer.
<> 144:ef7eb2e8f9f7 64 *
<> 144:ef7eb2e8f9f7 65 * @note
<> 144:ef7eb2e8f9f7 66 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 67 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 68 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 69 * will stall until the previous synchronization has completed.
<> 144:ef7eb2e8f9f7 70 *
<> 144:ef7eb2e8f9f7 71 * @param[in] enable
<> 144:ef7eb2e8f9f7 72 * true to enable watchdog, false to disable. Watchdog cannot be disabled if
<> 144:ef7eb2e8f9f7 73 * watchdog has been locked.
<> 144:ef7eb2e8f9f7 74 ******************************************************************************/
<> 144:ef7eb2e8f9f7 75 void WDOG_Enable(bool enable)
<> 144:ef7eb2e8f9f7 76 {
<> 144:ef7eb2e8f9f7 77 if (!enable)
<> 144:ef7eb2e8f9f7 78 {
<> 144:ef7eb2e8f9f7 79 /* Wait for any pending previous write operation to have been completed in */
<> 144:ef7eb2e8f9f7 80 /* low frequency domain */
<> 144:ef7eb2e8f9f7 81 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 144:ef7eb2e8f9f7 82 ;
<> 144:ef7eb2e8f9f7 83 }
<> 144:ef7eb2e8f9f7 84 BUS_RegBitWrite(&(WDOG->CTRL), _WDOG_CTRL_EN_SHIFT, enable);
<> 144:ef7eb2e8f9f7 85 }
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 89 * @brief
<> 144:ef7eb2e8f9f7 90 * Feed the watchdog.
<> 144:ef7eb2e8f9f7 91 *
<> 144:ef7eb2e8f9f7 92 * @details
<> 144:ef7eb2e8f9f7 93 * When the watchdog is activated, it must be fed (ie clearing the counter)
<> 144:ef7eb2e8f9f7 94 * before it reaches the defined timeout period. Otherwise, the watchdog
<> 144:ef7eb2e8f9f7 95 * will generate a reset.
<> 144:ef7eb2e8f9f7 96 ******************************************************************************/
<> 144:ef7eb2e8f9f7 97 void WDOG_Feed(void)
<> 144:ef7eb2e8f9f7 98 {
<> 144:ef7eb2e8f9f7 99 /* The watchdog should not be fed while it is disabled */
<> 144:ef7eb2e8f9f7 100 if ( !(WDOG->CTRL & WDOG_CTRL_EN) )
<> 144:ef7eb2e8f9f7 101 {
<> 144:ef7eb2e8f9f7 102 return;
<> 144:ef7eb2e8f9f7 103 }
<> 144:ef7eb2e8f9f7 104
<> 144:ef7eb2e8f9f7 105 /* If a previous clearing is being synchronized to LF domain, then there */
<> 144:ef7eb2e8f9f7 106 /* is no point in waiting for it to complete before clearing over again. */
<> 144:ef7eb2e8f9f7 107 /* This avoids stalling the core in the typical use case where some idle loop */
<> 144:ef7eb2e8f9f7 108 /* keeps clearing the watchdog. */
<> 144:ef7eb2e8f9f7 109 if (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CMD)
<> 144:ef7eb2e8f9f7 110 {
<> 144:ef7eb2e8f9f7 111 return;
<> 144:ef7eb2e8f9f7 112 }
<> 144:ef7eb2e8f9f7 113 /* Before writing to the WDOG_CMD register we also need to make sure that
<> 144:ef7eb2e8f9f7 114 * any previous write to WDOG_CTRL is complete. */
<> 144:ef7eb2e8f9f7 115 while ( WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL )
<> 144:ef7eb2e8f9f7 116 ;
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 WDOG->CMD = WDOG_CMD_CLEAR;
<> 144:ef7eb2e8f9f7 119 }
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 123 * @brief
<> 144:ef7eb2e8f9f7 124 * Initialize watchdog (assuming the watchdog configuration has not been
<> 144:ef7eb2e8f9f7 125 * locked).
<> 144:ef7eb2e8f9f7 126 *
<> 144:ef7eb2e8f9f7 127 * @note
<> 144:ef7eb2e8f9f7 128 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 129 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 130 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 131 * will stall until the previous synchronization has completed.
<> 144:ef7eb2e8f9f7 132 *
<> 144:ef7eb2e8f9f7 133 * @param[in] init
<> 144:ef7eb2e8f9f7 134 * Structure holding watchdog configuration. A default setting
<> 144:ef7eb2e8f9f7 135 * #WDOG_INIT_DEFAULT is available for init.
<> 144:ef7eb2e8f9f7 136 ******************************************************************************/
<> 144:ef7eb2e8f9f7 137 void WDOG_Init(const WDOG_Init_TypeDef *init)
<> 144:ef7eb2e8f9f7 138 {
<> 144:ef7eb2e8f9f7 139 uint32_t setting;
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 if (init->enable)
<> 144:ef7eb2e8f9f7 142 {
<> 144:ef7eb2e8f9f7 143 setting = WDOG_CTRL_EN;
<> 144:ef7eb2e8f9f7 144 }
<> 144:ef7eb2e8f9f7 145 else
<> 144:ef7eb2e8f9f7 146 {
<> 144:ef7eb2e8f9f7 147 setting = 0;
<> 144:ef7eb2e8f9f7 148 }
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 if (init->debugRun)
<> 144:ef7eb2e8f9f7 151 {
<> 144:ef7eb2e8f9f7 152 setting |= WDOG_CTRL_DEBUGRUN;
<> 144:ef7eb2e8f9f7 153 }
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 if (init->em2Run)
<> 144:ef7eb2e8f9f7 156 {
<> 144:ef7eb2e8f9f7 157 setting |= WDOG_CTRL_EM2RUN;
<> 144:ef7eb2e8f9f7 158 }
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 if (init->em3Run)
<> 144:ef7eb2e8f9f7 161 {
<> 144:ef7eb2e8f9f7 162 setting |= WDOG_CTRL_EM3RUN;
<> 144:ef7eb2e8f9f7 163 }
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 if (init->em4Block)
<> 144:ef7eb2e8f9f7 166 {
<> 144:ef7eb2e8f9f7 167 setting |= WDOG_CTRL_EM4BLOCK;
<> 144:ef7eb2e8f9f7 168 }
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 if (init->swoscBlock)
<> 144:ef7eb2e8f9f7 171 {
<> 144:ef7eb2e8f9f7 172 setting |= WDOG_CTRL_SWOSCBLOCK;
<> 144:ef7eb2e8f9f7 173 }
<> 144:ef7eb2e8f9f7 174
<> 144:ef7eb2e8f9f7 175 setting |= ((uint32_t)(init->clkSel) << _WDOG_CTRL_CLKSEL_SHIFT)
<> 144:ef7eb2e8f9f7 176 | ((uint32_t)(init->perSel) << _WDOG_CTRL_PERSEL_SHIFT);
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 /* Wait for any pending previous write operation to have been completed in */
<> 144:ef7eb2e8f9f7 179 /* low frequency domain */
<> 144:ef7eb2e8f9f7 180 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 144:ef7eb2e8f9f7 181 ;
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 WDOG->CTRL = setting;
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 /* Optional register locking */
<> 144:ef7eb2e8f9f7 186 if (init->lock)
<> 144:ef7eb2e8f9f7 187 {
<> 144:ef7eb2e8f9f7 188 if (init->enable)
<> 144:ef7eb2e8f9f7 189 {
<> 144:ef7eb2e8f9f7 190 WDOG_Lock();
<> 144:ef7eb2e8f9f7 191 }
<> 144:ef7eb2e8f9f7 192 else
<> 144:ef7eb2e8f9f7 193 {
<> 144:ef7eb2e8f9f7 194 BUS_RegBitWrite(&(WDOG->CTRL), _WDOG_CTRL_LOCK_SHIFT, 1);
<> 144:ef7eb2e8f9f7 195 }
<> 144:ef7eb2e8f9f7 196 }
<> 144:ef7eb2e8f9f7 197 }
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /***************************************************************************//**
<> 144:ef7eb2e8f9f7 201 * @brief
<> 144:ef7eb2e8f9f7 202 * Lock the watchdog configuration.
<> 144:ef7eb2e8f9f7 203 *
<> 144:ef7eb2e8f9f7 204 * @details
<> 144:ef7eb2e8f9f7 205 * This prevents errors from overwriting the watchdog configuration, possibly
<> 144:ef7eb2e8f9f7 206 * disabling it. Only a reset can unlock the watchdog config, once locked.
<> 144:ef7eb2e8f9f7 207 *
<> 144:ef7eb2e8f9f7 208 * If the LFRCO or LFXO clocks are used to clock the watchdog, one should
<> 144:ef7eb2e8f9f7 209 * consider using the option of inhibiting those clocks to be disabled,
<> 144:ef7eb2e8f9f7 210 * please see the WDOG_Enable() init structure.
<> 144:ef7eb2e8f9f7 211 *
<> 144:ef7eb2e8f9f7 212 * @note
<> 144:ef7eb2e8f9f7 213 * This function modifies the WDOG CTRL register which requires
<> 144:ef7eb2e8f9f7 214 * synchronization into the low frequency domain. If this register is modified
<> 144:ef7eb2e8f9f7 215 * before a previous update to the same register has completed, this function
<> 144:ef7eb2e8f9f7 216 * will stall until the previous synchronization has completed.
<> 144:ef7eb2e8f9f7 217 ******************************************************************************/
<> 144:ef7eb2e8f9f7 218 void WDOG_Lock(void)
<> 144:ef7eb2e8f9f7 219 {
<> 144:ef7eb2e8f9f7 220 /* Wait for any pending previous write operation to have been completed in */
<> 144:ef7eb2e8f9f7 221 /* low frequency domain */
<> 144:ef7eb2e8f9f7 222 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
<> 144:ef7eb2e8f9f7 223 ;
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /* Disable writing to the control register */
<> 144:ef7eb2e8f9f7 226 BUS_RegBitWrite(&(WDOG->CTRL), _WDOG_CTRL_LOCK_SHIFT, 1);
<> 144:ef7eb2e8f9f7 227 }
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229
<> 144:ef7eb2e8f9f7 230 /** @} (end addtogroup WDOG) */
<> 144:ef7eb2e8f9f7 231 /** @} (end addtogroup EM_Library) */
<> 144:ef7eb2e8f9f7 232 #endif /* defined(WDOG_COUNT) && (WDOG_COUNT > 0) */