Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_wdog.c@50:a417edff4437, 2016-01-15 (annotated)

Committer:
mbed_official
Date:
Fri Jan 15 07:45:16 2016 +0000
Revision:
50:a417edff4437
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 6010f32619bfcbb01cc73747d4ff9040863482d9



Full URL: https://github.com/mbedmicro/mbed/commit/6010f32619bfcbb01cc73747d4ff9040863482d9/



Remove doubling of buffer size in realiseEndpoint()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file em_wdog.c
bogdanm 0:9b334a45a8ff 3 * @brief Watchdog (WDOG) peripheral API
bogdanm 0:9b334a45a8ff 4 * devices.
mbed_official 50:a417edff4437 5 * @version 4.2.1
bogdanm 0:9b334a45a8ff 6 *******************************************************************************
bogdanm 0:9b334a45a8ff 7 * @section License
mbed_official 50:a417edff4437 8 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 9 *******************************************************************************
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 12 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 13 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 14 *
bogdanm 0:9b334a45a8ff 15 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 16 * claim that you wrote the original software.
bogdanm 0:9b334a45a8ff 17 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 18 * misrepresented as being the original software.
bogdanm 0:9b334a45a8ff 19 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 20 *
bogdanm 0:9b334a45a8ff 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
bogdanm 0:9b334a45a8ff 22 * obligation to support this Software. Silicon Labs is providing the
bogdanm 0:9b334a45a8ff 23 * Software "AS IS", with no express or implied warranties of any kind,
bogdanm 0:9b334a45a8ff 24 * including, but not limited to, any implied warranties of merchantability
bogdanm 0:9b334a45a8ff 25 * or fitness for any particular purpose or warranties against infringement
bogdanm 0:9b334a45a8ff 26 * of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 27 *
bogdanm 0:9b334a45a8ff 28 * Silicon Labs will not be liable for any consequential, incidental, or
bogdanm 0:9b334a45a8ff 29 * special damages, or any other relief, or for any claim by any third party,
bogdanm 0:9b334a45a8ff 30 * arising from your use of this Software.
bogdanm 0:9b334a45a8ff 31 *
bogdanm 0:9b334a45a8ff 32 ******************************************************************************/
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #include "em_wdog.h"
bogdanm 0:9b334a45a8ff 35 #if defined(WDOG_COUNT) && (WDOG_COUNT > 0)
bogdanm 0:9b334a45a8ff 36
mbed_official 50:a417edff4437 37 #if defined(WDOG0)
mbed_official 50:a417edff4437 38 #define WDOG WDOG0
mbed_official 50:a417edff4437 39 #if (WDOG_COUNT > 1)
mbed_official 50:a417edff4437 40 #warning "Multiple watchdogs not supported"
mbed_official 50:a417edff4437 41 #endif
mbed_official 50:a417edff4437 42 #endif
mbed_official 50:a417edff4437 43
mbed_official 50:a417edff4437 44 #include "em_bus.h"
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 47 * @addtogroup EM_Library
bogdanm 0:9b334a45a8ff 48 * @{
bogdanm 0:9b334a45a8ff 49 ******************************************************************************/
bogdanm 0:9b334a45a8ff 50
bogdanm 0:9b334a45a8ff 51 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 52 * @addtogroup WDOG
bogdanm 0:9b334a45a8ff 53 * @brief Watchdog (WDOG) Peripheral API
bogdanm 0:9b334a45a8ff 54 * @{
bogdanm 0:9b334a45a8ff 55 ******************************************************************************/
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 /*******************************************************************************
bogdanm 0:9b334a45a8ff 58 ************************** GLOBAL FUNCTIONS *******************************
bogdanm 0:9b334a45a8ff 59 ******************************************************************************/
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 62 * @brief
bogdanm 0:9b334a45a8ff 63 * Enable/disable the watchdog timer.
bogdanm 0:9b334a45a8ff 64 *
bogdanm 0:9b334a45a8ff 65 * @note
bogdanm 0:9b334a45a8ff 66 * This function modifies the WDOG CTRL register which requires
bogdanm 0:9b334a45a8ff 67 * synchronization into the low frequency domain. If this register is modified
bogdanm 0:9b334a45a8ff 68 * before a previous update to the same register has completed, this function
bogdanm 0:9b334a45a8ff 69 * will stall until the previous synchronization has completed.
bogdanm 0:9b334a45a8ff 70 *
bogdanm 0:9b334a45a8ff 71 * @param[in] enable
bogdanm 0:9b334a45a8ff 72 * true to enable watchdog, false to disable. Watchdog cannot be disabled if
bogdanm 0:9b334a45a8ff 73 * watchdog has been locked.
bogdanm 0:9b334a45a8ff 74 ******************************************************************************/
bogdanm 0:9b334a45a8ff 75 void WDOG_Enable(bool enable)
bogdanm 0:9b334a45a8ff 76 {
bogdanm 0:9b334a45a8ff 77 if (!enable)
bogdanm 0:9b334a45a8ff 78 {
bogdanm 0:9b334a45a8ff 79 /* Wait for any pending previous write operation to have been completed in */
bogdanm 0:9b334a45a8ff 80 /* low frequency domain */
bogdanm 0:9b334a45a8ff 81 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
bogdanm 0:9b334a45a8ff 82 ;
bogdanm 0:9b334a45a8ff 83 }
mbed_official 50:a417edff4437 84 BUS_RegBitWrite(&(WDOG->CTRL), _WDOG_CTRL_EN_SHIFT, enable);
bogdanm 0:9b334a45a8ff 85 }
bogdanm 0:9b334a45a8ff 86
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 89 * @brief
bogdanm 0:9b334a45a8ff 90 * Feed the watchdog.
bogdanm 0:9b334a45a8ff 91 *
bogdanm 0:9b334a45a8ff 92 * @details
bogdanm 0:9b334a45a8ff 93 * When the watchdog is activated, it must be fed (ie clearing the counter)
bogdanm 0:9b334a45a8ff 94 * before it reaches the defined timeout period. Otherwise, the watchdog
bogdanm 0:9b334a45a8ff 95 * will generate a reset.
bogdanm 0:9b334a45a8ff 96 ******************************************************************************/
bogdanm 0:9b334a45a8ff 97 void WDOG_Feed(void)
bogdanm 0:9b334a45a8ff 98 {
bogdanm 0:9b334a45a8ff 99 /* The watchdog should not be fed while it is disabled */
bogdanm 0:9b334a45a8ff 100 if ( !(WDOG->CTRL & WDOG_CTRL_EN) )
bogdanm 0:9b334a45a8ff 101 {
bogdanm 0:9b334a45a8ff 102 return;
bogdanm 0:9b334a45a8ff 103 }
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 /* If a previous clearing is being synchronized to LF domain, then there */
bogdanm 0:9b334a45a8ff 106 /* is no point in waiting for it to complete before clearing over again. */
bogdanm 0:9b334a45a8ff 107 /* This avoids stalling the core in the typical use case where some idle loop */
bogdanm 0:9b334a45a8ff 108 /* keeps clearing the watchdog. */
bogdanm 0:9b334a45a8ff 109 if (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CMD)
bogdanm 0:9b334a45a8ff 110 {
bogdanm 0:9b334a45a8ff 111 return;
bogdanm 0:9b334a45a8ff 112 }
mbed_official 50:a417edff4437 113 /* Before writing to the WDOG_CMD register we also need to make sure that
bogdanm 0:9b334a45a8ff 114 * any previous write to WDOG_CTRL is complete. */
mbed_official 50:a417edff4437 115 while ( WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL )
mbed_official 50:a417edff4437 116 ;
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 WDOG->CMD = WDOG_CMD_CLEAR;
bogdanm 0:9b334a45a8ff 119 }
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 123 * @brief
bogdanm 0:9b334a45a8ff 124 * Initialize watchdog (assuming the watchdog configuration has not been
bogdanm 0:9b334a45a8ff 125 * locked).
bogdanm 0:9b334a45a8ff 126 *
bogdanm 0:9b334a45a8ff 127 * @note
bogdanm 0:9b334a45a8ff 128 * This function modifies the WDOG CTRL register which requires
bogdanm 0:9b334a45a8ff 129 * synchronization into the low frequency domain. If this register is modified
bogdanm 0:9b334a45a8ff 130 * before a previous update to the same register has completed, this function
bogdanm 0:9b334a45a8ff 131 * will stall until the previous synchronization has completed.
bogdanm 0:9b334a45a8ff 132 *
bogdanm 0:9b334a45a8ff 133 * @param[in] init
bogdanm 0:9b334a45a8ff 134 * Structure holding watchdog configuration. A default setting
bogdanm 0:9b334a45a8ff 135 * #WDOG_INIT_DEFAULT is available for init.
bogdanm 0:9b334a45a8ff 136 ******************************************************************************/
bogdanm 0:9b334a45a8ff 137 void WDOG_Init(const WDOG_Init_TypeDef *init)
bogdanm 0:9b334a45a8ff 138 {
bogdanm 0:9b334a45a8ff 139 uint32_t setting;
bogdanm 0:9b334a45a8ff 140
bogdanm 0:9b334a45a8ff 141 if (init->enable)
bogdanm 0:9b334a45a8ff 142 {
bogdanm 0:9b334a45a8ff 143 setting = WDOG_CTRL_EN;
bogdanm 0:9b334a45a8ff 144 }
bogdanm 0:9b334a45a8ff 145 else
bogdanm 0:9b334a45a8ff 146 {
bogdanm 0:9b334a45a8ff 147 setting = 0;
bogdanm 0:9b334a45a8ff 148 }
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 if (init->debugRun)
bogdanm 0:9b334a45a8ff 151 {
bogdanm 0:9b334a45a8ff 152 setting |= WDOG_CTRL_DEBUGRUN;
bogdanm 0:9b334a45a8ff 153 }
bogdanm 0:9b334a45a8ff 154
bogdanm 0:9b334a45a8ff 155 if (init->em2Run)
bogdanm 0:9b334a45a8ff 156 {
bogdanm 0:9b334a45a8ff 157 setting |= WDOG_CTRL_EM2RUN;
bogdanm 0:9b334a45a8ff 158 }
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 if (init->em3Run)
bogdanm 0:9b334a45a8ff 161 {
bogdanm 0:9b334a45a8ff 162 setting |= WDOG_CTRL_EM3RUN;
bogdanm 0:9b334a45a8ff 163 }
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 if (init->em4Block)
bogdanm 0:9b334a45a8ff 166 {
bogdanm 0:9b334a45a8ff 167 setting |= WDOG_CTRL_EM4BLOCK;
bogdanm 0:9b334a45a8ff 168 }
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 if (init->swoscBlock)
bogdanm 0:9b334a45a8ff 171 {
bogdanm 0:9b334a45a8ff 172 setting |= WDOG_CTRL_SWOSCBLOCK;
bogdanm 0:9b334a45a8ff 173 }
bogdanm 0:9b334a45a8ff 174
mbed_official 50:a417edff4437 175 setting |= ((uint32_t)(init->clkSel) << _WDOG_CTRL_CLKSEL_SHIFT)
mbed_official 50:a417edff4437 176 | ((uint32_t)(init->perSel) << _WDOG_CTRL_PERSEL_SHIFT);
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 /* Wait for any pending previous write operation to have been completed in */
bogdanm 0:9b334a45a8ff 179 /* low frequency domain */
bogdanm 0:9b334a45a8ff 180 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
bogdanm 0:9b334a45a8ff 181 ;
bogdanm 0:9b334a45a8ff 182
bogdanm 0:9b334a45a8ff 183 WDOG->CTRL = setting;
bogdanm 0:9b334a45a8ff 184
bogdanm 0:9b334a45a8ff 185 /* Optional register locking */
bogdanm 0:9b334a45a8ff 186 if (init->lock)
bogdanm 0:9b334a45a8ff 187 {
bogdanm 0:9b334a45a8ff 188 if (init->enable)
bogdanm 0:9b334a45a8ff 189 {
bogdanm 0:9b334a45a8ff 190 WDOG_Lock();
bogdanm 0:9b334a45a8ff 191 }
bogdanm 0:9b334a45a8ff 192 else
bogdanm 0:9b334a45a8ff 193 {
mbed_official 50:a417edff4437 194 BUS_RegBitWrite(&(WDOG->CTRL), _WDOG_CTRL_LOCK_SHIFT, 1);
bogdanm 0:9b334a45a8ff 195 }
bogdanm 0:9b334a45a8ff 196 }
bogdanm 0:9b334a45a8ff 197 }
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 201 * @brief
bogdanm 0:9b334a45a8ff 202 * Lock the watchdog configuration.
bogdanm 0:9b334a45a8ff 203 *
bogdanm 0:9b334a45a8ff 204 * @details
bogdanm 0:9b334a45a8ff 205 * This prevents errors from overwriting the watchdog configuration, possibly
bogdanm 0:9b334a45a8ff 206 * disabling it. Only a reset can unlock the watchdog config, once locked.
bogdanm 0:9b334a45a8ff 207 *
bogdanm 0:9b334a45a8ff 208 * If the LFRCO or LFXO clocks are used to clock the watchdog, one should
bogdanm 0:9b334a45a8ff 209 * consider using the option of inhibiting those clocks to be disabled,
bogdanm 0:9b334a45a8ff 210 * please see the WDOG_Enable() init structure.
bogdanm 0:9b334a45a8ff 211 *
bogdanm 0:9b334a45a8ff 212 * @note
bogdanm 0:9b334a45a8ff 213 * This function modifies the WDOG CTRL register which requires
bogdanm 0:9b334a45a8ff 214 * synchronization into the low frequency domain. If this register is modified
bogdanm 0:9b334a45a8ff 215 * before a previous update to the same register has completed, this function
bogdanm 0:9b334a45a8ff 216 * will stall until the previous synchronization has completed.
bogdanm 0:9b334a45a8ff 217 ******************************************************************************/
bogdanm 0:9b334a45a8ff 218 void WDOG_Lock(void)
bogdanm 0:9b334a45a8ff 219 {
bogdanm 0:9b334a45a8ff 220 /* Wait for any pending previous write operation to have been completed in */
bogdanm 0:9b334a45a8ff 221 /* low frequency domain */
bogdanm 0:9b334a45a8ff 222 while (WDOG->SYNCBUSY & WDOG_SYNCBUSY_CTRL)
bogdanm 0:9b334a45a8ff 223 ;
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 /* Disable writing to the control register */
mbed_official 50:a417edff4437 226 BUS_RegBitWrite(&(WDOG->CTRL), _WDOG_CTRL_LOCK_SHIFT, 1);
bogdanm 0:9b334a45a8ff 227 }
bogdanm 0:9b334a45a8ff 228
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 /** @} (end addtogroup WDOG) */
bogdanm 0:9b334a45a8ff 231 /** @} (end addtogroup EM_Library) */
bogdanm 0:9b334a45a8ff 232 #endif /* defined(WDOG_COUNT) && (WDOG_COUNT > 0) */