added prescaler for 16 bit pwm in LPC1347 target
Fork of mbed-dev by
targets/cmsis/TARGET_Freescale/TARGET_K66F/TOOLCHAIN_GCC_ARM/startup_MK66F18.S@144:ef7eb2e8f9f7, 2016-09-02 (annotated)
- Committer:
- <>
- Date:
- Fri Sep 02 15:07:44 2016 +0100
- Revision:
- 144:ef7eb2e8f9f7
This updates the lib to the mbed lib v125
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /* ---------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 2 | /* @file: startup_MK66F18.s */ |
<> | 144:ef7eb2e8f9f7 | 3 | /* @purpose: CMSIS Cortex-M4 Core Device Startup File */ |
<> | 144:ef7eb2e8f9f7 | 4 | /* MK66F18 */ |
<> | 144:ef7eb2e8f9f7 | 5 | /* @version: 3.0 */ |
<> | 144:ef7eb2e8f9f7 | 6 | /* @date: 2015-3-25 */ |
<> | 144:ef7eb2e8f9f7 | 7 | /* @build: b151210 */ |
<> | 144:ef7eb2e8f9f7 | 8 | /* ---------------------------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 9 | /* */ |
<> | 144:ef7eb2e8f9f7 | 10 | /* Copyright (c) 1997 - 2015 , Freescale Semiconductor, Inc. */ |
<> | 144:ef7eb2e8f9f7 | 11 | /* All rights reserved. */ |
<> | 144:ef7eb2e8f9f7 | 12 | /* */ |
<> | 144:ef7eb2e8f9f7 | 13 | /* Redistribution and use in source and binary forms, with or without modification, */ |
<> | 144:ef7eb2e8f9f7 | 14 | /* are permitted provided that the following conditions are met: */ |
<> | 144:ef7eb2e8f9f7 | 15 | /* */ |
<> | 144:ef7eb2e8f9f7 | 16 | /* o Redistributions of source code must retain the above copyright notice, this list */ |
<> | 144:ef7eb2e8f9f7 | 17 | /* of conditions and the following disclaimer. */ |
<> | 144:ef7eb2e8f9f7 | 18 | /* */ |
<> | 144:ef7eb2e8f9f7 | 19 | /* o Redistributions in binary form must reproduce the above copyright notice, this */ |
<> | 144:ef7eb2e8f9f7 | 20 | /* list of conditions and the following disclaimer in the documentation and/or */ |
<> | 144:ef7eb2e8f9f7 | 21 | /* other materials provided with the distribution. */ |
<> | 144:ef7eb2e8f9f7 | 22 | /* */ |
<> | 144:ef7eb2e8f9f7 | 23 | /* o Neither the name of Freescale Semiconductor, Inc. nor the names of its */ |
<> | 144:ef7eb2e8f9f7 | 24 | /* contributors may be used to endorse or promote products derived from this */ |
<> | 144:ef7eb2e8f9f7 | 25 | /* software without specific prior written permission. */ |
<> | 144:ef7eb2e8f9f7 | 26 | /* */ |
<> | 144:ef7eb2e8f9f7 | 27 | /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND */ |
<> | 144:ef7eb2e8f9f7 | 28 | /* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED */ |
<> | 144:ef7eb2e8f9f7 | 29 | /* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */ |
<> | 144:ef7eb2e8f9f7 | 30 | /* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR */ |
<> | 144:ef7eb2e8f9f7 | 31 | /* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */ |
<> | 144:ef7eb2e8f9f7 | 32 | /* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; */ |
<> | 144:ef7eb2e8f9f7 | 33 | /* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON */ |
<> | 144:ef7eb2e8f9f7 | 34 | /* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ |
<> | 144:ef7eb2e8f9f7 | 35 | /* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ |
<> | 144:ef7eb2e8f9f7 | 36 | /* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ |
<> | 144:ef7eb2e8f9f7 | 37 | /*****************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 38 | /* Version: GCC for ARM Embedded Processors */ |
<> | 144:ef7eb2e8f9f7 | 39 | /*****************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 40 | .syntax unified |
<> | 144:ef7eb2e8f9f7 | 41 | .arch armv7-m |
<> | 144:ef7eb2e8f9f7 | 42 | |
<> | 144:ef7eb2e8f9f7 | 43 | .section .isr_vector, "a" |
<> | 144:ef7eb2e8f9f7 | 44 | .align 2 |
<> | 144:ef7eb2e8f9f7 | 45 | .globl __isr_vector |
<> | 144:ef7eb2e8f9f7 | 46 | __isr_vector: |
<> | 144:ef7eb2e8f9f7 | 47 | .long __StackTop /* Top of Stack */ |
<> | 144:ef7eb2e8f9f7 | 48 | .long Reset_Handler /* Reset Handler */ |
<> | 144:ef7eb2e8f9f7 | 49 | .long NMI_Handler /* NMI Handler*/ |
<> | 144:ef7eb2e8f9f7 | 50 | .long HardFault_Handler /* Hard Fault Handler*/ |
<> | 144:ef7eb2e8f9f7 | 51 | .long MemManage_Handler /* MPU Fault Handler*/ |
<> | 144:ef7eb2e8f9f7 | 52 | .long BusFault_Handler /* Bus Fault Handler*/ |
<> | 144:ef7eb2e8f9f7 | 53 | .long UsageFault_Handler /* Usage Fault Handler*/ |
<> | 144:ef7eb2e8f9f7 | 54 | .long 0 /* Reserved*/ |
<> | 144:ef7eb2e8f9f7 | 55 | .long 0 /* Reserved*/ |
<> | 144:ef7eb2e8f9f7 | 56 | .long 0 /* Reserved*/ |
<> | 144:ef7eb2e8f9f7 | 57 | .long 0 /* Reserved*/ |
<> | 144:ef7eb2e8f9f7 | 58 | .long SVC_Handler /* SVCall Handler*/ |
<> | 144:ef7eb2e8f9f7 | 59 | .long DebugMon_Handler /* Debug Monitor Handler*/ |
<> | 144:ef7eb2e8f9f7 | 60 | .long 0 /* Reserved*/ |
<> | 144:ef7eb2e8f9f7 | 61 | .long PendSV_Handler /* PendSV Handler*/ |
<> | 144:ef7eb2e8f9f7 | 62 | .long SysTick_Handler /* SysTick Handler*/ |
<> | 144:ef7eb2e8f9f7 | 63 | |
<> | 144:ef7eb2e8f9f7 | 64 | /* External Interrupts*/ |
<> | 144:ef7eb2e8f9f7 | 65 | .long DMA0_DMA16_IRQHandler /* DMA Channel 0, 16 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 66 | .long DMA1_DMA17_IRQHandler /* DMA Channel 1, 17 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 67 | .long DMA2_DMA18_IRQHandler /* DMA Channel 2, 18 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 68 | .long DMA3_DMA19_IRQHandler /* DMA Channel 3, 19 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 69 | .long DMA4_DMA20_IRQHandler /* DMA Channel 4, 20 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 70 | .long DMA5_DMA21_IRQHandler /* DMA Channel 5, 21 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 71 | .long DMA6_DMA22_IRQHandler /* DMA Channel 6, 22 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 72 | .long DMA7_DMA23_IRQHandler /* DMA Channel 7, 23 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 73 | .long DMA8_DMA24_IRQHandler /* DMA Channel 8, 24 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 74 | .long DMA9_DMA25_IRQHandler /* DMA Channel 9, 25 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 75 | .long DMA10_DMA26_IRQHandler /* DMA Channel 10, 26 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 76 | .long DMA11_DMA27_IRQHandler /* DMA Channel 11, 27 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 77 | .long DMA12_DMA28_IRQHandler /* DMA Channel 12, 28 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 78 | .long DMA13_DMA29_IRQHandler /* DMA Channel 13, 29 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 79 | .long DMA14_DMA30_IRQHandler /* DMA Channel 14, 30 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 80 | .long DMA15_DMA31_IRQHandler /* DMA Channel 15, 31 Transfer Complete*/ |
<> | 144:ef7eb2e8f9f7 | 81 | .long DMA_Error_IRQHandler /* DMA Error Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 82 | .long MCM_IRQHandler /* Normal Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 83 | .long FTFE_IRQHandler /* FTFE Command complete interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 84 | .long Read_Collision_IRQHandler /* Read Collision Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 85 | .long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning*/ |
<> | 144:ef7eb2e8f9f7 | 86 | .long LLWU_IRQHandler /* Low Leakage Wakeup Unit*/ |
<> | 144:ef7eb2e8f9f7 | 87 | .long WDOG_EWM_IRQHandler /* WDOG Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 88 | .long RNG_IRQHandler /* RNG Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 89 | .long I2C0_IRQHandler /* I2C0 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 90 | .long I2C1_IRQHandler /* I2C1 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 91 | .long SPI0_IRQHandler /* SPI0 Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 92 | .long SPI1_IRQHandler /* SPI1 Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 93 | .long I2S0_Tx_IRQHandler /* I2S0 transmit interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 94 | .long I2S0_Rx_IRQHandler /* I2S0 receive interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 95 | .long Reserved46_IRQHandler /* Reserved interrupt 46*/ |
<> | 144:ef7eb2e8f9f7 | 96 | .long UART0_RX_TX_IRQHandler /* UART0 Receive/Transmit interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 97 | .long UART0_ERR_IRQHandler /* UART0 Error interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 98 | .long UART1_RX_TX_IRQHandler /* UART1 Receive/Transmit interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 99 | .long UART1_ERR_IRQHandler /* UART1 Error interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 100 | .long UART2_RX_TX_IRQHandler /* UART2 Receive/Transmit interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 101 | .long UART2_ERR_IRQHandler /* UART2 Error interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 102 | .long UART3_RX_TX_IRQHandler /* UART3 Receive/Transmit interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 103 | .long UART3_ERR_IRQHandler /* UART3 Error interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 104 | .long ADC0_IRQHandler /* ADC0 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 105 | .long CMP0_IRQHandler /* CMP0 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 106 | .long CMP1_IRQHandler /* CMP1 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 107 | .long FTM0_IRQHandler /* FTM0 fault, overflow and channels interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 108 | .long FTM1_IRQHandler /* FTM1 fault, overflow and channels interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 109 | .long FTM2_IRQHandler /* FTM2 fault, overflow and channels interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 110 | .long CMT_IRQHandler /* CMT interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 111 | .long RTC_IRQHandler /* RTC interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 112 | .long RTC_Seconds_IRQHandler /* RTC seconds interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 113 | .long PIT0_IRQHandler /* PIT timer channel 0 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 114 | .long PIT1_IRQHandler /* PIT timer channel 1 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 115 | .long PIT2_IRQHandler /* PIT timer channel 2 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 116 | .long PIT3_IRQHandler /* PIT timer channel 3 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 117 | .long PDB0_IRQHandler /* PDB0 Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 118 | .long USB0_IRQHandler /* USB0 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 119 | .long USBDCD_IRQHandler /* USBDCD Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 120 | .long Reserved71_IRQHandler /* Reserved interrupt 71*/ |
<> | 144:ef7eb2e8f9f7 | 121 | .long DAC0_IRQHandler /* DAC0 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 122 | .long MCG_IRQHandler /* MCG Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 123 | .long LPTMR0_IRQHandler /* LPTimer interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 124 | .long PORTA_IRQHandler /* Port A interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 125 | .long PORTB_IRQHandler /* Port B interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 126 | .long PORTC_IRQHandler /* Port C interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 127 | .long PORTD_IRQHandler /* Port D interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 128 | .long PORTE_IRQHandler /* Port E interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 129 | .long SWI_IRQHandler /* Software interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 130 | .long SPI2_IRQHandler /* SPI2 Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 131 | .long UART4_RX_TX_IRQHandler /* UART4 Receive/Transmit interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 132 | .long UART4_ERR_IRQHandler /* UART4 Error interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 133 | .long Reserved84_IRQHandler /* Reserved interrupt 84*/ |
<> | 144:ef7eb2e8f9f7 | 134 | .long Reserved85_IRQHandler /* Reserved interrupt 85*/ |
<> | 144:ef7eb2e8f9f7 | 135 | .long CMP2_IRQHandler /* CMP2 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 136 | .long FTM3_IRQHandler /* FTM3 fault, overflow and channels interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 137 | .long DAC1_IRQHandler /* DAC1 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 138 | .long ADC1_IRQHandler /* ADC1 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 139 | .long I2C2_IRQHandler /* I2C2 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 140 | .long CAN0_ORed_Message_buffer_IRQHandler /* CAN0 OR'd message buffers interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 141 | .long CAN0_Bus_Off_IRQHandler /* CAN0 bus off interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 142 | .long CAN0_Error_IRQHandler /* CAN0 error interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 143 | .long CAN0_Tx_Warning_IRQHandler /* CAN0 Tx warning interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 144 | .long CAN0_Rx_Warning_IRQHandler /* CAN0 Rx warning interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 145 | .long CAN0_Wake_Up_IRQHandler /* CAN0 wake up interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 146 | .long SDHC_IRQHandler /* SDHC interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 147 | .long ENET_1588_Timer_IRQHandler /* Ethernet MAC IEEE 1588 Timer Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 148 | .long ENET_Transmit_IRQHandler /* Ethernet MAC Transmit Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 149 | .long ENET_Receive_IRQHandler /* Ethernet MAC Receive Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 150 | .long ENET_Error_IRQHandler /* Ethernet MAC Error and miscelaneous Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 151 | .long LPUART0_IRQHandler /* LPUART0 status/error interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 152 | .long TSI0_IRQHandler /* TSI0 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 153 | .long TPM1_IRQHandler /* TPM1 fault, overflow and channels interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 154 | .long TPM2_IRQHandler /* TPM2 fault, overflow and channels interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 155 | .long USBHSDCD_IRQHandler /* USBHSDCD, USBHS Phy Interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 156 | .long I2C3_IRQHandler /* I2C3 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 157 | .long CMP3_IRQHandler /* CMP3 interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 158 | .long USBHS_IRQHandler /* USB high speed OTG interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 159 | .long CAN1_ORed_Message_buffer_IRQHandler /* CAN1 OR'd message buffers interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 160 | .long CAN1_Bus_Off_IRQHandler /* CAN1 bus off interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 161 | .long CAN1_Error_IRQHandler /* CAN1 error interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 162 | .long CAN1_Tx_Warning_IRQHandler /* CAN1 Tx warning interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 163 | .long CAN1_Rx_Warning_IRQHandler /* CAN1 Rx warning interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 164 | .long CAN1_Wake_Up_IRQHandler /* CAN1 wake up interrupt*/ |
<> | 144:ef7eb2e8f9f7 | 165 | .long DefaultISR /* 116*/ |
<> | 144:ef7eb2e8f9f7 | 166 | .long DefaultISR /* 117*/ |
<> | 144:ef7eb2e8f9f7 | 167 | .long DefaultISR /* 118*/ |
<> | 144:ef7eb2e8f9f7 | 168 | .long DefaultISR /* 119*/ |
<> | 144:ef7eb2e8f9f7 | 169 | .long DefaultISR /* 120*/ |
<> | 144:ef7eb2e8f9f7 | 170 | .long DefaultISR /* 121*/ |
<> | 144:ef7eb2e8f9f7 | 171 | .long DefaultISR /* 122*/ |
<> | 144:ef7eb2e8f9f7 | 172 | .long DefaultISR /* 123*/ |
<> | 144:ef7eb2e8f9f7 | 173 | .long DefaultISR /* 124*/ |
<> | 144:ef7eb2e8f9f7 | 174 | .long DefaultISR /* 125*/ |
<> | 144:ef7eb2e8f9f7 | 175 | .long DefaultISR /* 126*/ |
<> | 144:ef7eb2e8f9f7 | 176 | .long DefaultISR /* 127*/ |
<> | 144:ef7eb2e8f9f7 | 177 | .long DefaultISR /* 128*/ |
<> | 144:ef7eb2e8f9f7 | 178 | .long DefaultISR /* 129*/ |
<> | 144:ef7eb2e8f9f7 | 179 | .long DefaultISR /* 130*/ |
<> | 144:ef7eb2e8f9f7 | 180 | .long DefaultISR /* 131*/ |
<> | 144:ef7eb2e8f9f7 | 181 | .long DefaultISR /* 132*/ |
<> | 144:ef7eb2e8f9f7 | 182 | .long DefaultISR /* 133*/ |
<> | 144:ef7eb2e8f9f7 | 183 | .long DefaultISR /* 134*/ |
<> | 144:ef7eb2e8f9f7 | 184 | .long DefaultISR /* 135*/ |
<> | 144:ef7eb2e8f9f7 | 185 | .long DefaultISR /* 136*/ |
<> | 144:ef7eb2e8f9f7 | 186 | .long DefaultISR /* 137*/ |
<> | 144:ef7eb2e8f9f7 | 187 | .long DefaultISR /* 138*/ |
<> | 144:ef7eb2e8f9f7 | 188 | .long DefaultISR /* 139*/ |
<> | 144:ef7eb2e8f9f7 | 189 | .long DefaultISR /* 140*/ |
<> | 144:ef7eb2e8f9f7 | 190 | .long DefaultISR /* 141*/ |
<> | 144:ef7eb2e8f9f7 | 191 | .long DefaultISR /* 142*/ |
<> | 144:ef7eb2e8f9f7 | 192 | .long DefaultISR /* 143*/ |
<> | 144:ef7eb2e8f9f7 | 193 | .long DefaultISR /* 144*/ |
<> | 144:ef7eb2e8f9f7 | 194 | .long DefaultISR /* 145*/ |
<> | 144:ef7eb2e8f9f7 | 195 | .long DefaultISR /* 146*/ |
<> | 144:ef7eb2e8f9f7 | 196 | .long DefaultISR /* 147*/ |
<> | 144:ef7eb2e8f9f7 | 197 | .long DefaultISR /* 148*/ |
<> | 144:ef7eb2e8f9f7 | 198 | .long DefaultISR /* 149*/ |
<> | 144:ef7eb2e8f9f7 | 199 | .long DefaultISR /* 150*/ |
<> | 144:ef7eb2e8f9f7 | 200 | .long DefaultISR /* 151*/ |
<> | 144:ef7eb2e8f9f7 | 201 | .long DefaultISR /* 152*/ |
<> | 144:ef7eb2e8f9f7 | 202 | .long DefaultISR /* 153*/ |
<> | 144:ef7eb2e8f9f7 | 203 | .long DefaultISR /* 154*/ |
<> | 144:ef7eb2e8f9f7 | 204 | .long DefaultISR /* 155*/ |
<> | 144:ef7eb2e8f9f7 | 205 | .long DefaultISR /* 156*/ |
<> | 144:ef7eb2e8f9f7 | 206 | .long DefaultISR /* 157*/ |
<> | 144:ef7eb2e8f9f7 | 207 | .long DefaultISR /* 158*/ |
<> | 144:ef7eb2e8f9f7 | 208 | .long DefaultISR /* 159*/ |
<> | 144:ef7eb2e8f9f7 | 209 | .long DefaultISR /* 160*/ |
<> | 144:ef7eb2e8f9f7 | 210 | .long DefaultISR /* 161*/ |
<> | 144:ef7eb2e8f9f7 | 211 | .long DefaultISR /* 162*/ |
<> | 144:ef7eb2e8f9f7 | 212 | .long DefaultISR /* 163*/ |
<> | 144:ef7eb2e8f9f7 | 213 | .long DefaultISR /* 164*/ |
<> | 144:ef7eb2e8f9f7 | 214 | .long DefaultISR /* 165*/ |
<> | 144:ef7eb2e8f9f7 | 215 | .long DefaultISR /* 166*/ |
<> | 144:ef7eb2e8f9f7 | 216 | .long DefaultISR /* 167*/ |
<> | 144:ef7eb2e8f9f7 | 217 | .long DefaultISR /* 168*/ |
<> | 144:ef7eb2e8f9f7 | 218 | .long DefaultISR /* 169*/ |
<> | 144:ef7eb2e8f9f7 | 219 | .long DefaultISR /* 170*/ |
<> | 144:ef7eb2e8f9f7 | 220 | .long DefaultISR /* 171*/ |
<> | 144:ef7eb2e8f9f7 | 221 | .long DefaultISR /* 172*/ |
<> | 144:ef7eb2e8f9f7 | 222 | .long DefaultISR /* 173*/ |
<> | 144:ef7eb2e8f9f7 | 223 | .long DefaultISR /* 174*/ |
<> | 144:ef7eb2e8f9f7 | 224 | .long DefaultISR /* 175*/ |
<> | 144:ef7eb2e8f9f7 | 225 | .long DefaultISR /* 176*/ |
<> | 144:ef7eb2e8f9f7 | 226 | .long DefaultISR /* 177*/ |
<> | 144:ef7eb2e8f9f7 | 227 | .long DefaultISR /* 178*/ |
<> | 144:ef7eb2e8f9f7 | 228 | .long DefaultISR /* 179*/ |
<> | 144:ef7eb2e8f9f7 | 229 | .long DefaultISR /* 180*/ |
<> | 144:ef7eb2e8f9f7 | 230 | .long DefaultISR /* 181*/ |
<> | 144:ef7eb2e8f9f7 | 231 | .long DefaultISR /* 182*/ |
<> | 144:ef7eb2e8f9f7 | 232 | .long DefaultISR /* 183*/ |
<> | 144:ef7eb2e8f9f7 | 233 | .long DefaultISR /* 184*/ |
<> | 144:ef7eb2e8f9f7 | 234 | .long DefaultISR /* 185*/ |
<> | 144:ef7eb2e8f9f7 | 235 | .long DefaultISR /* 186*/ |
<> | 144:ef7eb2e8f9f7 | 236 | .long DefaultISR /* 187*/ |
<> | 144:ef7eb2e8f9f7 | 237 | .long DefaultISR /* 188*/ |
<> | 144:ef7eb2e8f9f7 | 238 | .long DefaultISR /* 189*/ |
<> | 144:ef7eb2e8f9f7 | 239 | .long DefaultISR /* 190*/ |
<> | 144:ef7eb2e8f9f7 | 240 | .long DefaultISR /* 191*/ |
<> | 144:ef7eb2e8f9f7 | 241 | .long DefaultISR /* 192*/ |
<> | 144:ef7eb2e8f9f7 | 242 | .long DefaultISR /* 193*/ |
<> | 144:ef7eb2e8f9f7 | 243 | .long DefaultISR /* 194*/ |
<> | 144:ef7eb2e8f9f7 | 244 | .long DefaultISR /* 195*/ |
<> | 144:ef7eb2e8f9f7 | 245 | .long DefaultISR /* 196*/ |
<> | 144:ef7eb2e8f9f7 | 246 | .long DefaultISR /* 197*/ |
<> | 144:ef7eb2e8f9f7 | 247 | .long DefaultISR /* 198*/ |
<> | 144:ef7eb2e8f9f7 | 248 | .long DefaultISR /* 199*/ |
<> | 144:ef7eb2e8f9f7 | 249 | .long DefaultISR /* 200*/ |
<> | 144:ef7eb2e8f9f7 | 250 | .long DefaultISR /* 201*/ |
<> | 144:ef7eb2e8f9f7 | 251 | .long DefaultISR /* 202*/ |
<> | 144:ef7eb2e8f9f7 | 252 | .long DefaultISR /* 203*/ |
<> | 144:ef7eb2e8f9f7 | 253 | .long DefaultISR /* 204*/ |
<> | 144:ef7eb2e8f9f7 | 254 | .long DefaultISR /* 205*/ |
<> | 144:ef7eb2e8f9f7 | 255 | .long DefaultISR /* 206*/ |
<> | 144:ef7eb2e8f9f7 | 256 | .long DefaultISR /* 207*/ |
<> | 144:ef7eb2e8f9f7 | 257 | .long DefaultISR /* 208*/ |
<> | 144:ef7eb2e8f9f7 | 258 | .long DefaultISR /* 209*/ |
<> | 144:ef7eb2e8f9f7 | 259 | .long DefaultISR /* 210*/ |
<> | 144:ef7eb2e8f9f7 | 260 | .long DefaultISR /* 211*/ |
<> | 144:ef7eb2e8f9f7 | 261 | .long DefaultISR /* 212*/ |
<> | 144:ef7eb2e8f9f7 | 262 | .long DefaultISR /* 213*/ |
<> | 144:ef7eb2e8f9f7 | 263 | .long DefaultISR /* 214*/ |
<> | 144:ef7eb2e8f9f7 | 264 | .long DefaultISR /* 215*/ |
<> | 144:ef7eb2e8f9f7 | 265 | .long DefaultISR /* 216*/ |
<> | 144:ef7eb2e8f9f7 | 266 | .long DefaultISR /* 217*/ |
<> | 144:ef7eb2e8f9f7 | 267 | .long DefaultISR /* 218*/ |
<> | 144:ef7eb2e8f9f7 | 268 | .long DefaultISR /* 219*/ |
<> | 144:ef7eb2e8f9f7 | 269 | .long DefaultISR /* 220*/ |
<> | 144:ef7eb2e8f9f7 | 270 | .long DefaultISR /* 221*/ |
<> | 144:ef7eb2e8f9f7 | 271 | .long DefaultISR /* 222*/ |
<> | 144:ef7eb2e8f9f7 | 272 | .long DefaultISR /* 223*/ |
<> | 144:ef7eb2e8f9f7 | 273 | .long DefaultISR /* 224*/ |
<> | 144:ef7eb2e8f9f7 | 274 | .long DefaultISR /* 225*/ |
<> | 144:ef7eb2e8f9f7 | 275 | .long DefaultISR /* 226*/ |
<> | 144:ef7eb2e8f9f7 | 276 | .long DefaultISR /* 227*/ |
<> | 144:ef7eb2e8f9f7 | 277 | .long DefaultISR /* 228*/ |
<> | 144:ef7eb2e8f9f7 | 278 | .long DefaultISR /* 229*/ |
<> | 144:ef7eb2e8f9f7 | 279 | .long DefaultISR /* 230*/ |
<> | 144:ef7eb2e8f9f7 | 280 | .long DefaultISR /* 231*/ |
<> | 144:ef7eb2e8f9f7 | 281 | .long DefaultISR /* 232*/ |
<> | 144:ef7eb2e8f9f7 | 282 | .long DefaultISR /* 233*/ |
<> | 144:ef7eb2e8f9f7 | 283 | .long DefaultISR /* 234*/ |
<> | 144:ef7eb2e8f9f7 | 284 | .long DefaultISR /* 235*/ |
<> | 144:ef7eb2e8f9f7 | 285 | .long DefaultISR /* 236*/ |
<> | 144:ef7eb2e8f9f7 | 286 | .long DefaultISR /* 237*/ |
<> | 144:ef7eb2e8f9f7 | 287 | .long DefaultISR /* 238*/ |
<> | 144:ef7eb2e8f9f7 | 288 | .long DefaultISR /* 239*/ |
<> | 144:ef7eb2e8f9f7 | 289 | .long DefaultISR /* 240*/ |
<> | 144:ef7eb2e8f9f7 | 290 | .long DefaultISR /* 241*/ |
<> | 144:ef7eb2e8f9f7 | 291 | .long DefaultISR /* 242*/ |
<> | 144:ef7eb2e8f9f7 | 292 | .long DefaultISR /* 243*/ |
<> | 144:ef7eb2e8f9f7 | 293 | .long DefaultISR /* 244*/ |
<> | 144:ef7eb2e8f9f7 | 294 | .long DefaultISR /* 245*/ |
<> | 144:ef7eb2e8f9f7 | 295 | .long DefaultISR /* 246*/ |
<> | 144:ef7eb2e8f9f7 | 296 | .long DefaultISR /* 247*/ |
<> | 144:ef7eb2e8f9f7 | 297 | .long DefaultISR /* 248*/ |
<> | 144:ef7eb2e8f9f7 | 298 | .long DefaultISR /* 249*/ |
<> | 144:ef7eb2e8f9f7 | 299 | .long DefaultISR /* 250*/ |
<> | 144:ef7eb2e8f9f7 | 300 | .long DefaultISR /* 251*/ |
<> | 144:ef7eb2e8f9f7 | 301 | .long DefaultISR /* 252*/ |
<> | 144:ef7eb2e8f9f7 | 302 | .long DefaultISR /* 253*/ |
<> | 144:ef7eb2e8f9f7 | 303 | .long DefaultISR /* 254*/ |
<> | 144:ef7eb2e8f9f7 | 304 | .long 0xFFFFFFFF /* Reserved for user TRIM value*/ |
<> | 144:ef7eb2e8f9f7 | 305 | |
<> | 144:ef7eb2e8f9f7 | 306 | .size __isr_vector, . - __isr_vector |
<> | 144:ef7eb2e8f9f7 | 307 | |
<> | 144:ef7eb2e8f9f7 | 308 | /* Flash Configuration */ |
<> | 144:ef7eb2e8f9f7 | 309 | .section .FlashConfig, "a" |
<> | 144:ef7eb2e8f9f7 | 310 | .long 0xFFFFFFFF |
<> | 144:ef7eb2e8f9f7 | 311 | .long 0xFFFFFFFF |
<> | 144:ef7eb2e8f9f7 | 312 | .long 0xFFFFFFFF |
<> | 144:ef7eb2e8f9f7 | 313 | .long 0xFFFFFFFE |
<> | 144:ef7eb2e8f9f7 | 314 | |
<> | 144:ef7eb2e8f9f7 | 315 | .text |
<> | 144:ef7eb2e8f9f7 | 316 | .thumb |
<> | 144:ef7eb2e8f9f7 | 317 | |
<> | 144:ef7eb2e8f9f7 | 318 | /* Reset Handler */ |
<> | 144:ef7eb2e8f9f7 | 319 | |
<> | 144:ef7eb2e8f9f7 | 320 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 321 | .align 2 |
<> | 144:ef7eb2e8f9f7 | 322 | .globl Reset_Handler |
<> | 144:ef7eb2e8f9f7 | 323 | .weak Reset_Handler |
<> | 144:ef7eb2e8f9f7 | 324 | .type Reset_Handler, %function |
<> | 144:ef7eb2e8f9f7 | 325 | Reset_Handler: |
<> | 144:ef7eb2e8f9f7 | 326 | cpsid i /* Mask interrupts */ |
<> | 144:ef7eb2e8f9f7 | 327 | .equ VTOR, 0xE000ED08 |
<> | 144:ef7eb2e8f9f7 | 328 | ldr r0, =VTOR |
<> | 144:ef7eb2e8f9f7 | 329 | ldr r1, =__isr_vector |
<> | 144:ef7eb2e8f9f7 | 330 | str r1, [r0] |
<> | 144:ef7eb2e8f9f7 | 331 | #ifndef __NO_SYSTEM_INIT |
<> | 144:ef7eb2e8f9f7 | 332 | ldr r0,=SystemInit |
<> | 144:ef7eb2e8f9f7 | 333 | blx r0 |
<> | 144:ef7eb2e8f9f7 | 334 | #endif |
<> | 144:ef7eb2e8f9f7 | 335 | /* Loop to copy data from read only memory to RAM. The ranges |
<> | 144:ef7eb2e8f9f7 | 336 | * of copy from/to are specified by following symbols evaluated in |
<> | 144:ef7eb2e8f9f7 | 337 | * linker script. |
<> | 144:ef7eb2e8f9f7 | 338 | * __etext: End of code section, i.e., begin of data sections to copy from. |
<> | 144:ef7eb2e8f9f7 | 339 | * __data_start__/__data_end__: RAM address range that data should be |
<> | 144:ef7eb2e8f9f7 | 340 | * copied to. Both must be aligned to 4 bytes boundary. */ |
<> | 144:ef7eb2e8f9f7 | 341 | |
<> | 144:ef7eb2e8f9f7 | 342 | ldr r1, =__etext |
<> | 144:ef7eb2e8f9f7 | 343 | ldr r2, =__data_start__ |
<> | 144:ef7eb2e8f9f7 | 344 | ldr r3, =__data_end__ |
<> | 144:ef7eb2e8f9f7 | 345 | |
<> | 144:ef7eb2e8f9f7 | 346 | #if 1 |
<> | 144:ef7eb2e8f9f7 | 347 | /* Here are two copies of loop implemenations. First one favors code size |
<> | 144:ef7eb2e8f9f7 | 348 | * and the second one favors performance. Default uses the first one. |
<> | 144:ef7eb2e8f9f7 | 349 | * Change to "#if 0" to use the second one */ |
<> | 144:ef7eb2e8f9f7 | 350 | .LC0: |
<> | 144:ef7eb2e8f9f7 | 351 | cmp r2, r3 |
<> | 144:ef7eb2e8f9f7 | 352 | ittt lt |
<> | 144:ef7eb2e8f9f7 | 353 | ldrlt r0, [r1], #4 |
<> | 144:ef7eb2e8f9f7 | 354 | strlt r0, [r2], #4 |
<> | 144:ef7eb2e8f9f7 | 355 | blt .LC0 |
<> | 144:ef7eb2e8f9f7 | 356 | #else |
<> | 144:ef7eb2e8f9f7 | 357 | subs r3, r2 |
<> | 144:ef7eb2e8f9f7 | 358 | ble .LC1 |
<> | 144:ef7eb2e8f9f7 | 359 | .LC0: |
<> | 144:ef7eb2e8f9f7 | 360 | subs r3, #4 |
<> | 144:ef7eb2e8f9f7 | 361 | ldr r0, [r1, r3] |
<> | 144:ef7eb2e8f9f7 | 362 | str r0, [r2, r3] |
<> | 144:ef7eb2e8f9f7 | 363 | bgt .LC0 |
<> | 144:ef7eb2e8f9f7 | 364 | .LC1: |
<> | 144:ef7eb2e8f9f7 | 365 | #endif |
<> | 144:ef7eb2e8f9f7 | 366 | |
<> | 144:ef7eb2e8f9f7 | 367 | #ifdef __STARTUP_CLEAR_BSS |
<> | 144:ef7eb2e8f9f7 | 368 | /* This part of work usually is done in C library startup code. Otherwise, |
<> | 144:ef7eb2e8f9f7 | 369 | * define this macro to enable it in this startup. |
<> | 144:ef7eb2e8f9f7 | 370 | * |
<> | 144:ef7eb2e8f9f7 | 371 | * Loop to zero out BSS section, which uses following symbols |
<> | 144:ef7eb2e8f9f7 | 372 | * in linker script: |
<> | 144:ef7eb2e8f9f7 | 373 | * __bss_start__: start of BSS section. Must align to 4 |
<> | 144:ef7eb2e8f9f7 | 374 | * __bss_end__: end of BSS section. Must align to 4 |
<> | 144:ef7eb2e8f9f7 | 375 | */ |
<> | 144:ef7eb2e8f9f7 | 376 | ldr r1, =__bss_start__ |
<> | 144:ef7eb2e8f9f7 | 377 | ldr r2, =__bss_end__ |
<> | 144:ef7eb2e8f9f7 | 378 | |
<> | 144:ef7eb2e8f9f7 | 379 | movs r0, 0 |
<> | 144:ef7eb2e8f9f7 | 380 | .LC2: |
<> | 144:ef7eb2e8f9f7 | 381 | cmp r1, r2 |
<> | 144:ef7eb2e8f9f7 | 382 | itt lt |
<> | 144:ef7eb2e8f9f7 | 383 | strlt r0, [r1], #4 |
<> | 144:ef7eb2e8f9f7 | 384 | blt .LC2 |
<> | 144:ef7eb2e8f9f7 | 385 | #endif /* __STARTUP_CLEAR_BSS */ |
<> | 144:ef7eb2e8f9f7 | 386 | |
<> | 144:ef7eb2e8f9f7 | 387 | cpsie i /* Unmask interrupts */ |
<> | 144:ef7eb2e8f9f7 | 388 | #ifndef __START |
<> | 144:ef7eb2e8f9f7 | 389 | #define __START _start |
<> | 144:ef7eb2e8f9f7 | 390 | #endif |
<> | 144:ef7eb2e8f9f7 | 391 | #ifndef __ATOLLIC__ |
<> | 144:ef7eb2e8f9f7 | 392 | ldr r0,=__START |
<> | 144:ef7eb2e8f9f7 | 393 | blx r0 |
<> | 144:ef7eb2e8f9f7 | 394 | #else |
<> | 144:ef7eb2e8f9f7 | 395 | ldr r0,=__libc_init_array |
<> | 144:ef7eb2e8f9f7 | 396 | blx r0 |
<> | 144:ef7eb2e8f9f7 | 397 | ldr r0,=main |
<> | 144:ef7eb2e8f9f7 | 398 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 399 | #endif |
<> | 144:ef7eb2e8f9f7 | 400 | .pool |
<> | 144:ef7eb2e8f9f7 | 401 | .size Reset_Handler, . - Reset_Handler |
<> | 144:ef7eb2e8f9f7 | 402 | |
<> | 144:ef7eb2e8f9f7 | 403 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 404 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 405 | .weak DefaultISR |
<> | 144:ef7eb2e8f9f7 | 406 | .type DefaultISR, %function |
<> | 144:ef7eb2e8f9f7 | 407 | DefaultISR: |
<> | 144:ef7eb2e8f9f7 | 408 | b DefaultISR |
<> | 144:ef7eb2e8f9f7 | 409 | .size DefaultISR, . - DefaultISR |
<> | 144:ef7eb2e8f9f7 | 410 | |
<> | 144:ef7eb2e8f9f7 | 411 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 412 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 413 | .weak NMI_Handler |
<> | 144:ef7eb2e8f9f7 | 414 | .type NMI_Handler, %function |
<> | 144:ef7eb2e8f9f7 | 415 | NMI_Handler: |
<> | 144:ef7eb2e8f9f7 | 416 | ldr r0,=NMI_Handler |
<> | 144:ef7eb2e8f9f7 | 417 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 418 | .size NMI_Handler, . - NMI_Handler |
<> | 144:ef7eb2e8f9f7 | 419 | |
<> | 144:ef7eb2e8f9f7 | 420 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 421 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 422 | .weak HardFault_Handler |
<> | 144:ef7eb2e8f9f7 | 423 | .type HardFault_Handler, %function |
<> | 144:ef7eb2e8f9f7 | 424 | HardFault_Handler: |
<> | 144:ef7eb2e8f9f7 | 425 | ldr r0,=HardFault_Handler |
<> | 144:ef7eb2e8f9f7 | 426 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 427 | .size HardFault_Handler, . - HardFault_Handler |
<> | 144:ef7eb2e8f9f7 | 428 | |
<> | 144:ef7eb2e8f9f7 | 429 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 430 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 431 | .weak SVC_Handler |
<> | 144:ef7eb2e8f9f7 | 432 | .type SVC_Handler, %function |
<> | 144:ef7eb2e8f9f7 | 433 | SVC_Handler: |
<> | 144:ef7eb2e8f9f7 | 434 | ldr r0,=SVC_Handler |
<> | 144:ef7eb2e8f9f7 | 435 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 436 | .size SVC_Handler, . - SVC_Handler |
<> | 144:ef7eb2e8f9f7 | 437 | |
<> | 144:ef7eb2e8f9f7 | 438 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 439 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 440 | .weak PendSV_Handler |
<> | 144:ef7eb2e8f9f7 | 441 | .type PendSV_Handler, %function |
<> | 144:ef7eb2e8f9f7 | 442 | PendSV_Handler: |
<> | 144:ef7eb2e8f9f7 | 443 | ldr r0,=PendSV_Handler |
<> | 144:ef7eb2e8f9f7 | 444 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 445 | .size PendSV_Handler, . - PendSV_Handler |
<> | 144:ef7eb2e8f9f7 | 446 | |
<> | 144:ef7eb2e8f9f7 | 447 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 448 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 449 | .weak SysTick_Handler |
<> | 144:ef7eb2e8f9f7 | 450 | .type SysTick_Handler, %function |
<> | 144:ef7eb2e8f9f7 | 451 | SysTick_Handler: |
<> | 144:ef7eb2e8f9f7 | 452 | ldr r0,=SysTick_Handler |
<> | 144:ef7eb2e8f9f7 | 453 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 454 | .size SysTick_Handler, . - SysTick_Handler |
<> | 144:ef7eb2e8f9f7 | 455 | |
<> | 144:ef7eb2e8f9f7 | 456 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 457 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 458 | .weak DMA0_DMA16_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 459 | .type DMA0_DMA16_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 460 | DMA0_DMA16_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 461 | ldr r0,=DMA0_DMA16_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 462 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 463 | .size DMA0_DMA16_IRQHandler, . - DMA0_DMA16_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 464 | |
<> | 144:ef7eb2e8f9f7 | 465 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 466 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 467 | .weak DMA1_DMA17_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 468 | .type DMA1_DMA17_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 469 | DMA1_DMA17_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 470 | ldr r0,=DMA1_DMA17_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 471 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 472 | .size DMA1_DMA17_IRQHandler, . - DMA1_DMA17_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 473 | |
<> | 144:ef7eb2e8f9f7 | 474 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 475 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 476 | .weak DMA2_DMA18_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 477 | .type DMA2_DMA18_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 478 | DMA2_DMA18_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 479 | ldr r0,=DMA2_DMA18_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 480 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 481 | .size DMA2_DMA18_IRQHandler, . - DMA2_DMA18_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 482 | |
<> | 144:ef7eb2e8f9f7 | 483 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 484 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 485 | .weak DMA3_DMA19_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 486 | .type DMA3_DMA19_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 487 | DMA3_DMA19_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 488 | ldr r0,=DMA3_DMA19_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 489 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 490 | .size DMA3_DMA19_IRQHandler, . - DMA3_DMA19_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 491 | |
<> | 144:ef7eb2e8f9f7 | 492 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 493 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 494 | .weak DMA4_DMA20_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 495 | .type DMA4_DMA20_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 496 | DMA4_DMA20_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 497 | ldr r0,=DMA4_DMA20_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 498 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 499 | .size DMA4_DMA20_IRQHandler, . - DMA4_DMA20_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 500 | |
<> | 144:ef7eb2e8f9f7 | 501 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 502 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 503 | .weak DMA5_DMA21_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 504 | .type DMA5_DMA21_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 505 | DMA5_DMA21_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 506 | ldr r0,=DMA5_DMA21_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 507 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 508 | .size DMA5_DMA21_IRQHandler, . - DMA5_DMA21_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 509 | |
<> | 144:ef7eb2e8f9f7 | 510 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 511 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 512 | .weak DMA6_DMA22_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 513 | .type DMA6_DMA22_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 514 | DMA6_DMA22_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 515 | ldr r0,=DMA6_DMA22_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 516 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 517 | .size DMA6_DMA22_IRQHandler, . - DMA6_DMA22_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 518 | |
<> | 144:ef7eb2e8f9f7 | 519 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 520 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 521 | .weak DMA7_DMA23_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 522 | .type DMA7_DMA23_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 523 | DMA7_DMA23_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 524 | ldr r0,=DMA7_DMA23_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 525 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 526 | .size DMA7_DMA23_IRQHandler, . - DMA7_DMA23_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 527 | |
<> | 144:ef7eb2e8f9f7 | 528 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 529 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 530 | .weak DMA8_DMA24_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 531 | .type DMA8_DMA24_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 532 | DMA8_DMA24_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 533 | ldr r0,=DMA8_DMA24_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 534 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 535 | .size DMA8_DMA24_IRQHandler, . - DMA8_DMA24_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 536 | |
<> | 144:ef7eb2e8f9f7 | 537 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 538 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 539 | .weak DMA9_DMA25_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 540 | .type DMA9_DMA25_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 541 | DMA9_DMA25_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 542 | ldr r0,=DMA9_DMA25_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 543 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 544 | .size DMA9_DMA25_IRQHandler, . - DMA9_DMA25_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 545 | |
<> | 144:ef7eb2e8f9f7 | 546 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 547 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 548 | .weak DMA10_DMA26_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 549 | .type DMA10_DMA26_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 550 | DMA10_DMA26_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 551 | ldr r0,=DMA10_DMA26_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 552 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 553 | .size DMA10_DMA26_IRQHandler, . - DMA10_DMA26_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 554 | |
<> | 144:ef7eb2e8f9f7 | 555 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 556 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 557 | .weak DMA11_DMA27_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 558 | .type DMA11_DMA27_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 559 | DMA11_DMA27_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 560 | ldr r0,=DMA11_DMA27_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 561 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 562 | .size DMA11_DMA27_IRQHandler, . - DMA11_DMA27_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 563 | |
<> | 144:ef7eb2e8f9f7 | 564 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 565 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 566 | .weak DMA12_DMA28_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 567 | .type DMA12_DMA28_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 568 | DMA12_DMA28_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 569 | ldr r0,=DMA12_DMA28_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 570 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 571 | .size DMA12_DMA28_IRQHandler, . - DMA12_DMA28_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 572 | |
<> | 144:ef7eb2e8f9f7 | 573 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 574 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 575 | .weak DMA13_DMA29_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 576 | .type DMA13_DMA29_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 577 | DMA13_DMA29_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 578 | ldr r0,=DMA13_DMA29_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 579 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 580 | .size DMA13_DMA29_IRQHandler, . - DMA13_DMA29_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 581 | |
<> | 144:ef7eb2e8f9f7 | 582 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 583 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 584 | .weak DMA14_DMA30_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 585 | .type DMA14_DMA30_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 586 | DMA14_DMA30_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 587 | ldr r0,=DMA14_DMA30_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 588 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 589 | .size DMA14_DMA30_IRQHandler, . - DMA14_DMA30_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 590 | |
<> | 144:ef7eb2e8f9f7 | 591 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 592 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 593 | .weak DMA15_DMA31_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 594 | .type DMA15_DMA31_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 595 | DMA15_DMA31_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 596 | ldr r0,=DMA15_DMA31_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 597 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 598 | .size DMA15_DMA31_IRQHandler, . - DMA15_DMA31_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 599 | |
<> | 144:ef7eb2e8f9f7 | 600 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 601 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 602 | .weak DMA_Error_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 603 | .type DMA_Error_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 604 | DMA_Error_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 605 | ldr r0,=DMA_Error_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 606 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 607 | .size DMA_Error_IRQHandler, . - DMA_Error_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 608 | |
<> | 144:ef7eb2e8f9f7 | 609 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 610 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 611 | .weak I2C0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 612 | .type I2C0_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 613 | I2C0_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 614 | ldr r0,=I2C0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 615 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 616 | .size I2C0_IRQHandler, . - I2C0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 617 | |
<> | 144:ef7eb2e8f9f7 | 618 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 619 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 620 | .weak I2C1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 621 | .type I2C1_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 622 | I2C1_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 623 | ldr r0,=I2C1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 624 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 625 | .size I2C1_IRQHandler, . - I2C1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 626 | |
<> | 144:ef7eb2e8f9f7 | 627 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 628 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 629 | .weak SPI0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 630 | .type SPI0_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 631 | SPI0_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 632 | ldr r0,=SPI0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 633 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 634 | .size SPI0_IRQHandler, . - SPI0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 635 | |
<> | 144:ef7eb2e8f9f7 | 636 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 637 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 638 | .weak SPI1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 639 | .type SPI1_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 640 | SPI1_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 641 | ldr r0,=SPI1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 642 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 643 | .size SPI1_IRQHandler, . - SPI1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 644 | |
<> | 144:ef7eb2e8f9f7 | 645 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 646 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 647 | .weak I2S0_Tx_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 648 | .type I2S0_Tx_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 649 | I2S0_Tx_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 650 | ldr r0,=I2S0_Tx_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 651 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 652 | .size I2S0_Tx_IRQHandler, . - I2S0_Tx_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 653 | |
<> | 144:ef7eb2e8f9f7 | 654 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 655 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 656 | .weak I2S0_Rx_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 657 | .type I2S0_Rx_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 658 | I2S0_Rx_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 659 | ldr r0,=I2S0_Rx_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 660 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 661 | .size I2S0_Rx_IRQHandler, . - I2S0_Rx_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 662 | |
<> | 144:ef7eb2e8f9f7 | 663 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 664 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 665 | .weak UART0_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 666 | .type UART0_RX_TX_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 667 | UART0_RX_TX_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 668 | ldr r0,=UART0_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 669 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 670 | .size UART0_RX_TX_IRQHandler, . - UART0_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 671 | |
<> | 144:ef7eb2e8f9f7 | 672 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 673 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 674 | .weak UART0_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 675 | .type UART0_ERR_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 676 | UART0_ERR_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 677 | ldr r0,=UART0_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 678 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 679 | .size UART0_ERR_IRQHandler, . - UART0_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 680 | |
<> | 144:ef7eb2e8f9f7 | 681 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 682 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 683 | .weak UART1_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 684 | .type UART1_RX_TX_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 685 | UART1_RX_TX_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 686 | ldr r0,=UART1_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 687 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 688 | .size UART1_RX_TX_IRQHandler, . - UART1_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 689 | |
<> | 144:ef7eb2e8f9f7 | 690 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 691 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 692 | .weak UART1_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 693 | .type UART1_ERR_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 694 | UART1_ERR_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 695 | ldr r0,=UART1_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 696 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 697 | .size UART1_ERR_IRQHandler, . - UART1_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 698 | |
<> | 144:ef7eb2e8f9f7 | 699 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 700 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 701 | .weak UART2_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 702 | .type UART2_RX_TX_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 703 | UART2_RX_TX_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 704 | ldr r0,=UART2_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 705 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 706 | .size UART2_RX_TX_IRQHandler, . - UART2_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 707 | |
<> | 144:ef7eb2e8f9f7 | 708 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 709 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 710 | .weak UART2_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 711 | .type UART2_ERR_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 712 | UART2_ERR_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 713 | ldr r0,=UART2_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 714 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 715 | .size UART2_ERR_IRQHandler, . - UART2_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 716 | |
<> | 144:ef7eb2e8f9f7 | 717 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 718 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 719 | .weak UART3_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 720 | .type UART3_RX_TX_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 721 | UART3_RX_TX_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 722 | ldr r0,=UART3_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 723 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 724 | .size UART3_RX_TX_IRQHandler, . - UART3_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 725 | |
<> | 144:ef7eb2e8f9f7 | 726 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 727 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 728 | .weak UART3_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 729 | .type UART3_ERR_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 730 | UART3_ERR_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 731 | ldr r0,=UART3_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 732 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 733 | .size UART3_ERR_IRQHandler, . - UART3_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 734 | |
<> | 144:ef7eb2e8f9f7 | 735 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 736 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 737 | .weak SPI2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 738 | .type SPI2_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 739 | SPI2_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 740 | ldr r0,=SPI2_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 741 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 742 | .size SPI2_IRQHandler, . - SPI2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 743 | |
<> | 144:ef7eb2e8f9f7 | 744 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 745 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 746 | .weak UART4_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 747 | .type UART4_RX_TX_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 748 | UART4_RX_TX_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 749 | ldr r0,=UART4_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 750 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 751 | .size UART4_RX_TX_IRQHandler, . - UART4_RX_TX_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 752 | |
<> | 144:ef7eb2e8f9f7 | 753 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 754 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 755 | .weak UART4_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 756 | .type UART4_ERR_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 757 | UART4_ERR_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 758 | ldr r0,=UART4_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 759 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 760 | .size UART4_ERR_IRQHandler, . - UART4_ERR_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 761 | |
<> | 144:ef7eb2e8f9f7 | 762 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 763 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 764 | .weak I2C2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 765 | .type I2C2_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 766 | I2C2_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 767 | ldr r0,=I2C2_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 768 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 769 | .size I2C2_IRQHandler, . - I2C2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 770 | |
<> | 144:ef7eb2e8f9f7 | 771 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 772 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 773 | .weak CAN0_ORed_Message_buffer_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 774 | .type CAN0_ORed_Message_buffer_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 775 | CAN0_ORed_Message_buffer_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 776 | ldr r0,=CAN0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 777 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 778 | .size CAN0_ORed_Message_buffer_IRQHandler, . - CAN0_ORed_Message_buffer_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 779 | |
<> | 144:ef7eb2e8f9f7 | 780 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 781 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 782 | .weak CAN0_Bus_Off_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 783 | .type CAN0_Bus_Off_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 784 | CAN0_Bus_Off_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 785 | ldr r0,=CAN0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 786 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 787 | .size CAN0_Bus_Off_IRQHandler, . - CAN0_Bus_Off_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 788 | |
<> | 144:ef7eb2e8f9f7 | 789 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 790 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 791 | .weak CAN0_Error_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 792 | .type CAN0_Error_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 793 | CAN0_Error_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 794 | ldr r0,=CAN0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 795 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 796 | .size CAN0_Error_IRQHandler, . - CAN0_Error_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 797 | |
<> | 144:ef7eb2e8f9f7 | 798 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 799 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 800 | .weak CAN0_Tx_Warning_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 801 | .type CAN0_Tx_Warning_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 802 | CAN0_Tx_Warning_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 803 | ldr r0,=CAN0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 804 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 805 | .size CAN0_Tx_Warning_IRQHandler, . - CAN0_Tx_Warning_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 806 | |
<> | 144:ef7eb2e8f9f7 | 807 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 808 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 809 | .weak CAN0_Rx_Warning_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 810 | .type CAN0_Rx_Warning_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 811 | CAN0_Rx_Warning_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 812 | ldr r0,=CAN0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 813 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 814 | .size CAN0_Rx_Warning_IRQHandler, . - CAN0_Rx_Warning_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 815 | |
<> | 144:ef7eb2e8f9f7 | 816 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 817 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 818 | .weak CAN0_Wake_Up_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 819 | .type CAN0_Wake_Up_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 820 | CAN0_Wake_Up_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 821 | ldr r0,=CAN0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 822 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 823 | .size CAN0_Wake_Up_IRQHandler, . - CAN0_Wake_Up_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 824 | |
<> | 144:ef7eb2e8f9f7 | 825 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 826 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 827 | .weak SDHC_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 828 | .type SDHC_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 829 | SDHC_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 830 | ldr r0,=SDHC_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 831 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 832 | .size SDHC_IRQHandler, . - SDHC_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 833 | |
<> | 144:ef7eb2e8f9f7 | 834 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 835 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 836 | .weak ENET_1588_Timer_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 837 | .type ENET_1588_Timer_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 838 | ENET_1588_Timer_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 839 | ldr r0,=ENET_1588_Timer_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 840 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 841 | .size ENET_1588_Timer_IRQHandler, . - ENET_1588_Timer_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 842 | |
<> | 144:ef7eb2e8f9f7 | 843 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 844 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 845 | .weak ENET_Transmit_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 846 | .type ENET_Transmit_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 847 | ENET_Transmit_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 848 | ldr r0,=ENET_Transmit_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 849 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 850 | .size ENET_Transmit_IRQHandler, . - ENET_Transmit_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 851 | |
<> | 144:ef7eb2e8f9f7 | 852 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 853 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 854 | .weak ENET_Receive_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 855 | .type ENET_Receive_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 856 | ENET_Receive_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 857 | ldr r0,=ENET_Receive_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 858 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 859 | .size ENET_Receive_IRQHandler, . - ENET_Receive_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 860 | |
<> | 144:ef7eb2e8f9f7 | 861 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 862 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 863 | .weak ENET_Error_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 864 | .type ENET_Error_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 865 | ENET_Error_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 866 | ldr r0,=ENET_Error_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 867 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 868 | .size ENET_Error_IRQHandler, . - ENET_Error_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 869 | |
<> | 144:ef7eb2e8f9f7 | 870 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 871 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 872 | .weak LPUART0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 873 | .type LPUART0_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 874 | LPUART0_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 875 | ldr r0,=LPUART0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 876 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 877 | .size LPUART0_IRQHandler, . - LPUART0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 878 | |
<> | 144:ef7eb2e8f9f7 | 879 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 880 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 881 | .weak I2C3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 882 | .type I2C3_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 883 | I2C3_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 884 | ldr r0,=I2C3_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 885 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 886 | .size I2C3_IRQHandler, . - I2C3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 887 | |
<> | 144:ef7eb2e8f9f7 | 888 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 889 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 890 | .weak CAN1_ORed_Message_buffer_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 891 | .type CAN1_ORed_Message_buffer_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 892 | CAN1_ORed_Message_buffer_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 893 | ldr r0,=CAN1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 894 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 895 | .size CAN1_ORed_Message_buffer_IRQHandler, . - CAN1_ORed_Message_buffer_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 896 | |
<> | 144:ef7eb2e8f9f7 | 897 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 898 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 899 | .weak CAN1_Bus_Off_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 900 | .type CAN1_Bus_Off_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 901 | CAN1_Bus_Off_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 902 | ldr r0,=CAN1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 903 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 904 | .size CAN1_Bus_Off_IRQHandler, . - CAN1_Bus_Off_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 905 | |
<> | 144:ef7eb2e8f9f7 | 906 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 907 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 908 | .weak CAN1_Error_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 909 | .type CAN1_Error_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 910 | CAN1_Error_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 911 | ldr r0,=CAN1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 912 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 913 | .size CAN1_Error_IRQHandler, . - CAN1_Error_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 914 | |
<> | 144:ef7eb2e8f9f7 | 915 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 916 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 917 | .weak CAN1_Tx_Warning_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 918 | .type CAN1_Tx_Warning_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 919 | CAN1_Tx_Warning_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 920 | ldr r0,=CAN1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 921 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 922 | .size CAN1_Tx_Warning_IRQHandler, . - CAN1_Tx_Warning_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 923 | |
<> | 144:ef7eb2e8f9f7 | 924 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 925 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 926 | .weak CAN1_Rx_Warning_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 927 | .type CAN1_Rx_Warning_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 928 | CAN1_Rx_Warning_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 929 | ldr r0,=CAN1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 930 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 931 | .size CAN1_Rx_Warning_IRQHandler, . - CAN1_Rx_Warning_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 932 | |
<> | 144:ef7eb2e8f9f7 | 933 | .align 1 |
<> | 144:ef7eb2e8f9f7 | 934 | .thumb_func |
<> | 144:ef7eb2e8f9f7 | 935 | .weak CAN1_Wake_Up_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 936 | .type CAN1_Wake_Up_IRQHandler, %function |
<> | 144:ef7eb2e8f9f7 | 937 | CAN1_Wake_Up_IRQHandler: |
<> | 144:ef7eb2e8f9f7 | 938 | ldr r0,=CAN1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 939 | bx r0 |
<> | 144:ef7eb2e8f9f7 | 940 | .size CAN1_Wake_Up_IRQHandler, . - CAN1_Wake_Up_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 941 | |
<> | 144:ef7eb2e8f9f7 | 942 | |
<> | 144:ef7eb2e8f9f7 | 943 | /* Macro to define default handlers. Default handler |
<> | 144:ef7eb2e8f9f7 | 944 | * will be weak symbol and just dead loops. They can be |
<> | 144:ef7eb2e8f9f7 | 945 | * overwritten by other handlers */ |
<> | 144:ef7eb2e8f9f7 | 946 | .macro def_irq_handler handler_name |
<> | 144:ef7eb2e8f9f7 | 947 | .weak \handler_name |
<> | 144:ef7eb2e8f9f7 | 948 | .set \handler_name, DefaultISR |
<> | 144:ef7eb2e8f9f7 | 949 | .endm |
<> | 144:ef7eb2e8f9f7 | 950 | |
<> | 144:ef7eb2e8f9f7 | 951 | /* Exception Handlers */ |
<> | 144:ef7eb2e8f9f7 | 952 | def_irq_handler MemManage_Handler |
<> | 144:ef7eb2e8f9f7 | 953 | def_irq_handler BusFault_Handler |
<> | 144:ef7eb2e8f9f7 | 954 | def_irq_handler UsageFault_Handler |
<> | 144:ef7eb2e8f9f7 | 955 | def_irq_handler DebugMon_Handler |
<> | 144:ef7eb2e8f9f7 | 956 | def_irq_handler DMA0_DMA16_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 957 | def_irq_handler DMA1_DMA17_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 958 | def_irq_handler DMA2_DMA18_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 959 | def_irq_handler DMA3_DMA19_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 960 | def_irq_handler DMA4_DMA20_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 961 | def_irq_handler DMA5_DMA21_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 962 | def_irq_handler DMA6_DMA22_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 963 | def_irq_handler DMA7_DMA23_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 964 | def_irq_handler DMA8_DMA24_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 965 | def_irq_handler DMA9_DMA25_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 966 | def_irq_handler DMA10_DMA26_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 967 | def_irq_handler DMA11_DMA27_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 968 | def_irq_handler DMA12_DMA28_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 969 | def_irq_handler DMA13_DMA29_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 970 | def_irq_handler DMA14_DMA30_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 971 | def_irq_handler DMA15_DMA31_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 972 | def_irq_handler DMA_Error_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 973 | def_irq_handler MCM_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 974 | def_irq_handler FTFE_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 975 | def_irq_handler Read_Collision_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 976 | def_irq_handler LVD_LVW_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 977 | def_irq_handler LLWU_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 978 | def_irq_handler WDOG_EWM_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 979 | def_irq_handler RNG_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 980 | def_irq_handler I2C0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 981 | def_irq_handler I2C1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 982 | def_irq_handler SPI0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 983 | def_irq_handler SPI1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 984 | def_irq_handler I2S0_Tx_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 985 | def_irq_handler I2S0_Rx_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 986 | def_irq_handler Reserved46_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 987 | def_irq_handler UART0_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 988 | def_irq_handler UART0_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 989 | def_irq_handler UART1_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 990 | def_irq_handler UART1_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 991 | def_irq_handler UART2_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 992 | def_irq_handler UART2_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 993 | def_irq_handler UART3_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 994 | def_irq_handler UART3_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 995 | def_irq_handler ADC0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 996 | def_irq_handler CMP0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 997 | def_irq_handler CMP1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 998 | def_irq_handler FTM0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 999 | def_irq_handler FTM1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1000 | def_irq_handler FTM2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1001 | def_irq_handler CMT_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1002 | def_irq_handler RTC_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1003 | def_irq_handler RTC_Seconds_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1004 | def_irq_handler PIT0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1005 | def_irq_handler PIT1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1006 | def_irq_handler PIT2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1007 | def_irq_handler PIT3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1008 | def_irq_handler PDB0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1009 | def_irq_handler USB0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1010 | def_irq_handler USBDCD_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1011 | def_irq_handler Reserved71_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1012 | def_irq_handler DAC0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1013 | def_irq_handler MCG_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1014 | def_irq_handler LPTMR0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1015 | def_irq_handler PORTA_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1016 | def_irq_handler PORTB_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1017 | def_irq_handler PORTC_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1018 | def_irq_handler PORTD_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1019 | def_irq_handler PORTE_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1020 | def_irq_handler SWI_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1021 | def_irq_handler SPI2_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1022 | def_irq_handler UART4_RX_TX_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1023 | def_irq_handler UART4_ERR_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1024 | def_irq_handler Reserved84_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1025 | def_irq_handler Reserved85_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1026 | def_irq_handler CMP2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1027 | def_irq_handler FTM3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1028 | def_irq_handler DAC1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1029 | def_irq_handler ADC1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1030 | def_irq_handler I2C2_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1031 | def_irq_handler CAN0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1032 | def_irq_handler SDHC_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1033 | def_irq_handler ENET_1588_Timer_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1034 | def_irq_handler ENET_Transmit_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1035 | def_irq_handler ENET_Receive_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1036 | def_irq_handler ENET_Error_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1037 | def_irq_handler LPUART0_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1038 | def_irq_handler TSI0_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1039 | def_irq_handler TPM1_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1040 | def_irq_handler TPM2_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1041 | def_irq_handler USBHSDCD_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1042 | def_irq_handler I2C3_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1043 | def_irq_handler CMP3_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1044 | def_irq_handler USBHS_IRQHandler |
<> | 144:ef7eb2e8f9f7 | 1045 | def_irq_handler CAN1_DriverIRQHandler |
<> | 144:ef7eb2e8f9f7 | 1046 | |
<> | 144:ef7eb2e8f9f7 | 1047 | .end |