Johannes Stratmann
added prescaler for 16 bit pwm in LPC1347 target
Fork of
mbed-dev
by 
mbed official
Diff: targets/cmsis/TARGET_Freescale/TARGET_K66F/TOOLCHAIN_GCC_ARM/startup_MK66F18.S
- Revision:
- 144:ef7eb2e8f9f7
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/targets/cmsis/TARGET_Freescale/TARGET_K66F/TOOLCHAIN_GCC_ARM/startup_MK66F18.S Fri Sep 02 15:07:44 2016 +0100 @@ -0,0 +1,1047 @@ +/* ---------------------------------------------------------------------------------------*/ +/* @file: startup_MK66F18.s */ +/* @purpose: CMSIS Cortex-M4 Core Device Startup File */ +/* MK66F18 */ +/* @version: 3.0 */ +/* @date: 2015-3-25 */ +/* @build: b151210 */ +/* ---------------------------------------------------------------------------------------*/ +/* */ +/* Copyright (c) 1997 - 2015 , Freescale Semiconductor, Inc. */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without modification, */ +/* are permitted provided that the following conditions are met: */ +/* */ +/* o Redistributions of source code must retain the above copyright notice, this list */ +/* of conditions and the following disclaimer. */ +/* */ +/* o Redistributions in binary form must reproduce the above copyright notice, this */ +/* list of conditions and the following disclaimer in the documentation and/or */ +/* other materials provided with the distribution. */ +/* */ +/* o Neither the name of Freescale Semiconductor, Inc. nor the names of its */ +/* contributors may be used to endorse or promote products derived from this */ +/* software without specific prior written permission. */ +/* */ +/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND */ +/* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED */ +/* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE */ +/* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR */ +/* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES */ +/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; */ +/* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON */ +/* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT */ +/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS */ +/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/*****************************************************************************/ +/* Version: GCC for ARM Embedded Processors */ +/*****************************************************************************/ + .syntax unified + .arch armv7-m + + .section .isr_vector, "a" + .align 2 + .globl __isr_vector +__isr_vector: + .long __StackTop /* Top of Stack */ + .long Reset_Handler /* Reset Handler */ + .long NMI_Handler /* NMI Handler*/ + .long HardFault_Handler /* Hard Fault Handler*/ + .long MemManage_Handler /* MPU Fault Handler*/ + .long BusFault_Handler /* Bus Fault Handler*/ + .long UsageFault_Handler /* Usage Fault Handler*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long 0 /* Reserved*/ + .long SVC_Handler /* SVCall Handler*/ + .long DebugMon_Handler /* Debug Monitor Handler*/ + .long 0 /* Reserved*/ + .long PendSV_Handler /* PendSV Handler*/ + .long SysTick_Handler /* SysTick Handler*/ + + /* External Interrupts*/ + .long DMA0_DMA16_IRQHandler /* DMA Channel 0, 16 Transfer Complete*/ + .long DMA1_DMA17_IRQHandler /* DMA Channel 1, 17 Transfer Complete*/ + .long DMA2_DMA18_IRQHandler /* DMA Channel 2, 18 Transfer Complete*/ + .long DMA3_DMA19_IRQHandler /* DMA Channel 3, 19 Transfer Complete*/ + .long DMA4_DMA20_IRQHandler /* DMA Channel 4, 20 Transfer Complete*/ + .long DMA5_DMA21_IRQHandler /* DMA Channel 5, 21 Transfer Complete*/ + .long DMA6_DMA22_IRQHandler /* DMA Channel 6, 22 Transfer Complete*/ + .long DMA7_DMA23_IRQHandler /* DMA Channel 7, 23 Transfer Complete*/ + .long DMA8_DMA24_IRQHandler /* DMA Channel 8, 24 Transfer Complete*/ + .long DMA9_DMA25_IRQHandler /* DMA Channel 9, 25 Transfer Complete*/ + .long DMA10_DMA26_IRQHandler /* DMA Channel 10, 26 Transfer Complete*/ + .long DMA11_DMA27_IRQHandler /* DMA Channel 11, 27 Transfer Complete*/ + .long DMA12_DMA28_IRQHandler /* DMA Channel 12, 28 Transfer Complete*/ + .long DMA13_DMA29_IRQHandler /* DMA Channel 13, 29 Transfer Complete*/ + .long DMA14_DMA30_IRQHandler /* DMA Channel 14, 30 Transfer Complete*/ + .long DMA15_DMA31_IRQHandler /* DMA Channel 15, 31 Transfer Complete*/ + .long DMA_Error_IRQHandler /* DMA Error Interrupt*/ + .long MCM_IRQHandler /* Normal Interrupt*/ + .long FTFE_IRQHandler /* FTFE Command complete interrupt*/ + .long Read_Collision_IRQHandler /* Read Collision Interrupt*/ + .long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning*/ + .long LLWU_IRQHandler /* Low Leakage Wakeup Unit*/ + .long WDOG_EWM_IRQHandler /* WDOG Interrupt*/ + .long RNG_IRQHandler /* RNG Interrupt*/ + .long I2C0_IRQHandler /* I2C0 interrupt*/ + .long I2C1_IRQHandler /* I2C1 interrupt*/ + .long SPI0_IRQHandler /* SPI0 Interrupt*/ + .long SPI1_IRQHandler /* SPI1 Interrupt*/ + .long I2S0_Tx_IRQHandler /* I2S0 transmit interrupt*/ + .long I2S0_Rx_IRQHandler /* I2S0 receive interrupt*/ + .long Reserved46_IRQHandler /* Reserved interrupt 46*/ + .long UART0_RX_TX_IRQHandler /* UART0 Receive/Transmit interrupt*/ + .long UART0_ERR_IRQHandler /* UART0 Error interrupt*/ + .long UART1_RX_TX_IRQHandler /* UART1 Receive/Transmit interrupt*/ + .long UART1_ERR_IRQHandler /* UART1 Error interrupt*/ + .long UART2_RX_TX_IRQHandler /* UART2 Receive/Transmit interrupt*/ + .long UART2_ERR_IRQHandler /* UART2 Error interrupt*/ + .long UART3_RX_TX_IRQHandler /* UART3 Receive/Transmit interrupt*/ + .long UART3_ERR_IRQHandler /* UART3 Error interrupt*/ + .long ADC0_IRQHandler /* ADC0 interrupt*/ + .long CMP0_IRQHandler /* CMP0 interrupt*/ + .long CMP1_IRQHandler /* CMP1 interrupt*/ + .long FTM0_IRQHandler /* FTM0 fault, overflow and channels interrupt*/ + .long FTM1_IRQHandler /* FTM1 fault, overflow and channels interrupt*/ + .long FTM2_IRQHandler /* FTM2 fault, overflow and channels interrupt*/ + .long CMT_IRQHandler /* CMT interrupt*/ + .long RTC_IRQHandler /* RTC interrupt*/ + .long RTC_Seconds_IRQHandler /* RTC seconds interrupt*/ + .long PIT0_IRQHandler /* PIT timer channel 0 interrupt*/ + .long PIT1_IRQHandler /* PIT timer channel 1 interrupt*/ + .long PIT2_IRQHandler /* PIT timer channel 2 interrupt*/ + .long PIT3_IRQHandler /* PIT timer channel 3 interrupt*/ + .long PDB0_IRQHandler /* PDB0 Interrupt*/ + .long USB0_IRQHandler /* USB0 interrupt*/ + .long USBDCD_IRQHandler /* USBDCD Interrupt*/ + .long Reserved71_IRQHandler /* Reserved interrupt 71*/ + .long DAC0_IRQHandler /* DAC0 interrupt*/ + .long MCG_IRQHandler /* MCG Interrupt*/ + .long LPTMR0_IRQHandler /* LPTimer interrupt*/ + .long PORTA_IRQHandler /* Port A interrupt*/ + .long PORTB_IRQHandler /* Port B interrupt*/ + .long PORTC_IRQHandler /* Port C interrupt*/ + .long PORTD_IRQHandler /* Port D interrupt*/ + .long PORTE_IRQHandler /* Port E interrupt*/ + .long SWI_IRQHandler /* Software interrupt*/ + .long SPI2_IRQHandler /* SPI2 Interrupt*/ + .long UART4_RX_TX_IRQHandler /* UART4 Receive/Transmit interrupt*/ + .long UART4_ERR_IRQHandler /* UART4 Error interrupt*/ + .long Reserved84_IRQHandler /* Reserved interrupt 84*/ + .long Reserved85_IRQHandler /* Reserved interrupt 85*/ + .long CMP2_IRQHandler /* CMP2 interrupt*/ + .long FTM3_IRQHandler /* FTM3 fault, overflow and channels interrupt*/ + .long DAC1_IRQHandler /* DAC1 interrupt*/ + .long ADC1_IRQHandler /* ADC1 interrupt*/ + .long I2C2_IRQHandler /* I2C2 interrupt*/ + .long CAN0_ORed_Message_buffer_IRQHandler /* CAN0 OR'd message buffers interrupt*/ + .long CAN0_Bus_Off_IRQHandler /* CAN0 bus off interrupt*/ + .long CAN0_Error_IRQHandler /* CAN0 error interrupt*/ + .long CAN0_Tx_Warning_IRQHandler /* CAN0 Tx warning interrupt*/ + .long CAN0_Rx_Warning_IRQHandler /* CAN0 Rx warning interrupt*/ + .long CAN0_Wake_Up_IRQHandler /* CAN0 wake up interrupt*/ + .long SDHC_IRQHandler /* SDHC interrupt*/ + .long ENET_1588_Timer_IRQHandler /* Ethernet MAC IEEE 1588 Timer Interrupt*/ + .long ENET_Transmit_IRQHandler /* Ethernet MAC Transmit Interrupt*/ + .long ENET_Receive_IRQHandler /* Ethernet MAC Receive Interrupt*/ + .long ENET_Error_IRQHandler /* Ethernet MAC Error and miscelaneous Interrupt*/ + .long LPUART0_IRQHandler /* LPUART0 status/error interrupt*/ + .long TSI0_IRQHandler /* TSI0 interrupt*/ + .long TPM1_IRQHandler /* TPM1 fault, overflow and channels interrupt*/ + .long TPM2_IRQHandler /* TPM2 fault, overflow and channels interrupt*/ + .long USBHSDCD_IRQHandler /* USBHSDCD, USBHS Phy Interrupt*/ + .long I2C3_IRQHandler /* I2C3 interrupt*/ + .long CMP3_IRQHandler /* CMP3 interrupt*/ + .long USBHS_IRQHandler /* USB high speed OTG interrupt*/ + .long CAN1_ORed_Message_buffer_IRQHandler /* CAN1 OR'd message buffers interrupt*/ + .long CAN1_Bus_Off_IRQHandler /* CAN1 bus off interrupt*/ + .long CAN1_Error_IRQHandler /* CAN1 error interrupt*/ + .long CAN1_Tx_Warning_IRQHandler /* CAN1 Tx warning interrupt*/ + .long CAN1_Rx_Warning_IRQHandler /* CAN1 Rx warning interrupt*/ + .long CAN1_Wake_Up_IRQHandler /* CAN1 wake up interrupt*/ + .long DefaultISR /* 116*/ + .long DefaultISR /* 117*/ + .long DefaultISR /* 118*/ + .long DefaultISR /* 119*/ + .long DefaultISR /* 120*/ + .long DefaultISR /* 121*/ + .long DefaultISR /* 122*/ + .long DefaultISR /* 123*/ + .long DefaultISR /* 124*/ + .long DefaultISR /* 125*/ + .long DefaultISR /* 126*/ + .long DefaultISR /* 127*/ + .long DefaultISR /* 128*/ + .long DefaultISR /* 129*/ + .long DefaultISR /* 130*/ + .long DefaultISR /* 131*/ + .long DefaultISR /* 132*/ + .long DefaultISR /* 133*/ + .long DefaultISR /* 134*/ + .long DefaultISR /* 135*/ + .long DefaultISR /* 136*/ + .long DefaultISR /* 137*/ + .long DefaultISR /* 138*/ + .long DefaultISR /* 139*/ + .long DefaultISR /* 140*/ + .long DefaultISR /* 141*/ + .long DefaultISR /* 142*/ + .long DefaultISR /* 143*/ + .long DefaultISR /* 144*/ + .long DefaultISR /* 145*/ + .long DefaultISR /* 146*/ + .long DefaultISR /* 147*/ + .long DefaultISR /* 148*/ + .long DefaultISR /* 149*/ + .long DefaultISR /* 150*/ + .long DefaultISR /* 151*/ + .long DefaultISR /* 152*/ + .long DefaultISR /* 153*/ + .long DefaultISR /* 154*/ + .long DefaultISR /* 155*/ + .long DefaultISR /* 156*/ + .long DefaultISR /* 157*/ + .long DefaultISR /* 158*/ + .long DefaultISR /* 159*/ + .long DefaultISR /* 160*/ + .long DefaultISR /* 161*/ + .long DefaultISR /* 162*/ + .long DefaultISR /* 163*/ + .long DefaultISR /* 164*/ + .long DefaultISR /* 165*/ + .long DefaultISR /* 166*/ + .long DefaultISR /* 167*/ + .long DefaultISR /* 168*/ + .long DefaultISR /* 169*/ + .long DefaultISR /* 170*/ + .long DefaultISR /* 171*/ + .long DefaultISR /* 172*/ + .long DefaultISR /* 173*/ + .long DefaultISR /* 174*/ + .long DefaultISR /* 175*/ + .long DefaultISR /* 176*/ + .long DefaultISR /* 177*/ + .long DefaultISR /* 178*/ + .long DefaultISR /* 179*/ + .long DefaultISR /* 180*/ + .long DefaultISR /* 181*/ + .long DefaultISR /* 182*/ + .long DefaultISR /* 183*/ + .long DefaultISR /* 184*/ + .long DefaultISR /* 185*/ + .long DefaultISR /* 186*/ + .long DefaultISR /* 187*/ + .long DefaultISR /* 188*/ + .long DefaultISR /* 189*/ + .long DefaultISR /* 190*/ + .long DefaultISR /* 191*/ + .long DefaultISR /* 192*/ + .long DefaultISR /* 193*/ + .long DefaultISR /* 194*/ + .long DefaultISR /* 195*/ + .long DefaultISR /* 196*/ + .long DefaultISR /* 197*/ + .long DefaultISR /* 198*/ + .long DefaultISR /* 199*/ + .long DefaultISR /* 200*/ + .long DefaultISR /* 201*/ + .long DefaultISR /* 202*/ + .long DefaultISR /* 203*/ + .long DefaultISR /* 204*/ + .long DefaultISR /* 205*/ + .long DefaultISR /* 206*/ + .long DefaultISR /* 207*/ + .long DefaultISR /* 208*/ + .long DefaultISR /* 209*/ + .long DefaultISR /* 210*/ + .long DefaultISR /* 211*/ + .long DefaultISR /* 212*/ + .long DefaultISR /* 213*/ + .long DefaultISR /* 214*/ + .long DefaultISR /* 215*/ + .long DefaultISR /* 216*/ + .long DefaultISR /* 217*/ + .long DefaultISR /* 218*/ + .long DefaultISR /* 219*/ + .long DefaultISR /* 220*/ + .long DefaultISR /* 221*/ + .long DefaultISR /* 222*/ + .long DefaultISR /* 223*/ + .long DefaultISR /* 224*/ + .long DefaultISR /* 225*/ + .long DefaultISR /* 226*/ + .long DefaultISR /* 227*/ + .long DefaultISR /* 228*/ + .long DefaultISR /* 229*/ + .long DefaultISR /* 230*/ + .long DefaultISR /* 231*/ + .long DefaultISR /* 232*/ + .long DefaultISR /* 233*/ + .long DefaultISR /* 234*/ + .long DefaultISR /* 235*/ + .long DefaultISR /* 236*/ + .long DefaultISR /* 237*/ + .long DefaultISR /* 238*/ + .long DefaultISR /* 239*/ + .long DefaultISR /* 240*/ + .long DefaultISR /* 241*/ + .long DefaultISR /* 242*/ + .long DefaultISR /* 243*/ + .long DefaultISR /* 244*/ + .long DefaultISR /* 245*/ + .long DefaultISR /* 246*/ + .long DefaultISR /* 247*/ + .long DefaultISR /* 248*/ + .long DefaultISR /* 249*/ + .long DefaultISR /* 250*/ + .long DefaultISR /* 251*/ + .long DefaultISR /* 252*/ + .long DefaultISR /* 253*/ + .long DefaultISR /* 254*/ + .long 0xFFFFFFFF /* Reserved for user TRIM value*/ + + .size __isr_vector, . - __isr_vector + +/* Flash Configuration */ + .section .FlashConfig, "a" + .long 0xFFFFFFFF + .long 0xFFFFFFFF + .long 0xFFFFFFFF + .long 0xFFFFFFFE + + .text + .thumb + +/* Reset Handler */ + + .thumb_func + .align 2 + .globl Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + cpsid i /* Mask interrupts */ + .equ VTOR, 0xE000ED08 + ldr r0, =VTOR + ldr r1, =__isr_vector + str r1, [r0] +#ifndef __NO_SYSTEM_INIT + ldr r0,=SystemInit + blx r0 +#endif +/* Loop to copy data from read only memory to RAM. The ranges + * of copy from/to are specified by following symbols evaluated in + * linker script. + * __etext: End of code section, i.e., begin of data sections to copy from. + * __data_start__/__data_end__: RAM address range that data should be + * copied to. Both must be aligned to 4 bytes boundary. */ + + ldr r1, =__etext + ldr r2, =__data_start__ + ldr r3, =__data_end__ + +#if 1 +/* Here are two copies of loop implemenations. First one favors code size + * and the second one favors performance. Default uses the first one. + * Change to "#if 0" to use the second one */ +.LC0: + cmp r2, r3 + ittt lt + ldrlt r0, [r1], #4 + strlt r0, [r2], #4 + blt .LC0 +#else + subs r3, r2 + ble .LC1 +.LC0: + subs r3, #4 + ldr r0, [r1, r3] + str r0, [r2, r3] + bgt .LC0 +.LC1: +#endif + +#ifdef __STARTUP_CLEAR_BSS +/* This part of work usually is done in C library startup code. Otherwise, + * define this macro to enable it in this startup. + * + * Loop to zero out BSS section, which uses following symbols + * in linker script: + * __bss_start__: start of BSS section. Must align to 4 + * __bss_end__: end of BSS section. Must align to 4 + */ + ldr r1, =__bss_start__ + ldr r2, =__bss_end__ + + movs r0, 0 +.LC2: + cmp r1, r2 + itt lt + strlt r0, [r1], #4 + blt .LC2 +#endif /* __STARTUP_CLEAR_BSS */ + + cpsie i /* Unmask interrupts */ +#ifndef __START +#define __START _start +#endif +#ifndef __ATOLLIC__ + ldr r0,=__START + blx r0 +#else + ldr r0,=__libc_init_array + blx r0 + ldr r0,=main + bx r0 +#endif + .pool + .size Reset_Handler, . - Reset_Handler + + .align 1 + .thumb_func + .weak DefaultISR + .type DefaultISR, %function +DefaultISR: + b DefaultISR + .size DefaultISR, . - DefaultISR + + .align 1 + .thumb_func + .weak NMI_Handler + .type NMI_Handler, %function +NMI_Handler: + ldr r0,=NMI_Handler + bx r0 + .size NMI_Handler, . - NMI_Handler + + .align 1 + .thumb_func + .weak HardFault_Handler + .type HardFault_Handler, %function +HardFault_Handler: + ldr r0,=HardFault_Handler + bx r0 + .size HardFault_Handler, . - HardFault_Handler + + .align 1 + .thumb_func + .weak SVC_Handler + .type SVC_Handler, %function +SVC_Handler: + ldr r0,=SVC_Handler + bx r0 + .size SVC_Handler, . - SVC_Handler + + .align 1 + .thumb_func + .weak PendSV_Handler + .type PendSV_Handler, %function +PendSV_Handler: + ldr r0,=PendSV_Handler + bx r0 + .size PendSV_Handler, . - PendSV_Handler + + .align 1 + .thumb_func + .weak SysTick_Handler + .type SysTick_Handler, %function +SysTick_Handler: + ldr r0,=SysTick_Handler + bx r0 + .size SysTick_Handler, . - SysTick_Handler + + .align 1 + .thumb_func + .weak DMA0_DMA16_IRQHandler + .type DMA0_DMA16_IRQHandler, %function +DMA0_DMA16_IRQHandler: + ldr r0,=DMA0_DMA16_DriverIRQHandler + bx r0 + .size DMA0_DMA16_IRQHandler, . - DMA0_DMA16_IRQHandler + + .align 1 + .thumb_func + .weak DMA1_DMA17_IRQHandler + .type DMA1_DMA17_IRQHandler, %function +DMA1_DMA17_IRQHandler: + ldr r0,=DMA1_DMA17_DriverIRQHandler + bx r0 + .size DMA1_DMA17_IRQHandler, . - DMA1_DMA17_IRQHandler + + .align 1 + .thumb_func + .weak DMA2_DMA18_IRQHandler + .type DMA2_DMA18_IRQHandler, %function +DMA2_DMA18_IRQHandler: + ldr r0,=DMA2_DMA18_DriverIRQHandler + bx r0 + .size DMA2_DMA18_IRQHandler, . - DMA2_DMA18_IRQHandler + + .align 1 + .thumb_func + .weak DMA3_DMA19_IRQHandler + .type DMA3_DMA19_IRQHandler, %function +DMA3_DMA19_IRQHandler: + ldr r0,=DMA3_DMA19_DriverIRQHandler + bx r0 + .size DMA3_DMA19_IRQHandler, . - DMA3_DMA19_IRQHandler + + .align 1 + .thumb_func + .weak DMA4_DMA20_IRQHandler + .type DMA4_DMA20_IRQHandler, %function +DMA4_DMA20_IRQHandler: + ldr r0,=DMA4_DMA20_DriverIRQHandler + bx r0 + .size DMA4_DMA20_IRQHandler, . - DMA4_DMA20_IRQHandler + + .align 1 + .thumb_func + .weak DMA5_DMA21_IRQHandler + .type DMA5_DMA21_IRQHandler, %function +DMA5_DMA21_IRQHandler: + ldr r0,=DMA5_DMA21_DriverIRQHandler + bx r0 + .size DMA5_DMA21_IRQHandler, . - DMA5_DMA21_IRQHandler + + .align 1 + .thumb_func + .weak DMA6_DMA22_IRQHandler + .type DMA6_DMA22_IRQHandler, %function +DMA6_DMA22_IRQHandler: + ldr r0,=DMA6_DMA22_DriverIRQHandler + bx r0 + .size DMA6_DMA22_IRQHandler, . - DMA6_DMA22_IRQHandler + + .align 1 + .thumb_func + .weak DMA7_DMA23_IRQHandler + .type DMA7_DMA23_IRQHandler, %function +DMA7_DMA23_IRQHandler: + ldr r0,=DMA7_DMA23_DriverIRQHandler + bx r0 + .size DMA7_DMA23_IRQHandler, . - DMA7_DMA23_IRQHandler + + .align 1 + .thumb_func + .weak DMA8_DMA24_IRQHandler + .type DMA8_DMA24_IRQHandler, %function +DMA8_DMA24_IRQHandler: + ldr r0,=DMA8_DMA24_DriverIRQHandler + bx r0 + .size DMA8_DMA24_IRQHandler, . - DMA8_DMA24_IRQHandler + + .align 1 + .thumb_func + .weak DMA9_DMA25_IRQHandler + .type DMA9_DMA25_IRQHandler, %function +DMA9_DMA25_IRQHandler: + ldr r0,=DMA9_DMA25_DriverIRQHandler + bx r0 + .size DMA9_DMA25_IRQHandler, . - DMA9_DMA25_IRQHandler + + .align 1 + .thumb_func + .weak DMA10_DMA26_IRQHandler + .type DMA10_DMA26_IRQHandler, %function +DMA10_DMA26_IRQHandler: + ldr r0,=DMA10_DMA26_DriverIRQHandler + bx r0 + .size DMA10_DMA26_IRQHandler, . - DMA10_DMA26_IRQHandler + + .align 1 + .thumb_func + .weak DMA11_DMA27_IRQHandler + .type DMA11_DMA27_IRQHandler, %function +DMA11_DMA27_IRQHandler: + ldr r0,=DMA11_DMA27_DriverIRQHandler + bx r0 + .size DMA11_DMA27_IRQHandler, . - DMA11_DMA27_IRQHandler + + .align 1 + .thumb_func + .weak DMA12_DMA28_IRQHandler + .type DMA12_DMA28_IRQHandler, %function +DMA12_DMA28_IRQHandler: + ldr r0,=DMA12_DMA28_DriverIRQHandler + bx r0 + .size DMA12_DMA28_IRQHandler, . - DMA12_DMA28_IRQHandler + + .align 1 + .thumb_func + .weak DMA13_DMA29_IRQHandler + .type DMA13_DMA29_IRQHandler, %function +DMA13_DMA29_IRQHandler: + ldr r0,=DMA13_DMA29_DriverIRQHandler + bx r0 + .size DMA13_DMA29_IRQHandler, . - DMA13_DMA29_IRQHandler + + .align 1 + .thumb_func + .weak DMA14_DMA30_IRQHandler + .type DMA14_DMA30_IRQHandler, %function +DMA14_DMA30_IRQHandler: + ldr r0,=DMA14_DMA30_DriverIRQHandler + bx r0 + .size DMA14_DMA30_IRQHandler, . - DMA14_DMA30_IRQHandler + + .align 1 + .thumb_func + .weak DMA15_DMA31_IRQHandler + .type DMA15_DMA31_IRQHandler, %function +DMA15_DMA31_IRQHandler: + ldr r0,=DMA15_DMA31_DriverIRQHandler + bx r0 + .size DMA15_DMA31_IRQHandler, . - DMA15_DMA31_IRQHandler + + .align 1 + .thumb_func + .weak DMA_Error_IRQHandler + .type DMA_Error_IRQHandler, %function +DMA_Error_IRQHandler: + ldr r0,=DMA_Error_DriverIRQHandler + bx r0 + .size DMA_Error_IRQHandler, . - DMA_Error_IRQHandler + + .align 1 + .thumb_func + .weak I2C0_IRQHandler + .type I2C0_IRQHandler, %function +I2C0_IRQHandler: + ldr r0,=I2C0_DriverIRQHandler + bx r0 + .size I2C0_IRQHandler, . - I2C0_IRQHandler + + .align 1 + .thumb_func + .weak I2C1_IRQHandler + .type I2C1_IRQHandler, %function +I2C1_IRQHandler: + ldr r0,=I2C1_DriverIRQHandler + bx r0 + .size I2C1_IRQHandler, . - I2C1_IRQHandler + + .align 1 + .thumb_func + .weak SPI0_IRQHandler + .type SPI0_IRQHandler, %function +SPI0_IRQHandler: + ldr r0,=SPI0_DriverIRQHandler + bx r0 + .size SPI0_IRQHandler, . - SPI0_IRQHandler + + .align 1 + .thumb_func + .weak SPI1_IRQHandler + .type SPI1_IRQHandler, %function +SPI1_IRQHandler: + ldr r0,=SPI1_DriverIRQHandler + bx r0 + .size SPI1_IRQHandler, . - SPI1_IRQHandler + + .align 1 + .thumb_func + .weak I2S0_Tx_IRQHandler + .type I2S0_Tx_IRQHandler, %function +I2S0_Tx_IRQHandler: + ldr r0,=I2S0_Tx_DriverIRQHandler + bx r0 + .size I2S0_Tx_IRQHandler, . - I2S0_Tx_IRQHandler + + .align 1 + .thumb_func + .weak I2S0_Rx_IRQHandler + .type I2S0_Rx_IRQHandler, %function +I2S0_Rx_IRQHandler: + ldr r0,=I2S0_Rx_DriverIRQHandler + bx r0 + .size I2S0_Rx_IRQHandler, . - I2S0_Rx_IRQHandler + + .align 1 + .thumb_func + .weak UART0_RX_TX_IRQHandler + .type UART0_RX_TX_IRQHandler, %function +UART0_RX_TX_IRQHandler: + ldr r0,=UART0_RX_TX_DriverIRQHandler + bx r0 + .size UART0_RX_TX_IRQHandler, . - UART0_RX_TX_IRQHandler + + .align 1 + .thumb_func + .weak UART0_ERR_IRQHandler + .type UART0_ERR_IRQHandler, %function +UART0_ERR_IRQHandler: + ldr r0,=UART0_ERR_DriverIRQHandler + bx r0 + .size UART0_ERR_IRQHandler, . - UART0_ERR_IRQHandler + + .align 1 + .thumb_func + .weak UART1_RX_TX_IRQHandler + .type UART1_RX_TX_IRQHandler, %function +UART1_RX_TX_IRQHandler: + ldr r0,=UART1_RX_TX_DriverIRQHandler + bx r0 + .size UART1_RX_TX_IRQHandler, . - UART1_RX_TX_IRQHandler + + .align 1 + .thumb_func + .weak UART1_ERR_IRQHandler + .type UART1_ERR_IRQHandler, %function +UART1_ERR_IRQHandler: + ldr r0,=UART1_ERR_DriverIRQHandler + bx r0 + .size UART1_ERR_IRQHandler, . - UART1_ERR_IRQHandler + + .align 1 + .thumb_func + .weak UART2_RX_TX_IRQHandler + .type UART2_RX_TX_IRQHandler, %function +UART2_RX_TX_IRQHandler: + ldr r0,=UART2_RX_TX_DriverIRQHandler + bx r0 + .size UART2_RX_TX_IRQHandler, . - UART2_RX_TX_IRQHandler + + .align 1 + .thumb_func + .weak UART2_ERR_IRQHandler + .type UART2_ERR_IRQHandler, %function +UART2_ERR_IRQHandler: + ldr r0,=UART2_ERR_DriverIRQHandler + bx r0 + .size UART2_ERR_IRQHandler, . - UART2_ERR_IRQHandler + + .align 1 + .thumb_func + .weak UART3_RX_TX_IRQHandler + .type UART3_RX_TX_IRQHandler, %function +UART3_RX_TX_IRQHandler: + ldr r0,=UART3_RX_TX_DriverIRQHandler + bx r0 + .size UART3_RX_TX_IRQHandler, . - UART3_RX_TX_IRQHandler + + .align 1 + .thumb_func + .weak UART3_ERR_IRQHandler + .type UART3_ERR_IRQHandler, %function +UART3_ERR_IRQHandler: + ldr r0,=UART3_ERR_DriverIRQHandler + bx r0 + .size UART3_ERR_IRQHandler, . - UART3_ERR_IRQHandler + + .align 1 + .thumb_func + .weak SPI2_IRQHandler + .type SPI2_IRQHandler, %function +SPI2_IRQHandler: + ldr r0,=SPI2_DriverIRQHandler + bx r0 + .size SPI2_IRQHandler, . - SPI2_IRQHandler + + .align 1 + .thumb_func + .weak UART4_RX_TX_IRQHandler + .type UART4_RX_TX_IRQHandler, %function +UART4_RX_TX_IRQHandler: + ldr r0,=UART4_RX_TX_DriverIRQHandler + bx r0 + .size UART4_RX_TX_IRQHandler, . - UART4_RX_TX_IRQHandler + + .align 1 + .thumb_func + .weak UART4_ERR_IRQHandler + .type UART4_ERR_IRQHandler, %function +UART4_ERR_IRQHandler: + ldr r0,=UART4_ERR_DriverIRQHandler + bx r0 + .size UART4_ERR_IRQHandler, . - UART4_ERR_IRQHandler + + .align 1 + .thumb_func + .weak I2C2_IRQHandler + .type I2C2_IRQHandler, %function +I2C2_IRQHandler: + ldr r0,=I2C2_DriverIRQHandler + bx r0 + .size I2C2_IRQHandler, . - I2C2_IRQHandler + + .align 1 + .thumb_func + .weak CAN0_ORed_Message_buffer_IRQHandler + .type CAN0_ORed_Message_buffer_IRQHandler, %function +CAN0_ORed_Message_buffer_IRQHandler: + ldr r0,=CAN0_DriverIRQHandler + bx r0 + .size CAN0_ORed_Message_buffer_IRQHandler, . - CAN0_ORed_Message_buffer_IRQHandler + + .align 1 + .thumb_func + .weak CAN0_Bus_Off_IRQHandler + .type CAN0_Bus_Off_IRQHandler, %function +CAN0_Bus_Off_IRQHandler: + ldr r0,=CAN0_DriverIRQHandler + bx r0 + .size CAN0_Bus_Off_IRQHandler, . - CAN0_Bus_Off_IRQHandler + + .align 1 + .thumb_func + .weak CAN0_Error_IRQHandler + .type CAN0_Error_IRQHandler, %function +CAN0_Error_IRQHandler: + ldr r0,=CAN0_DriverIRQHandler + bx r0 + .size CAN0_Error_IRQHandler, . - CAN0_Error_IRQHandler + + .align 1 + .thumb_func + .weak CAN0_Tx_Warning_IRQHandler + .type CAN0_Tx_Warning_IRQHandler, %function +CAN0_Tx_Warning_IRQHandler: + ldr r0,=CAN0_DriverIRQHandler + bx r0 + .size CAN0_Tx_Warning_IRQHandler, . - CAN0_Tx_Warning_IRQHandler + + .align 1 + .thumb_func + .weak CAN0_Rx_Warning_IRQHandler + .type CAN0_Rx_Warning_IRQHandler, %function +CAN0_Rx_Warning_IRQHandler: + ldr r0,=CAN0_DriverIRQHandler + bx r0 + .size CAN0_Rx_Warning_IRQHandler, . - CAN0_Rx_Warning_IRQHandler + + .align 1 + .thumb_func + .weak CAN0_Wake_Up_IRQHandler + .type CAN0_Wake_Up_IRQHandler, %function +CAN0_Wake_Up_IRQHandler: + ldr r0,=CAN0_DriverIRQHandler + bx r0 + .size CAN0_Wake_Up_IRQHandler, . - CAN0_Wake_Up_IRQHandler + + .align 1 + .thumb_func + .weak SDHC_IRQHandler + .type SDHC_IRQHandler, %function +SDHC_IRQHandler: + ldr r0,=SDHC_DriverIRQHandler + bx r0 + .size SDHC_IRQHandler, . - SDHC_IRQHandler + + .align 1 + .thumb_func + .weak ENET_1588_Timer_IRQHandler + .type ENET_1588_Timer_IRQHandler, %function +ENET_1588_Timer_IRQHandler: + ldr r0,=ENET_1588_Timer_DriverIRQHandler + bx r0 + .size ENET_1588_Timer_IRQHandler, . - ENET_1588_Timer_IRQHandler + + .align 1 + .thumb_func + .weak ENET_Transmit_IRQHandler + .type ENET_Transmit_IRQHandler, %function +ENET_Transmit_IRQHandler: + ldr r0,=ENET_Transmit_DriverIRQHandler + bx r0 + .size ENET_Transmit_IRQHandler, . - ENET_Transmit_IRQHandler + + .align 1 + .thumb_func + .weak ENET_Receive_IRQHandler + .type ENET_Receive_IRQHandler, %function +ENET_Receive_IRQHandler: + ldr r0,=ENET_Receive_DriverIRQHandler + bx r0 + .size ENET_Receive_IRQHandler, . - ENET_Receive_IRQHandler + + .align 1 + .thumb_func + .weak ENET_Error_IRQHandler + .type ENET_Error_IRQHandler, %function +ENET_Error_IRQHandler: + ldr r0,=ENET_Error_DriverIRQHandler + bx r0 + .size ENET_Error_IRQHandler, . - ENET_Error_IRQHandler + + .align 1 + .thumb_func + .weak LPUART0_IRQHandler + .type LPUART0_IRQHandler, %function +LPUART0_IRQHandler: + ldr r0,=LPUART0_DriverIRQHandler + bx r0 + .size LPUART0_IRQHandler, . - LPUART0_IRQHandler + + .align 1 + .thumb_func + .weak I2C3_IRQHandler + .type I2C3_IRQHandler, %function +I2C3_IRQHandler: + ldr r0,=I2C3_DriverIRQHandler + bx r0 + .size I2C3_IRQHandler, . - I2C3_IRQHandler + + .align 1 + .thumb_func + .weak CAN1_ORed_Message_buffer_IRQHandler + .type CAN1_ORed_Message_buffer_IRQHandler, %function +CAN1_ORed_Message_buffer_IRQHandler: + ldr r0,=CAN1_DriverIRQHandler + bx r0 + .size CAN1_ORed_Message_buffer_IRQHandler, . - CAN1_ORed_Message_buffer_IRQHandler + + .align 1 + .thumb_func + .weak CAN1_Bus_Off_IRQHandler + .type CAN1_Bus_Off_IRQHandler, %function +CAN1_Bus_Off_IRQHandler: + ldr r0,=CAN1_DriverIRQHandler + bx r0 + .size CAN1_Bus_Off_IRQHandler, . - CAN1_Bus_Off_IRQHandler + + .align 1 + .thumb_func + .weak CAN1_Error_IRQHandler + .type CAN1_Error_IRQHandler, %function +CAN1_Error_IRQHandler: + ldr r0,=CAN1_DriverIRQHandler + bx r0 + .size CAN1_Error_IRQHandler, . - CAN1_Error_IRQHandler + + .align 1 + .thumb_func + .weak CAN1_Tx_Warning_IRQHandler + .type CAN1_Tx_Warning_IRQHandler, %function +CAN1_Tx_Warning_IRQHandler: + ldr r0,=CAN1_DriverIRQHandler + bx r0 + .size CAN1_Tx_Warning_IRQHandler, . - CAN1_Tx_Warning_IRQHandler + + .align 1 + .thumb_func + .weak CAN1_Rx_Warning_IRQHandler + .type CAN1_Rx_Warning_IRQHandler, %function +CAN1_Rx_Warning_IRQHandler: + ldr r0,=CAN1_DriverIRQHandler + bx r0 + .size CAN1_Rx_Warning_IRQHandler, . - CAN1_Rx_Warning_IRQHandler + + .align 1 + .thumb_func + .weak CAN1_Wake_Up_IRQHandler + .type CAN1_Wake_Up_IRQHandler, %function +CAN1_Wake_Up_IRQHandler: + ldr r0,=CAN1_DriverIRQHandler + bx r0 + .size CAN1_Wake_Up_IRQHandler, . - CAN1_Wake_Up_IRQHandler + + +/* Macro to define default handlers. Default handler + * will be weak symbol and just dead loops. They can be + * overwritten by other handlers */ + .macro def_irq_handler handler_name + .weak \handler_name + .set \handler_name, DefaultISR + .endm + +/* Exception Handlers */ + def_irq_handler MemManage_Handler + def_irq_handler BusFault_Handler + def_irq_handler UsageFault_Handler + def_irq_handler DebugMon_Handler + def_irq_handler DMA0_DMA16_DriverIRQHandler + def_irq_handler DMA1_DMA17_DriverIRQHandler + def_irq_handler DMA2_DMA18_DriverIRQHandler + def_irq_handler DMA3_DMA19_DriverIRQHandler + def_irq_handler DMA4_DMA20_DriverIRQHandler + def_irq_handler DMA5_DMA21_DriverIRQHandler + def_irq_handler DMA6_DMA22_DriverIRQHandler + def_irq_handler DMA7_DMA23_DriverIRQHandler + def_irq_handler DMA8_DMA24_DriverIRQHandler + def_irq_handler DMA9_DMA25_DriverIRQHandler + def_irq_handler DMA10_DMA26_DriverIRQHandler + def_irq_handler DMA11_DMA27_DriverIRQHandler + def_irq_handler DMA12_DMA28_DriverIRQHandler + def_irq_handler DMA13_DMA29_DriverIRQHandler + def_irq_handler DMA14_DMA30_DriverIRQHandler + def_irq_handler DMA15_DMA31_DriverIRQHandler + def_irq_handler DMA_Error_DriverIRQHandler + def_irq_handler MCM_IRQHandler + def_irq_handler FTFE_IRQHandler + def_irq_handler Read_Collision_IRQHandler + def_irq_handler LVD_LVW_IRQHandler + def_irq_handler LLWU_IRQHandler + def_irq_handler WDOG_EWM_IRQHandler + def_irq_handler RNG_IRQHandler + def_irq_handler I2C0_DriverIRQHandler + def_irq_handler I2C1_DriverIRQHandler + def_irq_handler SPI0_DriverIRQHandler + def_irq_handler SPI1_DriverIRQHandler + def_irq_handler I2S0_Tx_DriverIRQHandler + def_irq_handler I2S0_Rx_DriverIRQHandler + def_irq_handler Reserved46_IRQHandler + def_irq_handler UART0_RX_TX_DriverIRQHandler + def_irq_handler UART0_ERR_DriverIRQHandler + def_irq_handler UART1_RX_TX_DriverIRQHandler + def_irq_handler UART1_ERR_DriverIRQHandler + def_irq_handler UART2_RX_TX_DriverIRQHandler + def_irq_handler UART2_ERR_DriverIRQHandler + def_irq_handler UART3_RX_TX_DriverIRQHandler + def_irq_handler UART3_ERR_DriverIRQHandler + def_irq_handler ADC0_IRQHandler + def_irq_handler CMP0_IRQHandler + def_irq_handler CMP1_IRQHandler + def_irq_handler FTM0_IRQHandler + def_irq_handler FTM1_IRQHandler + def_irq_handler FTM2_IRQHandler + def_irq_handler CMT_IRQHandler + def_irq_handler RTC_IRQHandler + def_irq_handler RTC_Seconds_IRQHandler + def_irq_handler PIT0_IRQHandler + def_irq_handler PIT1_IRQHandler + def_irq_handler PIT2_IRQHandler + def_irq_handler PIT3_IRQHandler + def_irq_handler PDB0_IRQHandler + def_irq_handler USB0_IRQHandler + def_irq_handler USBDCD_IRQHandler + def_irq_handler Reserved71_IRQHandler + def_irq_handler DAC0_IRQHandler + def_irq_handler MCG_IRQHandler + def_irq_handler LPTMR0_IRQHandler + def_irq_handler PORTA_IRQHandler + def_irq_handler PORTB_IRQHandler + def_irq_handler PORTC_IRQHandler + def_irq_handler PORTD_IRQHandler + def_irq_handler PORTE_IRQHandler + def_irq_handler SWI_IRQHandler + def_irq_handler SPI2_DriverIRQHandler + def_irq_handler UART4_RX_TX_DriverIRQHandler + def_irq_handler UART4_ERR_DriverIRQHandler + def_irq_handler Reserved84_IRQHandler + def_irq_handler Reserved85_IRQHandler + def_irq_handler CMP2_IRQHandler + def_irq_handler FTM3_IRQHandler + def_irq_handler DAC1_IRQHandler + def_irq_handler ADC1_IRQHandler + def_irq_handler I2C2_DriverIRQHandler + def_irq_handler CAN0_DriverIRQHandler + def_irq_handler SDHC_DriverIRQHandler + def_irq_handler ENET_1588_Timer_DriverIRQHandler + def_irq_handler ENET_Transmit_DriverIRQHandler + def_irq_handler ENET_Receive_DriverIRQHandler + def_irq_handler ENET_Error_DriverIRQHandler + def_irq_handler LPUART0_DriverIRQHandler + def_irq_handler TSI0_IRQHandler + def_irq_handler TPM1_IRQHandler + def_irq_handler TPM2_IRQHandler + def_irq_handler USBHSDCD_IRQHandler + def_irq_handler I2C3_DriverIRQHandler + def_irq_handler CMP3_IRQHandler + def_irq_handler USBHS_IRQHandler + def_irq_handler CAN1_DriverIRQHandler + + .end