Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_dac.c@50:a417edff4437, 2016-01-15 (annotated)

Committer:
mbed_official
Date:
Fri Jan 15 07:45:16 2016 +0000
Revision:
50:a417edff4437
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 6010f32619bfcbb01cc73747d4ff9040863482d9



Full URL: https://github.com/mbedmicro/mbed/commit/6010f32619bfcbb01cc73747d4ff9040863482d9/



Remove doubling of buffer size in realiseEndpoint()

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 2 * @file em_dac.c
bogdanm 0:9b334a45a8ff 3 * @brief Digital to Analog Coversion (DAC) Peripheral API
mbed_official 50:a417edff4437 4 * @version 4.2.1
bogdanm 0:9b334a45a8ff 5 *******************************************************************************
bogdanm 0:9b334a45a8ff 6 * @section License
mbed_official 50:a417edff4437 7 * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b>
bogdanm 0:9b334a45a8ff 8 *******************************************************************************
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Permission is granted to anyone to use this software for any purpose,
bogdanm 0:9b334a45a8ff 11 * including commercial applications, and to alter it and redistribute it
bogdanm 0:9b334a45a8ff 12 * freely, subject to the following restrictions:
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * 1. The origin of this software must not be misrepresented; you must not
bogdanm 0:9b334a45a8ff 15 * claim that you wrote the original software.
bogdanm 0:9b334a45a8ff 16 * 2. Altered source versions must be plainly marked as such, and must not be
bogdanm 0:9b334a45a8ff 17 * misrepresented as being the original software.
bogdanm 0:9b334a45a8ff 18 * 3. This notice may not be removed or altered from any source distribution.
bogdanm 0:9b334a45a8ff 19 *
bogdanm 0:9b334a45a8ff 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
bogdanm 0:9b334a45a8ff 21 * obligation to support this Software. Silicon Labs is providing the
bogdanm 0:9b334a45a8ff 22 * Software "AS IS", with no express or implied warranties of any kind,
bogdanm 0:9b334a45a8ff 23 * including, but not limited to, any implied warranties of merchantability
bogdanm 0:9b334a45a8ff 24 * or fitness for any particular purpose or warranties against infringement
bogdanm 0:9b334a45a8ff 25 * of any proprietary rights of a third party.
bogdanm 0:9b334a45a8ff 26 *
bogdanm 0:9b334a45a8ff 27 * Silicon Labs will not be liable for any consequential, incidental, or
bogdanm 0:9b334a45a8ff 28 * special damages, or any other relief, or for any claim by any third party,
bogdanm 0:9b334a45a8ff 29 * arising from your use of this Software.
bogdanm 0:9b334a45a8ff 30 *
bogdanm 0:9b334a45a8ff 31 ******************************************************************************/
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 #include "em_dac.h"
bogdanm 0:9b334a45a8ff 34 #if defined(DAC_COUNT) && (DAC_COUNT > 0)
bogdanm 0:9b334a45a8ff 35 #include "em_cmu.h"
bogdanm 0:9b334a45a8ff 36 #include "em_assert.h"
mbed_official 50:a417edff4437 37 #include "em_bus.h"
bogdanm 0:9b334a45a8ff 38
bogdanm 0:9b334a45a8ff 39 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 40 * @addtogroup EM_Library
bogdanm 0:9b334a45a8ff 41 * @{
bogdanm 0:9b334a45a8ff 42 ******************************************************************************/
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 45 * @addtogroup DAC
bogdanm 0:9b334a45a8ff 46 * @brief Digital to Analog Coversion (DAC) Peripheral API
bogdanm 0:9b334a45a8ff 47 * @{
bogdanm 0:9b334a45a8ff 48 ******************************************************************************/
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /*******************************************************************************
bogdanm 0:9b334a45a8ff 51 ******************************* DEFINES ***********************************
bogdanm 0:9b334a45a8ff 52 ******************************************************************************/
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 /** Validation of DAC channel for assert statements. */
bogdanm 0:9b334a45a8ff 57 #define DAC_CH_VALID(ch) ((ch) <= 1)
bogdanm 0:9b334a45a8ff 58
bogdanm 0:9b334a45a8ff 59 /** Max DAC clock */
bogdanm 0:9b334a45a8ff 60 #define DAC_MAX_CLOCK 1000000
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 /** @endcond */
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 /*******************************************************************************
bogdanm 0:9b334a45a8ff 65 ************************** GLOBAL FUNCTIONS *******************************
bogdanm 0:9b334a45a8ff 66 ******************************************************************************/
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 69 * @brief
bogdanm 0:9b334a45a8ff 70 * Enable/disable DAC channel.
bogdanm 0:9b334a45a8ff 71 *
bogdanm 0:9b334a45a8ff 72 * @param[in] dac
bogdanm 0:9b334a45a8ff 73 * Pointer to DAC peripheral register block.
bogdanm 0:9b334a45a8ff 74 *
bogdanm 0:9b334a45a8ff 75 * @param[in] ch
bogdanm 0:9b334a45a8ff 76 * Channel to enable/disable.
bogdanm 0:9b334a45a8ff 77 *
bogdanm 0:9b334a45a8ff 78 * @param[in] enable
bogdanm 0:9b334a45a8ff 79 * true to enable DAC channel, false to disable.
bogdanm 0:9b334a45a8ff 80 ******************************************************************************/
bogdanm 0:9b334a45a8ff 81 void DAC_Enable(DAC_TypeDef *dac, unsigned int ch, bool enable)
bogdanm 0:9b334a45a8ff 82 {
bogdanm 0:9b334a45a8ff 83 volatile uint32_t *reg;
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 EFM_ASSERT(DAC_REF_VALID(dac));
bogdanm 0:9b334a45a8ff 86 EFM_ASSERT(DAC_CH_VALID(ch));
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 if (!ch)
bogdanm 0:9b334a45a8ff 89 {
bogdanm 0:9b334a45a8ff 90 reg = &(dac->CH0CTRL);
bogdanm 0:9b334a45a8ff 91 }
bogdanm 0:9b334a45a8ff 92 else
bogdanm 0:9b334a45a8ff 93 {
bogdanm 0:9b334a45a8ff 94 reg = &(dac->CH1CTRL);
bogdanm 0:9b334a45a8ff 95 }
bogdanm 0:9b334a45a8ff 96
mbed_official 50:a417edff4437 97 BUS_RegBitWrite(reg, _DAC_CH0CTRL_EN_SHIFT, enable);
bogdanm 0:9b334a45a8ff 98 }
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 102 * @brief
bogdanm 0:9b334a45a8ff 103 * Initialize DAC.
bogdanm 0:9b334a45a8ff 104 *
bogdanm 0:9b334a45a8ff 105 * @details
bogdanm 0:9b334a45a8ff 106 * Initializes common parts for both channels. In addition, channel control
bogdanm 0:9b334a45a8ff 107 * configuration must be done, please refer to DAC_InitChannel().
bogdanm 0:9b334a45a8ff 108 *
bogdanm 0:9b334a45a8ff 109 * @note
bogdanm 0:9b334a45a8ff 110 * This function will disable both channels prior to configuration.
bogdanm 0:9b334a45a8ff 111 *
bogdanm 0:9b334a45a8ff 112 * @param[in] dac
bogdanm 0:9b334a45a8ff 113 * Pointer to DAC peripheral register block.
bogdanm 0:9b334a45a8ff 114 *
bogdanm 0:9b334a45a8ff 115 * @param[in] init
bogdanm 0:9b334a45a8ff 116 * Pointer to DAC initialization structure.
bogdanm 0:9b334a45a8ff 117 ******************************************************************************/
bogdanm 0:9b334a45a8ff 118 void DAC_Init(DAC_TypeDef *dac, const DAC_Init_TypeDef *init)
bogdanm 0:9b334a45a8ff 119 {
bogdanm 0:9b334a45a8ff 120 uint32_t tmp;
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 EFM_ASSERT(DAC_REF_VALID(dac));
bogdanm 0:9b334a45a8ff 123
bogdanm 0:9b334a45a8ff 124 /* Make sure both channels are disabled. */
mbed_official 50:a417edff4437 125 BUS_RegBitWrite(&(dac->CH0CTRL), _DAC_CH0CTRL_EN_SHIFT, 0);
mbed_official 50:a417edff4437 126 BUS_RegBitWrite(&(dac->CH1CTRL), _DAC_CH0CTRL_EN_SHIFT, 0);
bogdanm 0:9b334a45a8ff 127
bogdanm 0:9b334a45a8ff 128 /* Load proper calibration data depending on selected reference */
bogdanm 0:9b334a45a8ff 129 switch (init->reference)
bogdanm 0:9b334a45a8ff 130 {
mbed_official 50:a417edff4437 131 case dacRef2V5:
mbed_official 50:a417edff4437 132 dac->CAL = DEVINFO->DAC0CAL1;
mbed_official 50:a417edff4437 133 break;
bogdanm 0:9b334a45a8ff 134
mbed_official 50:a417edff4437 135 case dacRefVDD:
mbed_official 50:a417edff4437 136 dac->CAL = DEVINFO->DAC0CAL2;
mbed_official 50:a417edff4437 137 break;
bogdanm 0:9b334a45a8ff 138
mbed_official 50:a417edff4437 139 default: /* 1.25V */
mbed_official 50:a417edff4437 140 dac->CAL = DEVINFO->DAC0CAL0;
mbed_official 50:a417edff4437 141 break;
bogdanm 0:9b334a45a8ff 142 }
bogdanm 0:9b334a45a8ff 143
mbed_official 50:a417edff4437 144 tmp = ((uint32_t)(init->refresh) << _DAC_CTRL_REFRSEL_SHIFT)
mbed_official 50:a417edff4437 145 | (((uint32_t)(init->prescale) << _DAC_CTRL_PRESC_SHIFT)
mbed_official 50:a417edff4437 146 & _DAC_CTRL_PRESC_MASK)
mbed_official 50:a417edff4437 147 | ((uint32_t)(init->reference) << _DAC_CTRL_REFSEL_SHIFT)
mbed_official 50:a417edff4437 148 | ((uint32_t)(init->outMode) << _DAC_CTRL_OUTMODE_SHIFT)
mbed_official 50:a417edff4437 149 | ((uint32_t)(init->convMode) << _DAC_CTRL_CONVMODE_SHIFT);
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 if (init->ch0ResetPre)
bogdanm 0:9b334a45a8ff 152 {
bogdanm 0:9b334a45a8ff 153 tmp |= DAC_CTRL_CH0PRESCRST;
bogdanm 0:9b334a45a8ff 154 }
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 if (init->outEnablePRS)
bogdanm 0:9b334a45a8ff 157 {
bogdanm 0:9b334a45a8ff 158 tmp |= DAC_CTRL_OUTENPRS;
bogdanm 0:9b334a45a8ff 159 }
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 if (init->sineEnable)
bogdanm 0:9b334a45a8ff 162 {
bogdanm 0:9b334a45a8ff 163 tmp |= DAC_CTRL_SINEMODE;
bogdanm 0:9b334a45a8ff 164 }
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 if (init->diff)
bogdanm 0:9b334a45a8ff 167 {
bogdanm 0:9b334a45a8ff 168 tmp |= DAC_CTRL_DIFF;
bogdanm 0:9b334a45a8ff 169 }
bogdanm 0:9b334a45a8ff 170
bogdanm 0:9b334a45a8ff 171 dac->CTRL = tmp;
bogdanm 0:9b334a45a8ff 172 }
bogdanm 0:9b334a45a8ff 173
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 176 * @brief
bogdanm 0:9b334a45a8ff 177 * Initialize DAC channel.
bogdanm 0:9b334a45a8ff 178 *
bogdanm 0:9b334a45a8ff 179 * @param[in] dac
bogdanm 0:9b334a45a8ff 180 * Pointer to DAC peripheral register block.
bogdanm 0:9b334a45a8ff 181 *
bogdanm 0:9b334a45a8ff 182 * @param[in] init
bogdanm 0:9b334a45a8ff 183 * Pointer to DAC initialization structure.
bogdanm 0:9b334a45a8ff 184 *
bogdanm 0:9b334a45a8ff 185 * @param[in] ch
bogdanm 0:9b334a45a8ff 186 * Channel number to initialize.
bogdanm 0:9b334a45a8ff 187 ******************************************************************************/
bogdanm 0:9b334a45a8ff 188 void DAC_InitChannel(DAC_TypeDef *dac,
bogdanm 0:9b334a45a8ff 189 const DAC_InitChannel_TypeDef *init,
bogdanm 0:9b334a45a8ff 190 unsigned int ch)
bogdanm 0:9b334a45a8ff 191 {
bogdanm 0:9b334a45a8ff 192 uint32_t tmp;
bogdanm 0:9b334a45a8ff 193
bogdanm 0:9b334a45a8ff 194 EFM_ASSERT(DAC_REF_VALID(dac));
bogdanm 0:9b334a45a8ff 195 EFM_ASSERT(DAC_CH_VALID(ch));
bogdanm 0:9b334a45a8ff 196
bogdanm 0:9b334a45a8ff 197 tmp = (uint32_t)(init->prsSel) << _DAC_CH0CTRL_PRSSEL_SHIFT;
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 if (init->enable)
bogdanm 0:9b334a45a8ff 200 {
bogdanm 0:9b334a45a8ff 201 tmp |= DAC_CH0CTRL_EN;
bogdanm 0:9b334a45a8ff 202 }
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 if (init->prsEnable)
bogdanm 0:9b334a45a8ff 205 {
bogdanm 0:9b334a45a8ff 206 tmp |= DAC_CH0CTRL_PRSEN;
bogdanm 0:9b334a45a8ff 207 }
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 if (init->refreshEnable)
bogdanm 0:9b334a45a8ff 210 {
bogdanm 0:9b334a45a8ff 211 tmp |= DAC_CH0CTRL_REFREN;
bogdanm 0:9b334a45a8ff 212 }
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 if (ch)
bogdanm 0:9b334a45a8ff 215 {
bogdanm 0:9b334a45a8ff 216 dac->CH1CTRL = tmp;
bogdanm 0:9b334a45a8ff 217 }
bogdanm 0:9b334a45a8ff 218 else
bogdanm 0:9b334a45a8ff 219 {
bogdanm 0:9b334a45a8ff 220 dac->CH0CTRL = tmp;
bogdanm 0:9b334a45a8ff 221 }
bogdanm 0:9b334a45a8ff 222 }
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 226 * @brief
bogdanm 0:9b334a45a8ff 227 * Set the output signal of a DAC channel to a given value.
bogdanm 0:9b334a45a8ff 228 *
bogdanm 0:9b334a45a8ff 229 * @details
bogdanm 0:9b334a45a8ff 230 * This function sets the output signal of a DAC channel by writing @p value
bogdanm 0:9b334a45a8ff 231 * to the corresponding CHnDATA register.
bogdanm 0:9b334a45a8ff 232 *
bogdanm 0:9b334a45a8ff 233 * @param[in] dac
bogdanm 0:9b334a45a8ff 234 * Pointer to DAC peripheral register block.
bogdanm 0:9b334a45a8ff 235 *
bogdanm 0:9b334a45a8ff 236 * @param[in] channel
bogdanm 0:9b334a45a8ff 237 * Channel number to set output of.
bogdanm 0:9b334a45a8ff 238 *
bogdanm 0:9b334a45a8ff 239 * @param[in] value
bogdanm 0:9b334a45a8ff 240 * Value to write to the channel output register CHnDATA.
bogdanm 0:9b334a45a8ff 241 ******************************************************************************/
bogdanm 0:9b334a45a8ff 242 void DAC_ChannelOutputSet( DAC_TypeDef *dac,
bogdanm 0:9b334a45a8ff 243 unsigned int channel,
bogdanm 0:9b334a45a8ff 244 uint32_t value )
bogdanm 0:9b334a45a8ff 245 {
bogdanm 0:9b334a45a8ff 246 switch(channel)
bogdanm 0:9b334a45a8ff 247 {
mbed_official 50:a417edff4437 248 case 0:
mbed_official 50:a417edff4437 249 DAC_Channel0OutputSet(dac, value);
mbed_official 50:a417edff4437 250 break;
mbed_official 50:a417edff4437 251 case 1:
mbed_official 50:a417edff4437 252 DAC_Channel1OutputSet(dac, value);
mbed_official 50:a417edff4437 253 break;
mbed_official 50:a417edff4437 254 default:
mbed_official 50:a417edff4437 255 EFM_ASSERT(0);
mbed_official 50:a417edff4437 256 break;
bogdanm 0:9b334a45a8ff 257 }
bogdanm 0:9b334a45a8ff 258 }
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 262 * @brief
bogdanm 0:9b334a45a8ff 263 * Calculate prescaler value used to determine DAC clock.
bogdanm 0:9b334a45a8ff 264 *
bogdanm 0:9b334a45a8ff 265 * @details
bogdanm 0:9b334a45a8ff 266 * The DAC clock is given by: HFPERCLK / (prescale ^ 2). If the requested
bogdanm 0:9b334a45a8ff 267 * DAC frequency is low and the max prescaler value can not adjust the
bogdanm 0:9b334a45a8ff 268 * actual DAC frequency lower than the requested DAC frequency, then the
bogdanm 0:9b334a45a8ff 269 * max prescaler value is returned, resulting in a higher DAC frequency
bogdanm 0:9b334a45a8ff 270 * than requested.
bogdanm 0:9b334a45a8ff 271 *
bogdanm 0:9b334a45a8ff 272 * @param[in] dacFreq DAC frequency wanted. The frequency will automatically
bogdanm 0:9b334a45a8ff 273 * be adjusted to be below max allowed DAC clock.
bogdanm 0:9b334a45a8ff 274 *
bogdanm 0:9b334a45a8ff 275 * @param[in] hfperFreq Frequency in Hz of reference HFPER clock. Set to 0 to
bogdanm 0:9b334a45a8ff 276 * use currently defined HFPER clock setting.
bogdanm 0:9b334a45a8ff 277 *
bogdanm 0:9b334a45a8ff 278 * @return
bogdanm 0:9b334a45a8ff 279 * Prescaler value to use for DAC in order to achieve a clock value
bogdanm 0:9b334a45a8ff 280 * <= @p dacFreq.
bogdanm 0:9b334a45a8ff 281 ******************************************************************************/
bogdanm 0:9b334a45a8ff 282 uint8_t DAC_PrescaleCalc(uint32_t dacFreq, uint32_t hfperFreq)
bogdanm 0:9b334a45a8ff 283 {
bogdanm 0:9b334a45a8ff 284 uint32_t ret;
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286 /* Make sure selected DAC clock is below max value */
bogdanm 0:9b334a45a8ff 287 if (dacFreq > DAC_MAX_CLOCK)
bogdanm 0:9b334a45a8ff 288 {
bogdanm 0:9b334a45a8ff 289 dacFreq = DAC_MAX_CLOCK;
bogdanm 0:9b334a45a8ff 290 }
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 /* Use current HFPER frequency? */
bogdanm 0:9b334a45a8ff 293 if (!hfperFreq)
bogdanm 0:9b334a45a8ff 294 {
bogdanm 0:9b334a45a8ff 295 hfperFreq = CMU_ClockFreqGet(cmuClock_HFPER);
bogdanm 0:9b334a45a8ff 296 }
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 /* Iterate in order to determine best prescale value. Only a few possible */
bogdanm 0:9b334a45a8ff 299 /* values. We start with lowest prescaler value in order to get first */
bogdanm 0:9b334a45a8ff 300 /* equal or below wanted DAC frequency value. */
bogdanm 0:9b334a45a8ff 301 for (ret = 0; ret <= (_DAC_CTRL_PRESC_MASK >> _DAC_CTRL_PRESC_SHIFT); ret++)
bogdanm 0:9b334a45a8ff 302 {
bogdanm 0:9b334a45a8ff 303 if ((hfperFreq >> ret) <= dacFreq)
bogdanm 0:9b334a45a8ff 304 break;
bogdanm 0:9b334a45a8ff 305 }
bogdanm 0:9b334a45a8ff 306
bogdanm 0:9b334a45a8ff 307 /* If ret is higher than the max prescaler value, make sure to return
bogdanm 0:9b334a45a8ff 308 the max value. */
bogdanm 0:9b334a45a8ff 309 if (ret > (_DAC_CTRL_PRESC_MASK >> _DAC_CTRL_PRESC_SHIFT))
bogdanm 0:9b334a45a8ff 310 {
bogdanm 0:9b334a45a8ff 311 ret = _DAC_CTRL_PRESC_MASK >> _DAC_CTRL_PRESC_SHIFT;
bogdanm 0:9b334a45a8ff 312 }
bogdanm 0:9b334a45a8ff 313
mbed_official 50:a417edff4437 314 return (uint8_t)ret;
bogdanm 0:9b334a45a8ff 315 }
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317
bogdanm 0:9b334a45a8ff 318 /***************************************************************************//**
bogdanm 0:9b334a45a8ff 319 * @brief
bogdanm 0:9b334a45a8ff 320 * Reset DAC to same state as after a HW reset.
bogdanm 0:9b334a45a8ff 321 *
bogdanm 0:9b334a45a8ff 322 * @param[in] dac
bogdanm 0:9b334a45a8ff 323 * Pointer to ADC peripheral register block.
bogdanm 0:9b334a45a8ff 324 ******************************************************************************/
bogdanm 0:9b334a45a8ff 325 void DAC_Reset(DAC_TypeDef *dac)
bogdanm 0:9b334a45a8ff 326 {
bogdanm 0:9b334a45a8ff 327 /* Disable channels, before resetting other registers. */
bogdanm 0:9b334a45a8ff 328 dac->CH0CTRL = _DAC_CH0CTRL_RESETVALUE;
bogdanm 0:9b334a45a8ff 329 dac->CH1CTRL = _DAC_CH1CTRL_RESETVALUE;
bogdanm 0:9b334a45a8ff 330 dac->CTRL = _DAC_CTRL_RESETVALUE;
bogdanm 0:9b334a45a8ff 331 dac->IEN = _DAC_IEN_RESETVALUE;
bogdanm 0:9b334a45a8ff 332 dac->IFC = _DAC_IFC_MASK;
bogdanm 0:9b334a45a8ff 333 dac->CAL = DEVINFO->DAC0CAL0;
bogdanm 0:9b334a45a8ff 334 dac->BIASPROG = _DAC_BIASPROG_RESETVALUE;
bogdanm 0:9b334a45a8ff 335 /* Do not reset route register, setting should be done independently */
bogdanm 0:9b334a45a8ff 336 }
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 /** @} (end addtogroup DAC) */
bogdanm 0:9b334a45a8ff 340 /** @} (end addtogroup EM_Library) */
bogdanm 0:9b334a45a8ff 341 #endif /* defined(DAC_COUNT) && (DAC_COUNT > 0) */