Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Maxim/TARGET_MAX32600/serial_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
116:983bd476082e
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /*******************************************************************************
bogdanm 0:9b334a45a8ff 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Permission is hereby granted, free of charge, to any person obtaining a
bogdanm 0:9b334a45a8ff 5 * copy of this software and associated documentation files (the "Software"),
bogdanm 0:9b334a45a8ff 6 * to deal in the Software without restriction, including without limitation
bogdanm 0:9b334a45a8ff 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
bogdanm 0:9b334a45a8ff 8 * and/or sell copies of the Software, and to permit persons to whom the
bogdanm 0:9b334a45a8ff 9 * Software is furnished to do so, subject to the following conditions:
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * The above copyright notice and this permission notice shall be included
bogdanm 0:9b334a45a8ff 12 * in all copies or substantial portions of the Software.
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
bogdanm 0:9b334a45a8ff 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
bogdanm 0:9b334a45a8ff 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
bogdanm 0:9b334a45a8ff 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
bogdanm 0:9b334a45a8ff 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
bogdanm 0:9b334a45a8ff 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bogdanm 0:9b334a45a8ff 20 * OTHER DEALINGS IN THE SOFTWARE.
bogdanm 0:9b334a45a8ff 21 *
bogdanm 0:9b334a45a8ff 22 * Except as contained in this notice, the name of Maxim Integrated
bogdanm 0:9b334a45a8ff 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
bogdanm 0:9b334a45a8ff 24 * Products, Inc. Branding Policy.
bogdanm 0:9b334a45a8ff 25 *
bogdanm 0:9b334a45a8ff 26 * The mere transfer of this software does not imply any licenses
bogdanm 0:9b334a45a8ff 27 * of trade secrets, proprietary technology, copyrights, patents,
bogdanm 0:9b334a45a8ff 28 * trademarks, maskwork rights, or any other form of intellectual
bogdanm 0:9b334a45a8ff 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
bogdanm 0:9b334a45a8ff 30 * ownership rights.
bogdanm 0:9b334a45a8ff 31 *******************************************************************************
bogdanm 0:9b334a45a8ff 32 */
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #include <string.h>
bogdanm 0:9b334a45a8ff 35 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 36 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 37 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 38 #include "uart_regs.h"
bogdanm 0:9b334a45a8ff 39 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #define UART_NUM 2
bogdanm 0:9b334a45a8ff 42 #define DEFAULT_BAUD 9600
bogdanm 0:9b334a45a8ff 43 #define DEFAULT_STOP 1
bogdanm 0:9b334a45a8ff 44 #define DEFAULT_PARITY ParityNone
bogdanm 0:9b334a45a8ff 45
bogdanm 0:9b334a45a8ff 46 #define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAME_ERROR | \
bogdanm 0:9b334a45a8ff 47 MXC_F_UART_INTFL_RX_PARITY_ERROR | \
bogdanm 0:9b334a45a8ff 48 MXC_F_UART_INTFL_RX_OVERRUN)
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 // Variables for managing the stdio UART
bogdanm 0:9b334a45a8ff 51 int stdio_uart_inited;
bogdanm 0:9b334a45a8ff 52 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 // Variables for interrupt driven
bogdanm 0:9b334a45a8ff 55 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 56 static uint32_t serial_irq_ids[UART_NUM];
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 //******************************************************************************
bogdanm 0:9b334a45a8ff 59 void serial_init(serial_t *obj, PinName tx, PinName rx)
bogdanm 0:9b334a45a8ff 60 {
bogdanm 0:9b334a45a8ff 61 // Determine which uart is associated with each pin
bogdanm 0:9b334a45a8ff 62 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 63 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 64 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 0:9b334a45a8ff 65
bogdanm 0:9b334a45a8ff 66 // Make sure that both pins are pointing to the same uart
bogdanm 0:9b334a45a8ff 67 MBED_ASSERT(uart != (UARTName)NC);
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 // Set the obj pointer to the proper uart
bogdanm 0:9b334a45a8ff 70 obj->uart = (mxc_uart_regs_t*)uart;
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 // Set the uart index
bogdanm 0:9b334a45a8ff 73 obj->index = MXC_UART_BASE_TO_INSTANCE(obj->uart);
bogdanm 0:9b334a45a8ff 74
bogdanm 0:9b334a45a8ff 75 // Configure the pins
bogdanm 0:9b334a45a8ff 76 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 77 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 78
bogdanm 0:9b334a45a8ff 79 // Flush the RX and TX FIFOs, clear the settings
bogdanm 0:9b334a45a8ff 80 obj->uart->ctrl = ( MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH);
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 // Disable interrupts
bogdanm 0:9b334a45a8ff 83 obj->uart->inten = 0;
bogdanm 0:9b334a45a8ff 84 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 // Configure to default settings
bogdanm 0:9b334a45a8ff 87 serial_baud(obj, DEFAULT_BAUD);
bogdanm 0:9b334a45a8ff 88 serial_format(obj, 8, ParityNone, 1);
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 // Manage stdio UART
bogdanm 0:9b334a45a8ff 91 if(uart == STDIO_UART) {
bogdanm 0:9b334a45a8ff 92 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 93 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 94 }
bogdanm 0:9b334a45a8ff 95 }
bogdanm 0:9b334a45a8ff 96
bogdanm 0:9b334a45a8ff 97 //******************************************************************************
bogdanm 0:9b334a45a8ff 98 void serial_baud(serial_t *obj, int baudrate)
bogdanm 0:9b334a45a8ff 99 {
bogdanm 0:9b334a45a8ff 100 uint32_t idiv = 0, ddiv = 0, div = 0;
bogdanm 0:9b334a45a8ff 101
bogdanm 0:9b334a45a8ff 102 // Calculate the integer and decimal portions
bogdanm 0:9b334a45a8ff 103 div = SystemCoreClock / ((baudrate / 100) * 128);
bogdanm 0:9b334a45a8ff 104 idiv = (div / 100);
bogdanm 0:9b334a45a8ff 105 ddiv = (div - idiv * 100) * 128 / 100;
bogdanm 0:9b334a45a8ff 106
bogdanm 0:9b334a45a8ff 107 obj->uart->baud_int = idiv;
bogdanm 0:9b334a45a8ff 108 obj->uart->baud_div_128 = ddiv;
bogdanm 0:9b334a45a8ff 109
bogdanm 0:9b334a45a8ff 110 // Enable the baud clock
bogdanm 0:9b334a45a8ff 111 obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
bogdanm 0:9b334a45a8ff 112 }
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 //******************************************************************************
bogdanm 0:9b334a45a8ff 115 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
bogdanm 0:9b334a45a8ff 116 {
bogdanm 0:9b334a45a8ff 117
bogdanm 0:9b334a45a8ff 118 // Check the validity of the inputs
bogdanm 0:9b334a45a8ff 119 MBED_ASSERT((data_bits > 4) && (data_bits < 9));
bogdanm 0:9b334a45a8ff 120 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) ||
bogdanm 0:9b334a45a8ff 121 (parity == ParityEven) || (parity == ParityForced1) ||
bogdanm 0:9b334a45a8ff 122 (parity == ParityForced0));
bogdanm 0:9b334a45a8ff 123 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 // Adjust the stop and data bits
bogdanm 0:9b334a45a8ff 126 stop_bits -= 1;
bogdanm 0:9b334a45a8ff 127 data_bits -= 5;
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 // Adjust the parity setting
bogdanm 0:9b334a45a8ff 130 int paren = 0, mode = 0;
bogdanm 0:9b334a45a8ff 131 switch (parity) {
bogdanm 0:9b334a45a8ff 132 case ParityNone:
bogdanm 0:9b334a45a8ff 133 paren = 0;
bogdanm 0:9b334a45a8ff 134 mode = 0;
bogdanm 0:9b334a45a8ff 135 break;
bogdanm 0:9b334a45a8ff 136 case ParityOdd :
bogdanm 0:9b334a45a8ff 137 paren = 1;
bogdanm 0:9b334a45a8ff 138 mode = 0;
bogdanm 0:9b334a45a8ff 139 break;
bogdanm 0:9b334a45a8ff 140 case ParityEven:
bogdanm 0:9b334a45a8ff 141 paren = 1;
bogdanm 0:9b334a45a8ff 142 mode = 1;
bogdanm 0:9b334a45a8ff 143 break;
bogdanm 0:9b334a45a8ff 144 case ParityForced1:
bogdanm 0:9b334a45a8ff 145 // Hardware does not support forced parity
bogdanm 0:9b334a45a8ff 146 MBED_ASSERT(0);
bogdanm 0:9b334a45a8ff 147 break;
bogdanm 0:9b334a45a8ff 148 case ParityForced0:
bogdanm 0:9b334a45a8ff 149 // Hardware does not support forced parity
bogdanm 0:9b334a45a8ff 150 MBED_ASSERT(0);
bogdanm 0:9b334a45a8ff 151 break;
bogdanm 0:9b334a45a8ff 152 default:
bogdanm 0:9b334a45a8ff 153 paren = 1;
bogdanm 0:9b334a45a8ff 154 mode = 0;
bogdanm 0:9b334a45a8ff 155 break;
bogdanm 0:9b334a45a8ff 156 }
bogdanm 0:9b334a45a8ff 157
bogdanm 0:9b334a45a8ff 158 obj->uart->ctrl |= ((data_bits << MXC_F_UART_CTRL_CHAR_LENGTH_POS) |
bogdanm 0:9b334a45a8ff 159 (stop_bits << MXC_F_UART_CTRL_STOP_BIT_MODE_POS) |
bogdanm 0:9b334a45a8ff 160 (paren << MXC_F_UART_CTRL_PARITY_ENABLE_POS) |
bogdanm 0:9b334a45a8ff 161 (mode << MXC_F_UART_CTRL_PARITY_MODE_POS));
bogdanm 0:9b334a45a8ff 162 }
bogdanm 0:9b334a45a8ff 163
bogdanm 0:9b334a45a8ff 164 //******************************************************************************
bogdanm 0:9b334a45a8ff 165 void uart_handler(mxc_uart_regs_t* uart, int id)
bogdanm 0:9b334a45a8ff 166 {
bogdanm 0:9b334a45a8ff 167 // Check for errors or RX Threshold
bogdanm 0:9b334a45a8ff 168 if(uart->intfl & (MXC_F_UART_INTFL_RX_OVER_THRESHOLD | UART_ERRORS)) {
bogdanm 0:9b334a45a8ff 169 irq_handler(serial_irq_ids[id], RxIrq);
bogdanm 0:9b334a45a8ff 170 uart->intfl &= ~(MXC_F_UART_INTFL_RX_OVER_THRESHOLD | UART_ERRORS);
bogdanm 0:9b334a45a8ff 171 }
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 // Check for TX Threshold
bogdanm 0:9b334a45a8ff 174 if(uart->intfl & MXC_F_UART_INTFL_TX_ALMOST_EMPTY) {
bogdanm 0:9b334a45a8ff 175 irq_handler(serial_irq_ids[id], TxIrq);
bogdanm 0:9b334a45a8ff 176 uart->intfl &= ~(MXC_F_UART_INTFL_TX_ALMOST_EMPTY);
bogdanm 0:9b334a45a8ff 177 }
bogdanm 0:9b334a45a8ff 178 }
bogdanm 0:9b334a45a8ff 179
bogdanm 0:9b334a45a8ff 180 void uart0_handler(void)
bogdanm 0:9b334a45a8ff 181 {
bogdanm 0:9b334a45a8ff 182 uart_handler(MXC_UART0, 0);
bogdanm 0:9b334a45a8ff 183 }
bogdanm 0:9b334a45a8ff 184 void uart1_handler(void)
bogdanm 0:9b334a45a8ff 185 {
bogdanm 0:9b334a45a8ff 186 uart_handler(MXC_UART1, 1);
bogdanm 0:9b334a45a8ff 187 }
bogdanm 0:9b334a45a8ff 188
bogdanm 0:9b334a45a8ff 189 //******************************************************************************
bogdanm 0:9b334a45a8ff 190 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
bogdanm 0:9b334a45a8ff 191 {
bogdanm 0:9b334a45a8ff 192 irq_handler = handler;
bogdanm 0:9b334a45a8ff 193 serial_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 194 }
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 //******************************************************************************
bogdanm 0:9b334a45a8ff 197 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
bogdanm 0:9b334a45a8ff 198 {
bogdanm 0:9b334a45a8ff 199 if(obj->index == 0) {
bogdanm 0:9b334a45a8ff 200 NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
bogdanm 0:9b334a45a8ff 201 NVIC_EnableIRQ(UART0_IRQn);
bogdanm 0:9b334a45a8ff 202 } else {
bogdanm 0:9b334a45a8ff 203 NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
bogdanm 0:9b334a45a8ff 204 NVIC_EnableIRQ(UART1_IRQn);
bogdanm 0:9b334a45a8ff 205 }
bogdanm 0:9b334a45a8ff 206
bogdanm 0:9b334a45a8ff 207 if(irq == RxIrq) {
bogdanm 0:9b334a45a8ff 208 // Set the RX FIFO Threshold to 1
bogdanm 0:9b334a45a8ff 209 obj->uart->ctrl &= ~MXC_F_UART_CTRL_RX_THRESHOLD;
bogdanm 0:9b334a45a8ff 210 obj->uart->ctrl |= 0x1;
bogdanm 0:9b334a45a8ff 211 // Enable RX FIFO Threshold Interrupt
bogdanm 0:9b334a45a8ff 212 if(enable) {
bogdanm 0:9b334a45a8ff 213 // Clear pending interrupts
bogdanm 0:9b334a45a8ff 214 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 215 obj->uart->inten |= (MXC_F_UART_INTFL_RX_OVER_THRESHOLD |
bogdanm 0:9b334a45a8ff 216 UART_ERRORS);
bogdanm 0:9b334a45a8ff 217 } else {
bogdanm 0:9b334a45a8ff 218 // Clear pending interrupts
bogdanm 0:9b334a45a8ff 219 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 220 obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_OVER_THRESHOLD |
bogdanm 0:9b334a45a8ff 221 UART_ERRORS);
bogdanm 0:9b334a45a8ff 222 }
bogdanm 0:9b334a45a8ff 223
bogdanm 0:9b334a45a8ff 224 } else if (irq == TxIrq) {
bogdanm 0:9b334a45a8ff 225 // Enable TX Almost empty Interrupt
bogdanm 0:9b334a45a8ff 226 if(enable) {
bogdanm 0:9b334a45a8ff 227 // Clear pending interrupts
bogdanm 0:9b334a45a8ff 228 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 229 obj->uart->inten |= MXC_F_UART_INTFL_TX_ALMOST_EMPTY;
bogdanm 0:9b334a45a8ff 230 } else {
bogdanm 0:9b334a45a8ff 231 // Clear pending interrupts
bogdanm 0:9b334a45a8ff 232 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 233 obj->uart->inten &= ~MXC_F_UART_INTFL_TX_ALMOST_EMPTY;
bogdanm 0:9b334a45a8ff 234 }
bogdanm 0:9b334a45a8ff 235
bogdanm 0:9b334a45a8ff 236 } else {
bogdanm 0:9b334a45a8ff 237 MBED_ASSERT(0);
bogdanm 0:9b334a45a8ff 238 }
bogdanm 0:9b334a45a8ff 239 }
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241
bogdanm 0:9b334a45a8ff 242 //******************************************************************************
bogdanm 0:9b334a45a8ff 243 int serial_getc(serial_t *obj)
bogdanm 0:9b334a45a8ff 244 {
bogdanm 0:9b334a45a8ff 245 int c;
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 // Wait for data to be available
bogdanm 0:9b334a45a8ff 248 while(obj->uart->status & MXC_F_UART_STATUS_RX_FIFO_EMPTY) {}
bogdanm 0:9b334a45a8ff 249 c = obj->uart->tx_rx_fifo & 0xFF;
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 // Echo characters for stdio
bogdanm 0:9b334a45a8ff 252 if (obj->uart == (mxc_uart_regs_t*)STDIO_UART) {
bogdanm 0:9b334a45a8ff 253 obj->uart->tx_rx_fifo = c;
bogdanm 0:9b334a45a8ff 254 }
bogdanm 0:9b334a45a8ff 255
bogdanm 0:9b334a45a8ff 256 return c;
bogdanm 0:9b334a45a8ff 257 }
bogdanm 0:9b334a45a8ff 258
bogdanm 0:9b334a45a8ff 259 //******************************************************************************
bogdanm 0:9b334a45a8ff 260 void serial_putc(serial_t *obj, int c)
bogdanm 0:9b334a45a8ff 261 {
bogdanm 0:9b334a45a8ff 262 // Append a carriage return for stdio
bogdanm 0:9b334a45a8ff 263 if ((c == (int)'\n') && (obj->uart == (mxc_uart_regs_t*)STDIO_UART)) {
bogdanm 0:9b334a45a8ff 264 while(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL) {}
bogdanm 0:9b334a45a8ff 265 obj->uart->tx_rx_fifo = '\r';
bogdanm 0:9b334a45a8ff 266 }
bogdanm 0:9b334a45a8ff 267
bogdanm 0:9b334a45a8ff 268 // Wait for TXFIFO to not be full
bogdanm 0:9b334a45a8ff 269 while(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL) {}
bogdanm 0:9b334a45a8ff 270 obj->uart->tx_rx_fifo = c;
bogdanm 0:9b334a45a8ff 271
bogdanm 0:9b334a45a8ff 272 }
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 //******************************************************************************
bogdanm 0:9b334a45a8ff 275 int serial_readable(serial_t *obj)
bogdanm 0:9b334a45a8ff 276 {
bogdanm 0:9b334a45a8ff 277 return (!(obj->uart->status & MXC_F_UART_STATUS_RX_FIFO_EMPTY));
bogdanm 0:9b334a45a8ff 278 }
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 //******************************************************************************
bogdanm 0:9b334a45a8ff 281 int serial_writable(serial_t *obj)
bogdanm 0:9b334a45a8ff 282 {
bogdanm 0:9b334a45a8ff 283 return (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL));
bogdanm 0:9b334a45a8ff 284 }
bogdanm 0:9b334a45a8ff 285
bogdanm 0:9b334a45a8ff 286 //******************************************************************************
bogdanm 0:9b334a45a8ff 287 void serial_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 288 {
bogdanm 0:9b334a45a8ff 289 // Clear the rx and tx fifos
bogdanm 0:9b334a45a8ff 290 obj->uart->ctrl |= (MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH );
bogdanm 0:9b334a45a8ff 291 }
bogdanm 0:9b334a45a8ff 292
bogdanm 0:9b334a45a8ff 293
bogdanm 0:9b334a45a8ff 294 //******************************************************************************
bogdanm 0:9b334a45a8ff 295 void serial_break_set(serial_t *obj)
bogdanm 0:9b334a45a8ff 296 {
bogdanm 0:9b334a45a8ff 297 // Make sure that nothing is being sent
bogdanm 0:9b334a45a8ff 298 while(obj->uart->status & MXC_F_UART_STATUS_RX_BUSY) {}
bogdanm 0:9b334a45a8ff 299
bogdanm 0:9b334a45a8ff 300 // Disable the clock to pause any transmission
bogdanm 0:9b334a45a8ff 301 obj->uart->ctrl &= ~MXC_F_UART_CTRL_BAUD_CLK_EN ;
bogdanm 0:9b334a45a8ff 302 }
bogdanm 0:9b334a45a8ff 303
bogdanm 0:9b334a45a8ff 304 //******************************************************************************
bogdanm 0:9b334a45a8ff 305 void serial_break_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 306 {
bogdanm 0:9b334a45a8ff 307 obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
bogdanm 0:9b334a45a8ff 308 }
bogdanm 0:9b334a45a8ff 309
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 //******************************************************************************
bogdanm 0:9b334a45a8ff 312 void serial_pinout_tx(PinName tx)
bogdanm 0:9b334a45a8ff 313 {
bogdanm 0:9b334a45a8ff 314 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 315 }
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317
bogdanm 0:9b334a45a8ff 318 //******************************************************************************
bogdanm 0:9b334a45a8ff 319 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
bogdanm 0:9b334a45a8ff 320 {
bogdanm 0:9b334a45a8ff 321 if(FlowControlNone == type) {
bogdanm 0:9b334a45a8ff 322 // Disable hardware flow control
bogdanm 0:9b334a45a8ff 323 obj->uart->ctrl &= ~(MXC_F_UART_CTRL_HW_FLOW_CTRL_EN);
bogdanm 0:9b334a45a8ff 324 return;
bogdanm 0:9b334a45a8ff 325 }
bogdanm 0:9b334a45a8ff 326
bogdanm 0:9b334a45a8ff 327 // Check to see if we can use HW flow control
bogdanm 0:9b334a45a8ff 328 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
bogdanm 0:9b334a45a8ff 329 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
bogdanm 0:9b334a45a8ff 330 UARTName uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
bogdanm 0:9b334a45a8ff 331
bogdanm 0:9b334a45a8ff 332 if((FlowControlCTS == type) || (FlowControlRTSCTS== type)) {
bogdanm 0:9b334a45a8ff 333 // Make sure pin is in the PinMap
bogdanm 0:9b334a45a8ff 334 MBED_ASSERT(uart_cts != (UARTName)NC);
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 // Enable the pin for CTS function
bogdanm 0:9b334a45a8ff 337 pinmap_pinout(txflow, PinMap_UART_CTS);
bogdanm 0:9b334a45a8ff 338 }
bogdanm 0:9b334a45a8ff 339
bogdanm 0:9b334a45a8ff 340 if((FlowControlRTS == type) || (FlowControlRTSCTS== type)) {
bogdanm 0:9b334a45a8ff 341 // Make sure pin is in the PinMap
bogdanm 0:9b334a45a8ff 342 MBED_ASSERT(uart_rts != (UARTName)NC);
bogdanm 0:9b334a45a8ff 343
bogdanm 0:9b334a45a8ff 344 // Enable the pin for RTS function
bogdanm 0:9b334a45a8ff 345 pinmap_pinout(rxflow, PinMap_UART_RTS);
bogdanm 0:9b334a45a8ff 346 }
bogdanm 0:9b334a45a8ff 347
bogdanm 0:9b334a45a8ff 348 if(FlowControlRTSCTS == type){
bogdanm 0:9b334a45a8ff 349 // Make sure that the pins are pointing to the same UART
bogdanm 0:9b334a45a8ff 350 MBED_ASSERT(uart != (UARTName)NC);
bogdanm 0:9b334a45a8ff 351 }
bogdanm 0:9b334a45a8ff 352
bogdanm 0:9b334a45a8ff 353 // Enable hardware flow control
bogdanm 0:9b334a45a8ff 354 obj->uart->ctrl |= MXC_F_UART_CTRL_HW_FLOW_CTRL_EN;
bogdanm 0:9b334a45a8ff 355 }