Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/hal/TARGET_Maxim/TARGET_MAX32600/serial_api.c@116:983bd476082e, 2016-04-26 (annotated)

Committer:
mbed_official
Date:
Tue Apr 26 19:30:12 2016 +0100
Revision:
116:983bd476082e
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision 0b67bf08c8c2ce634f489a85e1c044812034bca2



Full URL: https://github.com/mbedmicro/mbed/commit/0b67bf08c8c2ce634f489a85e1c044812034bca2/



Our UART doesn't have the ability to send a break, so we make the TX a GPIO and drive it low during the break_set() and then release it back to the UART in the break_clear().

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /*******************************************************************************
bogdanm 0:9b334a45a8ff 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Permission is hereby granted, free of charge, to any person obtaining a
bogdanm 0:9b334a45a8ff 5 * copy of this software and associated documentation files (the "Software"),
bogdanm 0:9b334a45a8ff 6 * to deal in the Software without restriction, including without limitation
bogdanm 0:9b334a45a8ff 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
bogdanm 0:9b334a45a8ff 8 * and/or sell copies of the Software, and to permit persons to whom the
bogdanm 0:9b334a45a8ff 9 * Software is furnished to do so, subject to the following conditions:
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * The above copyright notice and this permission notice shall be included
bogdanm 0:9b334a45a8ff 12 * in all copies or substantial portions of the Software.
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
bogdanm 0:9b334a45a8ff 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
bogdanm 0:9b334a45a8ff 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
bogdanm 0:9b334a45a8ff 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
bogdanm 0:9b334a45a8ff 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
bogdanm 0:9b334a45a8ff 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bogdanm 0:9b334a45a8ff 20 * OTHER DEALINGS IN THE SOFTWARE.
bogdanm 0:9b334a45a8ff 21 *
bogdanm 0:9b334a45a8ff 22 * Except as contained in this notice, the name of Maxim Integrated
bogdanm 0:9b334a45a8ff 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
bogdanm 0:9b334a45a8ff 24 * Products, Inc. Branding Policy.
bogdanm 0:9b334a45a8ff 25 *
bogdanm 0:9b334a45a8ff 26 * The mere transfer of this software does not imply any licenses
bogdanm 0:9b334a45a8ff 27 * of trade secrets, proprietary technology, copyrights, patents,
bogdanm 0:9b334a45a8ff 28 * trademarks, maskwork rights, or any other form of intellectual
bogdanm 0:9b334a45a8ff 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
bogdanm 0:9b334a45a8ff 30 * ownership rights.
bogdanm 0:9b334a45a8ff 31 *******************************************************************************
bogdanm 0:9b334a45a8ff 32 */
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #include <string.h>
bogdanm 0:9b334a45a8ff 35 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 36 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 37 #include "serial_api.h"
mbed_official 116:983bd476082e 38 #include "gpio_api.h"
bogdanm 0:9b334a45a8ff 39 #include "uart_regs.h"
mbed_official 116:983bd476082e 40 #include "ioman_regs.h"
bogdanm 0:9b334a45a8ff 41 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 #define UART_NUM 2
bogdanm 0:9b334a45a8ff 44 #define DEFAULT_BAUD 9600
bogdanm 0:9b334a45a8ff 45 #define DEFAULT_STOP 1
bogdanm 0:9b334a45a8ff 46 #define DEFAULT_PARITY ParityNone
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 #define UART_ERRORS (MXC_F_UART_INTFL_RX_FRAME_ERROR | \
bogdanm 0:9b334a45a8ff 49 MXC_F_UART_INTFL_RX_PARITY_ERROR | \
bogdanm 0:9b334a45a8ff 50 MXC_F_UART_INTFL_RX_OVERRUN)
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 // Variables for managing the stdio UART
bogdanm 0:9b334a45a8ff 53 int stdio_uart_inited;
bogdanm 0:9b334a45a8ff 54 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 55
bogdanm 0:9b334a45a8ff 56 // Variables for interrupt driven
bogdanm 0:9b334a45a8ff 57 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 58 static uint32_t serial_irq_ids[UART_NUM];
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 //******************************************************************************
bogdanm 0:9b334a45a8ff 61 void serial_init(serial_t *obj, PinName tx, PinName rx)
bogdanm 0:9b334a45a8ff 62 {
bogdanm 0:9b334a45a8ff 63 // Determine which uart is associated with each pin
bogdanm 0:9b334a45a8ff 64 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 65 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 66 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 0:9b334a45a8ff 67
bogdanm 0:9b334a45a8ff 68 // Make sure that both pins are pointing to the same uart
bogdanm 0:9b334a45a8ff 69 MBED_ASSERT(uart != (UARTName)NC);
bogdanm 0:9b334a45a8ff 70
bogdanm 0:9b334a45a8ff 71 // Set the obj pointer to the proper uart
bogdanm 0:9b334a45a8ff 72 obj->uart = (mxc_uart_regs_t*)uart;
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 // Set the uart index
bogdanm 0:9b334a45a8ff 75 obj->index = MXC_UART_BASE_TO_INSTANCE(obj->uart);
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 // Configure the pins
bogdanm 0:9b334a45a8ff 78 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 79 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 80
bogdanm 0:9b334a45a8ff 81 // Flush the RX and TX FIFOs, clear the settings
bogdanm 0:9b334a45a8ff 82 obj->uart->ctrl = ( MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH);
bogdanm 0:9b334a45a8ff 83
bogdanm 0:9b334a45a8ff 84 // Disable interrupts
bogdanm 0:9b334a45a8ff 85 obj->uart->inten = 0;
bogdanm 0:9b334a45a8ff 86 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 87
bogdanm 0:9b334a45a8ff 88 // Configure to default settings
bogdanm 0:9b334a45a8ff 89 serial_baud(obj, DEFAULT_BAUD);
bogdanm 0:9b334a45a8ff 90 serial_format(obj, 8, ParityNone, 1);
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 // Manage stdio UART
bogdanm 0:9b334a45a8ff 93 if(uart == STDIO_UART) {
bogdanm 0:9b334a45a8ff 94 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 95 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 96 }
bogdanm 0:9b334a45a8ff 97 }
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 //******************************************************************************
bogdanm 0:9b334a45a8ff 100 void serial_baud(serial_t *obj, int baudrate)
bogdanm 0:9b334a45a8ff 101 {
bogdanm 0:9b334a45a8ff 102 uint32_t idiv = 0, ddiv = 0, div = 0;
bogdanm 0:9b334a45a8ff 103
bogdanm 0:9b334a45a8ff 104 // Calculate the integer and decimal portions
bogdanm 0:9b334a45a8ff 105 div = SystemCoreClock / ((baudrate / 100) * 128);
bogdanm 0:9b334a45a8ff 106 idiv = (div / 100);
bogdanm 0:9b334a45a8ff 107 ddiv = (div - idiv * 100) * 128 / 100;
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 obj->uart->baud_int = idiv;
bogdanm 0:9b334a45a8ff 110 obj->uart->baud_div_128 = ddiv;
bogdanm 0:9b334a45a8ff 111
bogdanm 0:9b334a45a8ff 112 // Enable the baud clock
bogdanm 0:9b334a45a8ff 113 obj->uart->ctrl |= MXC_F_UART_CTRL_BAUD_CLK_EN;
bogdanm 0:9b334a45a8ff 114 }
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 //******************************************************************************
bogdanm 0:9b334a45a8ff 117 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits)
bogdanm 0:9b334a45a8ff 118 {
bogdanm 0:9b334a45a8ff 119
bogdanm 0:9b334a45a8ff 120 // Check the validity of the inputs
bogdanm 0:9b334a45a8ff 121 MBED_ASSERT((data_bits > 4) && (data_bits < 9));
bogdanm 0:9b334a45a8ff 122 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) ||
bogdanm 0:9b334a45a8ff 123 (parity == ParityEven) || (parity == ParityForced1) ||
bogdanm 0:9b334a45a8ff 124 (parity == ParityForced0));
bogdanm 0:9b334a45a8ff 125 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 // Adjust the stop and data bits
bogdanm 0:9b334a45a8ff 128 stop_bits -= 1;
bogdanm 0:9b334a45a8ff 129 data_bits -= 5;
bogdanm 0:9b334a45a8ff 130
bogdanm 0:9b334a45a8ff 131 // Adjust the parity setting
bogdanm 0:9b334a45a8ff 132 int paren = 0, mode = 0;
bogdanm 0:9b334a45a8ff 133 switch (parity) {
bogdanm 0:9b334a45a8ff 134 case ParityNone:
bogdanm 0:9b334a45a8ff 135 paren = 0;
bogdanm 0:9b334a45a8ff 136 mode = 0;
bogdanm 0:9b334a45a8ff 137 break;
bogdanm 0:9b334a45a8ff 138 case ParityOdd :
bogdanm 0:9b334a45a8ff 139 paren = 1;
bogdanm 0:9b334a45a8ff 140 mode = 0;
bogdanm 0:9b334a45a8ff 141 break;
bogdanm 0:9b334a45a8ff 142 case ParityEven:
bogdanm 0:9b334a45a8ff 143 paren = 1;
bogdanm 0:9b334a45a8ff 144 mode = 1;
bogdanm 0:9b334a45a8ff 145 break;
bogdanm 0:9b334a45a8ff 146 case ParityForced1:
bogdanm 0:9b334a45a8ff 147 // Hardware does not support forced parity
bogdanm 0:9b334a45a8ff 148 MBED_ASSERT(0);
bogdanm 0:9b334a45a8ff 149 break;
bogdanm 0:9b334a45a8ff 150 case ParityForced0:
bogdanm 0:9b334a45a8ff 151 // Hardware does not support forced parity
bogdanm 0:9b334a45a8ff 152 MBED_ASSERT(0);
bogdanm 0:9b334a45a8ff 153 break;
bogdanm 0:9b334a45a8ff 154 default:
bogdanm 0:9b334a45a8ff 155 paren = 1;
bogdanm 0:9b334a45a8ff 156 mode = 0;
bogdanm 0:9b334a45a8ff 157 break;
bogdanm 0:9b334a45a8ff 158 }
bogdanm 0:9b334a45a8ff 159
bogdanm 0:9b334a45a8ff 160 obj->uart->ctrl |= ((data_bits << MXC_F_UART_CTRL_CHAR_LENGTH_POS) |
bogdanm 0:9b334a45a8ff 161 (stop_bits << MXC_F_UART_CTRL_STOP_BIT_MODE_POS) |
bogdanm 0:9b334a45a8ff 162 (paren << MXC_F_UART_CTRL_PARITY_ENABLE_POS) |
bogdanm 0:9b334a45a8ff 163 (mode << MXC_F_UART_CTRL_PARITY_MODE_POS));
bogdanm 0:9b334a45a8ff 164 }
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 //******************************************************************************
bogdanm 0:9b334a45a8ff 167 void uart_handler(mxc_uart_regs_t* uart, int id)
bogdanm 0:9b334a45a8ff 168 {
bogdanm 0:9b334a45a8ff 169 // Check for errors or RX Threshold
bogdanm 0:9b334a45a8ff 170 if(uart->intfl & (MXC_F_UART_INTFL_RX_OVER_THRESHOLD | UART_ERRORS)) {
bogdanm 0:9b334a45a8ff 171 irq_handler(serial_irq_ids[id], RxIrq);
bogdanm 0:9b334a45a8ff 172 uart->intfl &= ~(MXC_F_UART_INTFL_RX_OVER_THRESHOLD | UART_ERRORS);
bogdanm 0:9b334a45a8ff 173 }
bogdanm 0:9b334a45a8ff 174
bogdanm 0:9b334a45a8ff 175 // Check for TX Threshold
bogdanm 0:9b334a45a8ff 176 if(uart->intfl & MXC_F_UART_INTFL_TX_ALMOST_EMPTY) {
bogdanm 0:9b334a45a8ff 177 irq_handler(serial_irq_ids[id], TxIrq);
bogdanm 0:9b334a45a8ff 178 uart->intfl &= ~(MXC_F_UART_INTFL_TX_ALMOST_EMPTY);
bogdanm 0:9b334a45a8ff 179 }
bogdanm 0:9b334a45a8ff 180 }
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 void uart0_handler(void)
bogdanm 0:9b334a45a8ff 183 {
bogdanm 0:9b334a45a8ff 184 uart_handler(MXC_UART0, 0);
bogdanm 0:9b334a45a8ff 185 }
bogdanm 0:9b334a45a8ff 186 void uart1_handler(void)
bogdanm 0:9b334a45a8ff 187 {
bogdanm 0:9b334a45a8ff 188 uart_handler(MXC_UART1, 1);
bogdanm 0:9b334a45a8ff 189 }
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 //******************************************************************************
bogdanm 0:9b334a45a8ff 192 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id)
bogdanm 0:9b334a45a8ff 193 {
bogdanm 0:9b334a45a8ff 194 irq_handler = handler;
bogdanm 0:9b334a45a8ff 195 serial_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 196 }
bogdanm 0:9b334a45a8ff 197
bogdanm 0:9b334a45a8ff 198 //******************************************************************************
bogdanm 0:9b334a45a8ff 199 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable)
bogdanm 0:9b334a45a8ff 200 {
bogdanm 0:9b334a45a8ff 201 if(obj->index == 0) {
bogdanm 0:9b334a45a8ff 202 NVIC_SetVector(UART0_IRQn, (uint32_t)uart0_handler);
bogdanm 0:9b334a45a8ff 203 NVIC_EnableIRQ(UART0_IRQn);
bogdanm 0:9b334a45a8ff 204 } else {
bogdanm 0:9b334a45a8ff 205 NVIC_SetVector(UART1_IRQn, (uint32_t)uart1_handler);
bogdanm 0:9b334a45a8ff 206 NVIC_EnableIRQ(UART1_IRQn);
bogdanm 0:9b334a45a8ff 207 }
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 if(irq == RxIrq) {
bogdanm 0:9b334a45a8ff 210 // Set the RX FIFO Threshold to 1
bogdanm 0:9b334a45a8ff 211 obj->uart->ctrl &= ~MXC_F_UART_CTRL_RX_THRESHOLD;
bogdanm 0:9b334a45a8ff 212 obj->uart->ctrl |= 0x1;
bogdanm 0:9b334a45a8ff 213 // Enable RX FIFO Threshold Interrupt
bogdanm 0:9b334a45a8ff 214 if(enable) {
bogdanm 0:9b334a45a8ff 215 // Clear pending interrupts
bogdanm 0:9b334a45a8ff 216 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 217 obj->uart->inten |= (MXC_F_UART_INTFL_RX_OVER_THRESHOLD |
bogdanm 0:9b334a45a8ff 218 UART_ERRORS);
bogdanm 0:9b334a45a8ff 219 } else {
bogdanm 0:9b334a45a8ff 220 // Clear pending interrupts
bogdanm 0:9b334a45a8ff 221 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 222 obj->uart->inten &= ~(MXC_F_UART_INTFL_RX_OVER_THRESHOLD |
bogdanm 0:9b334a45a8ff 223 UART_ERRORS);
bogdanm 0:9b334a45a8ff 224 }
bogdanm 0:9b334a45a8ff 225
bogdanm 0:9b334a45a8ff 226 } else if (irq == TxIrq) {
bogdanm 0:9b334a45a8ff 227 // Enable TX Almost empty Interrupt
bogdanm 0:9b334a45a8ff 228 if(enable) {
bogdanm 0:9b334a45a8ff 229 // Clear pending interrupts
bogdanm 0:9b334a45a8ff 230 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 231 obj->uart->inten |= MXC_F_UART_INTFL_TX_ALMOST_EMPTY;
bogdanm 0:9b334a45a8ff 232 } else {
bogdanm 0:9b334a45a8ff 233 // Clear pending interrupts
bogdanm 0:9b334a45a8ff 234 obj->uart->intfl = 0;
bogdanm 0:9b334a45a8ff 235 obj->uart->inten &= ~MXC_F_UART_INTFL_TX_ALMOST_EMPTY;
bogdanm 0:9b334a45a8ff 236 }
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 } else {
bogdanm 0:9b334a45a8ff 239 MBED_ASSERT(0);
bogdanm 0:9b334a45a8ff 240 }
bogdanm 0:9b334a45a8ff 241 }
bogdanm 0:9b334a45a8ff 242
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 //******************************************************************************
bogdanm 0:9b334a45a8ff 245 int serial_getc(serial_t *obj)
bogdanm 0:9b334a45a8ff 246 {
bogdanm 0:9b334a45a8ff 247 int c;
bogdanm 0:9b334a45a8ff 248
bogdanm 0:9b334a45a8ff 249 // Wait for data to be available
bogdanm 0:9b334a45a8ff 250 while(obj->uart->status & MXC_F_UART_STATUS_RX_FIFO_EMPTY) {}
bogdanm 0:9b334a45a8ff 251 c = obj->uart->tx_rx_fifo & 0xFF;
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 // Echo characters for stdio
bogdanm 0:9b334a45a8ff 254 if (obj->uart == (mxc_uart_regs_t*)STDIO_UART) {
bogdanm 0:9b334a45a8ff 255 obj->uart->tx_rx_fifo = c;
bogdanm 0:9b334a45a8ff 256 }
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 return c;
bogdanm 0:9b334a45a8ff 259 }
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 //******************************************************************************
bogdanm 0:9b334a45a8ff 262 void serial_putc(serial_t *obj, int c)
bogdanm 0:9b334a45a8ff 263 {
bogdanm 0:9b334a45a8ff 264 // Append a carriage return for stdio
bogdanm 0:9b334a45a8ff 265 if ((c == (int)'\n') && (obj->uart == (mxc_uart_regs_t*)STDIO_UART)) {
bogdanm 0:9b334a45a8ff 266 while(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL) {}
bogdanm 0:9b334a45a8ff 267 obj->uart->tx_rx_fifo = '\r';
bogdanm 0:9b334a45a8ff 268 }
bogdanm 0:9b334a45a8ff 269
bogdanm 0:9b334a45a8ff 270 // Wait for TXFIFO to not be full
bogdanm 0:9b334a45a8ff 271 while(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL) {}
bogdanm 0:9b334a45a8ff 272 obj->uart->tx_rx_fifo = c;
bogdanm 0:9b334a45a8ff 273
bogdanm 0:9b334a45a8ff 274 }
bogdanm 0:9b334a45a8ff 275
bogdanm 0:9b334a45a8ff 276 //******************************************************************************
bogdanm 0:9b334a45a8ff 277 int serial_readable(serial_t *obj)
bogdanm 0:9b334a45a8ff 278 {
bogdanm 0:9b334a45a8ff 279 return (!(obj->uart->status & MXC_F_UART_STATUS_RX_FIFO_EMPTY));
bogdanm 0:9b334a45a8ff 280 }
bogdanm 0:9b334a45a8ff 281
bogdanm 0:9b334a45a8ff 282 //******************************************************************************
bogdanm 0:9b334a45a8ff 283 int serial_writable(serial_t *obj)
bogdanm 0:9b334a45a8ff 284 {
bogdanm 0:9b334a45a8ff 285 return (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_FULL));
bogdanm 0:9b334a45a8ff 286 }
bogdanm 0:9b334a45a8ff 287
bogdanm 0:9b334a45a8ff 288 //******************************************************************************
bogdanm 0:9b334a45a8ff 289 void serial_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 290 {
bogdanm 0:9b334a45a8ff 291 // Clear the rx and tx fifos
bogdanm 0:9b334a45a8ff 292 obj->uart->ctrl |= (MXC_F_UART_CTRL_TX_FIFO_FLUSH | MXC_F_UART_CTRL_RX_FIFO_FLUSH );
bogdanm 0:9b334a45a8ff 293 }
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 //******************************************************************************
bogdanm 0:9b334a45a8ff 296 void serial_break_set(serial_t *obj)
bogdanm 0:9b334a45a8ff 297 {
bogdanm 0:9b334a45a8ff 298 // Make sure that nothing is being sent
mbed_official 116:983bd476082e 299 while (!(obj->uart->status & MXC_F_UART_STATUS_TX_FIFO_EMPTY));
mbed_official 116:983bd476082e 300 while (obj->uart->status & MXC_F_UART_STATUS_TX_BUSY);
bogdanm 0:9b334a45a8ff 301
mbed_official 116:983bd476082e 302 // Configure the GPIO to outpu 0
mbed_official 116:983bd476082e 303 gpio_t tx_gpio;
mbed_official 116:983bd476082e 304 switch (((UARTName)(obj->uart))) {
mbed_official 116:983bd476082e 305 case UART_0:
mbed_official 116:983bd476082e 306 gpio_init_out(&tx_gpio, UART0_TX);
mbed_official 116:983bd476082e 307 break;
mbed_official 116:983bd476082e 308 case UART_1:
mbed_official 116:983bd476082e 309 gpio_init_out(&tx_gpio, UART1_TX);
mbed_official 116:983bd476082e 310 break;
mbed_official 116:983bd476082e 311 default:
mbed_official 116:983bd476082e 312 gpio_init_out(&tx_gpio, (PinName)NC);
mbed_official 116:983bd476082e 313 break;
mbed_official 116:983bd476082e 314 }
mbed_official 116:983bd476082e 315
mbed_official 116:983bd476082e 316 gpio_write(&tx_gpio, 0);
mbed_official 116:983bd476082e 317
mbed_official 116:983bd476082e 318 // GPIO is setup now, but we need to maps gpio to the pin
mbed_official 116:983bd476082e 319 switch (((UARTName)(obj->uart))) {
mbed_official 116:983bd476082e 320 case UART_0:
mbed_official 116:983bd476082e 321 MXC_IOMAN->uart0_req &= ~MXC_F_IOMAN_UART_CORE_IO;
mbed_official 116:983bd476082e 322 MBED_ASSERT((MXC_IOMAN->uart0_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
mbed_official 116:983bd476082e 323 break;
mbed_official 116:983bd476082e 324 case UART_1:
mbed_official 116:983bd476082e 325 MXC_IOMAN->uart1_req &= ~MXC_F_IOMAN_UART_CORE_IO;
mbed_official 116:983bd476082e 326 MBED_ASSERT((MXC_IOMAN->uart1_ack & (MXC_F_IOMAN_UART_CORE_IO | MXC_F_IOMAN_UART_CORE_IO)) == 0);
mbed_official 116:983bd476082e 327 break;
mbed_official 116:983bd476082e 328 default:
mbed_official 116:983bd476082e 329 break;
mbed_official 116:983bd476082e 330 }
bogdanm 0:9b334a45a8ff 331 }
bogdanm 0:9b334a45a8ff 332
bogdanm 0:9b334a45a8ff 333 //******************************************************************************
bogdanm 0:9b334a45a8ff 334 void serial_break_clear(serial_t *obj)
bogdanm 0:9b334a45a8ff 335 {
mbed_official 116:983bd476082e 336 // Configure the GPIO to output 1
mbed_official 116:983bd476082e 337 gpio_t tx_gpio;
mbed_official 116:983bd476082e 338 switch (((UARTName)(obj->uart))) {
mbed_official 116:983bd476082e 339 case UART_0:
mbed_official 116:983bd476082e 340 gpio_init_out(&tx_gpio, UART0_TX);
mbed_official 116:983bd476082e 341 break;
mbed_official 116:983bd476082e 342 case UART_1:
mbed_official 116:983bd476082e 343 gpio_init_out(&tx_gpio, UART1_TX);
mbed_official 116:983bd476082e 344 break;
mbed_official 116:983bd476082e 345 default:
mbed_official 116:983bd476082e 346 gpio_init_out(&tx_gpio, (PinName)NC);
mbed_official 116:983bd476082e 347 break;
mbed_official 116:983bd476082e 348 }
mbed_official 116:983bd476082e 349
mbed_official 116:983bd476082e 350 gpio_write(&tx_gpio, 1);
mbed_official 116:983bd476082e 351
mbed_official 116:983bd476082e 352 // Renable UART
mbed_official 116:983bd476082e 353 switch (((UARTName)(obj->uart))) {
mbed_official 116:983bd476082e 354 case UART_0:
mbed_official 116:983bd476082e 355 serial_pinout_tx(UART0_TX);
mbed_official 116:983bd476082e 356 break;
mbed_official 116:983bd476082e 357 case UART_1:
mbed_official 116:983bd476082e 358 serial_pinout_tx(UART1_TX);
mbed_official 116:983bd476082e 359 break;
mbed_official 116:983bd476082e 360 default:
mbed_official 116:983bd476082e 361 serial_pinout_tx((PinName)NC);
mbed_official 116:983bd476082e 362 break;
mbed_official 116:983bd476082e 363 }
bogdanm 0:9b334a45a8ff 364 }
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 //******************************************************************************
bogdanm 0:9b334a45a8ff 367 void serial_pinout_tx(PinName tx)
bogdanm 0:9b334a45a8ff 368 {
bogdanm 0:9b334a45a8ff 369 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 370 }
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372
bogdanm 0:9b334a45a8ff 373 //******************************************************************************
bogdanm 0:9b334a45a8ff 374 void serial_set_flow_control(serial_t *obj, FlowControl type, PinName rxflow, PinName txflow)
bogdanm 0:9b334a45a8ff 375 {
bogdanm 0:9b334a45a8ff 376 if(FlowControlNone == type) {
bogdanm 0:9b334a45a8ff 377 // Disable hardware flow control
bogdanm 0:9b334a45a8ff 378 obj->uart->ctrl &= ~(MXC_F_UART_CTRL_HW_FLOW_CTRL_EN);
bogdanm 0:9b334a45a8ff 379 return;
bogdanm 0:9b334a45a8ff 380 }
bogdanm 0:9b334a45a8ff 381
bogdanm 0:9b334a45a8ff 382 // Check to see if we can use HW flow control
bogdanm 0:9b334a45a8ff 383 UARTName uart_cts = (UARTName)pinmap_peripheral(txflow, PinMap_UART_CTS);
bogdanm 0:9b334a45a8ff 384 UARTName uart_rts = (UARTName)pinmap_peripheral(rxflow, PinMap_UART_RTS);
bogdanm 0:9b334a45a8ff 385 UARTName uart = (UARTName)pinmap_merge(uart_cts, uart_rts);
bogdanm 0:9b334a45a8ff 386
bogdanm 0:9b334a45a8ff 387 if((FlowControlCTS == type) || (FlowControlRTSCTS== type)) {
bogdanm 0:9b334a45a8ff 388 // Make sure pin is in the PinMap
bogdanm 0:9b334a45a8ff 389 MBED_ASSERT(uart_cts != (UARTName)NC);
bogdanm 0:9b334a45a8ff 390
bogdanm 0:9b334a45a8ff 391 // Enable the pin for CTS function
bogdanm 0:9b334a45a8ff 392 pinmap_pinout(txflow, PinMap_UART_CTS);
bogdanm 0:9b334a45a8ff 393 }
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 if((FlowControlRTS == type) || (FlowControlRTSCTS== type)) {
bogdanm 0:9b334a45a8ff 396 // Make sure pin is in the PinMap
bogdanm 0:9b334a45a8ff 397 MBED_ASSERT(uart_rts != (UARTName)NC);
bogdanm 0:9b334a45a8ff 398
bogdanm 0:9b334a45a8ff 399 // Enable the pin for RTS function
bogdanm 0:9b334a45a8ff 400 pinmap_pinout(rxflow, PinMap_UART_RTS);
bogdanm 0:9b334a45a8ff 401 }
bogdanm 0:9b334a45a8ff 402
bogdanm 0:9b334a45a8ff 403 if(FlowControlRTSCTS == type){
bogdanm 0:9b334a45a8ff 404 // Make sure that the pins are pointing to the same UART
bogdanm 0:9b334a45a8ff 405 MBED_ASSERT(uart != (UARTName)NC);
bogdanm 0:9b334a45a8ff 406 }
bogdanm 0:9b334a45a8ff 407
bogdanm 0:9b334a45a8ff 408 // Enable hardware flow control
bogdanm 0:9b334a45a8ff 409 obj->uart->ctrl |= MXC_F_UART_CTRL_HW_FLOW_CTRL_EN;
bogdanm 0:9b334a45a8ff 410 }