Used to control two motors
Fork of MPU6050 by
MPU6050RegDef.h@4:cec6cbc712a3, 2015-07-27 (annotated)
- Committer:
- JessAlcaide
- Date:
- Mon Jul 27 22:25:12 2015 +0000
- Revision:
- 4:cec6cbc712a3
- Parent:
- 3:a173ad187e67
mbed FDRM-KL25Z
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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BaserK | 3:a173ad187e67 | 1 | /* |
BaserK | 3:a173ad187e67 | 2 | * Copyright (c) 2015, Baser Kandehir, baser.kandehir@ieee.metu.edu.tr |
BaserK | 3:a173ad187e67 | 3 | * |
BaserK | 3:a173ad187e67 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
BaserK | 3:a173ad187e67 | 5 | * of this software and associated documentation files (the "Software"), to deal |
BaserK | 3:a173ad187e67 | 6 | * in the Software without restriction, including without limitation the rights |
BaserK | 3:a173ad187e67 | 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
BaserK | 3:a173ad187e67 | 8 | * copies of the Software, and to permit persons to whom the Software is |
BaserK | 3:a173ad187e67 | 9 | * furnished to do so, subject to the following conditions: |
BaserK | 3:a173ad187e67 | 10 | * |
BaserK | 3:a173ad187e67 | 11 | * The above copyright notice and this permission notice shall be included in |
BaserK | 3:a173ad187e67 | 12 | * all copies or substantial portions of the Software. |
BaserK | 3:a173ad187e67 | 13 | * |
BaserK | 3:a173ad187e67 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
BaserK | 3:a173ad187e67 | 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
BaserK | 3:a173ad187e67 | 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
BaserK | 3:a173ad187e67 | 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
BaserK | 3:a173ad187e67 | 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
BaserK | 3:a173ad187e67 | 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
BaserK | 3:a173ad187e67 | 20 | * THE SOFTWARE. |
BaserK | 3:a173ad187e67 | 21 | * |
BaserK | 3:a173ad187e67 | 22 | */ |
BaserK | 3:a173ad187e67 | 23 | |
BaserK | 0:954f15bd95f1 | 24 | // Taken from Kris Winer's MPU6050 library |
BaserK | 0:954f15bd95f1 | 25 | |
BaserK | 0:954f15bd95f1 | 26 | // Define registers per MPU6050, Register Map and Descriptions, Rev 4.2, 08/19/2013 6 DOF Motion sensor fusion device |
BaserK | 0:954f15bd95f1 | 27 | // Invensense Inc., www.invensense.com |
BaserK | 0:954f15bd95f1 | 28 | // See also MPU-6050 Register Map and Descriptions, Revision 4.0, RM-MPU-6050A-00, 9/12/2012 for registers not listed in |
BaserK | 0:954f15bd95f1 | 29 | // above document; the MPU6050 and MPU 9150 are virtually identical but the latter has an on-board magnetic sensor |
BaserK | 0:954f15bd95f1 | 30 | // |
BaserK | 0:954f15bd95f1 | 31 | #define XGOFFS_TC 0x00 // Bit 7 PWR_MODE, bits 6:1 XG_OFFS_TC, bit 0 OTP_BNK_VLD |
BaserK | 0:954f15bd95f1 | 32 | #define YGOFFS_TC 0x01 |
BaserK | 0:954f15bd95f1 | 33 | #define ZGOFFS_TC 0x02 |
BaserK | 0:954f15bd95f1 | 34 | #define X_FINE_GAIN 0x03 // [7:0] fine gain |
BaserK | 0:954f15bd95f1 | 35 | #define Y_FINE_GAIN 0x04 |
BaserK | 0:954f15bd95f1 | 36 | #define Z_FINE_GAIN 0x05 |
BaserK | 0:954f15bd95f1 | 37 | #define XA_OFFSET_H 0x06 // User-defined trim values for accelerometer |
BaserK | 0:954f15bd95f1 | 38 | #define XA_OFFSET_L_TC 0x07 |
BaserK | 0:954f15bd95f1 | 39 | #define YA_OFFSET_H 0x08 |
BaserK | 0:954f15bd95f1 | 40 | #define YA_OFFSET_L_TC 0x09 |
BaserK | 0:954f15bd95f1 | 41 | #define ZA_OFFSET_H 0x0A |
BaserK | 0:954f15bd95f1 | 42 | #define ZA_OFFSET_L_TC 0x0B |
BaserK | 0:954f15bd95f1 | 43 | #define SELF_TEST_X 0x0D |
BaserK | 0:954f15bd95f1 | 44 | #define SELF_TEST_Y 0x0E |
BaserK | 0:954f15bd95f1 | 45 | #define SELF_TEST_Z 0x0F |
BaserK | 0:954f15bd95f1 | 46 | #define SELF_TEST_A 0x10 |
BaserK | 0:954f15bd95f1 | 47 | #define XG_OFFS_USRH 0x13 // User-defined trim values for gyroscope; supported in MPU-6050? |
BaserK | 0:954f15bd95f1 | 48 | #define XG_OFFS_USRL 0x14 |
BaserK | 0:954f15bd95f1 | 49 | #define YG_OFFS_USRH 0x15 |
BaserK | 0:954f15bd95f1 | 50 | #define YG_OFFS_USRL 0x16 |
BaserK | 0:954f15bd95f1 | 51 | #define ZG_OFFS_USRH 0x17 |
BaserK | 0:954f15bd95f1 | 52 | #define ZG_OFFS_USRL 0x18 |
BaserK | 0:954f15bd95f1 | 53 | #define SMPLRT_DIV 0x19 |
BaserK | 0:954f15bd95f1 | 54 | #define CONFIG 0x1A |
BaserK | 0:954f15bd95f1 | 55 | #define GYRO_CONFIG 0x1B |
BaserK | 0:954f15bd95f1 | 56 | #define ACCEL_CONFIG 0x1C |
BaserK | 0:954f15bd95f1 | 57 | #define FF_THR 0x1D // Free-fall |
BaserK | 0:954f15bd95f1 | 58 | #define FF_DUR 0x1E // Free-fall |
BaserK | 0:954f15bd95f1 | 59 | #define MOT_THR 0x1F // Motion detection threshold bits [7:0] |
BaserK | 0:954f15bd95f1 | 60 | #define MOT_DUR 0x20 // Duration counter threshold for motion interrupt generation, 1 kHz rate, LSB = 1 ms |
BaserK | 0:954f15bd95f1 | 61 | #define ZMOT_THR 0x21 // Zero-motion detection threshold bits [7:0] |
BaserK | 0:954f15bd95f1 | 62 | #define ZRMOT_DUR 0x22 // Duration counter threshold for zero motion interrupt generation, 16 Hz rate, LSB = 64 ms |
BaserK | 0:954f15bd95f1 | 63 | #define FIFO_EN 0x23 |
BaserK | 0:954f15bd95f1 | 64 | #define I2C_MST_CTRL 0x24 |
BaserK | 0:954f15bd95f1 | 65 | #define I2C_SLV0_ADDR 0x25 |
BaserK | 0:954f15bd95f1 | 66 | #define I2C_SLV0_REG 0x26 |
BaserK | 0:954f15bd95f1 | 67 | #define I2C_SLV0_CTRL 0x27 |
BaserK | 0:954f15bd95f1 | 68 | #define I2C_SLV1_ADDR 0x28 |
BaserK | 0:954f15bd95f1 | 69 | #define I2C_SLV1_REG 0x29 |
BaserK | 0:954f15bd95f1 | 70 | #define I2C_SLV1_CTRL 0x2A |
BaserK | 0:954f15bd95f1 | 71 | #define I2C_SLV2_ADDR 0x2B |
BaserK | 0:954f15bd95f1 | 72 | #define I2C_SLV2_REG 0x2C |
BaserK | 0:954f15bd95f1 | 73 | #define I2C_SLV2_CTRL 0x2D |
BaserK | 0:954f15bd95f1 | 74 | #define I2C_SLV3_ADDR 0x2E |
BaserK | 0:954f15bd95f1 | 75 | #define I2C_SLV3_REG 0x2F |
BaserK | 0:954f15bd95f1 | 76 | #define I2C_SLV3_CTRL 0x30 |
BaserK | 0:954f15bd95f1 | 77 | #define I2C_SLV4_ADDR 0x31 |
BaserK | 0:954f15bd95f1 | 78 | #define I2C_SLV4_REG 0x32 |
BaserK | 0:954f15bd95f1 | 79 | #define I2C_SLV4_DO 0x33 |
BaserK | 0:954f15bd95f1 | 80 | #define I2C_SLV4_CTRL 0x34 |
BaserK | 0:954f15bd95f1 | 81 | #define I2C_SLV4_DI 0x35 |
BaserK | 0:954f15bd95f1 | 82 | #define I2C_MST_STATUS 0x36 |
BaserK | 0:954f15bd95f1 | 83 | #define INT_PIN_CFG 0x37 |
BaserK | 0:954f15bd95f1 | 84 | #define INT_ENABLE 0x38 |
BaserK | 0:954f15bd95f1 | 85 | #define DMP_INT_STATUS 0x39 // Check DMP interrupt |
BaserK | 0:954f15bd95f1 | 86 | #define INT_STATUS 0x3A |
BaserK | 0:954f15bd95f1 | 87 | #define ACCEL_XOUT_H 0x3B |
BaserK | 0:954f15bd95f1 | 88 | #define ACCEL_XOUT_L 0x3C |
BaserK | 0:954f15bd95f1 | 89 | #define ACCEL_YOUT_H 0x3D |
BaserK | 0:954f15bd95f1 | 90 | #define ACCEL_YOUT_L 0x3E |
BaserK | 0:954f15bd95f1 | 91 | #define ACCEL_ZOUT_H 0x3F |
BaserK | 0:954f15bd95f1 | 92 | #define ACCEL_ZOUT_L 0x40 |
BaserK | 0:954f15bd95f1 | 93 | #define TEMP_OUT_H 0x41 |
BaserK | 0:954f15bd95f1 | 94 | #define TEMP_OUT_L 0x42 |
BaserK | 0:954f15bd95f1 | 95 | #define GYRO_XOUT_H 0x43 |
BaserK | 0:954f15bd95f1 | 96 | #define GYRO_XOUT_L 0x44 |
BaserK | 0:954f15bd95f1 | 97 | #define GYRO_YOUT_H 0x45 |
BaserK | 0:954f15bd95f1 | 98 | #define GYRO_YOUT_L 0x46 |
BaserK | 0:954f15bd95f1 | 99 | #define GYRO_ZOUT_H 0x47 |
BaserK | 0:954f15bd95f1 | 100 | #define GYRO_ZOUT_L 0x48 |
BaserK | 0:954f15bd95f1 | 101 | #define EXT_SENS_DATA_00 0x49 |
BaserK | 0:954f15bd95f1 | 102 | #define EXT_SENS_DATA_01 0x4A |
BaserK | 0:954f15bd95f1 | 103 | #define EXT_SENS_DATA_02 0x4B |
BaserK | 0:954f15bd95f1 | 104 | #define EXT_SENS_DATA_03 0x4C |
BaserK | 0:954f15bd95f1 | 105 | #define EXT_SENS_DATA_04 0x4D |
BaserK | 0:954f15bd95f1 | 106 | #define EXT_SENS_DATA_05 0x4E |
BaserK | 0:954f15bd95f1 | 107 | #define EXT_SENS_DATA_06 0x4F |
BaserK | 0:954f15bd95f1 | 108 | #define EXT_SENS_DATA_07 0x50 |
BaserK | 0:954f15bd95f1 | 109 | #define EXT_SENS_DATA_08 0x51 |
BaserK | 0:954f15bd95f1 | 110 | #define EXT_SENS_DATA_09 0x52 |
BaserK | 0:954f15bd95f1 | 111 | #define EXT_SENS_DATA_10 0x53 |
BaserK | 0:954f15bd95f1 | 112 | #define EXT_SENS_DATA_11 0x54 |
BaserK | 0:954f15bd95f1 | 113 | #define EXT_SENS_DATA_12 0x55 |
BaserK | 0:954f15bd95f1 | 114 | #define EXT_SENS_DATA_13 0x56 |
BaserK | 0:954f15bd95f1 | 115 | #define EXT_SENS_DATA_14 0x57 |
BaserK | 0:954f15bd95f1 | 116 | #define EXT_SENS_DATA_15 0x58 |
BaserK | 0:954f15bd95f1 | 117 | #define EXT_SENS_DATA_16 0x59 |
BaserK | 0:954f15bd95f1 | 118 | #define EXT_SENS_DATA_17 0x5A |
BaserK | 0:954f15bd95f1 | 119 | #define EXT_SENS_DATA_18 0x5B |
BaserK | 0:954f15bd95f1 | 120 | #define EXT_SENS_DATA_19 0x5C |
BaserK | 0:954f15bd95f1 | 121 | #define EXT_SENS_DATA_20 0x5D |
BaserK | 0:954f15bd95f1 | 122 | #define EXT_SENS_DATA_21 0x5E |
BaserK | 0:954f15bd95f1 | 123 | #define EXT_SENS_DATA_22 0x5F |
BaserK | 0:954f15bd95f1 | 124 | #define EXT_SENS_DATA_23 0x60 |
BaserK | 0:954f15bd95f1 | 125 | #define MOT_DETECT_STATUS 0x61 |
BaserK | 0:954f15bd95f1 | 126 | #define I2C_SLV0_DO 0x63 |
BaserK | 0:954f15bd95f1 | 127 | #define I2C_SLV1_DO 0x64 |
BaserK | 0:954f15bd95f1 | 128 | #define I2C_SLV2_DO 0x65 |
BaserK | 0:954f15bd95f1 | 129 | #define I2C_SLV3_DO 0x66 |
BaserK | 0:954f15bd95f1 | 130 | #define I2C_MST_DELAY_CTRL 0x67 |
BaserK | 0:954f15bd95f1 | 131 | #define SIGNAL_PATH_RESET 0x68 |
BaserK | 0:954f15bd95f1 | 132 | #define MOT_DETECT_CTRL 0x69 |
BaserK | 0:954f15bd95f1 | 133 | #define USER_CTRL 0x6A // Bit 7 enable DMP, bit 3 reset DMP |
BaserK | 0:954f15bd95f1 | 134 | #define PWR_MGMT_1 0x6B // Device defaults to the SLEEP mode |
BaserK | 0:954f15bd95f1 | 135 | #define PWR_MGMT_2 0x6C |
BaserK | 0:954f15bd95f1 | 136 | #define DMP_BANK 0x6D // Activates a specific bank in the DMP |
BaserK | 0:954f15bd95f1 | 137 | #define DMP_RW_PNT 0x6E // Set read/write pointer to a specific start address in specified DMP bank |
BaserK | 0:954f15bd95f1 | 138 | #define DMP_REG 0x6F // Register in DMP from which to read or to which to write |
BaserK | 0:954f15bd95f1 | 139 | #define DMP_REG_1 0x70 |
BaserK | 0:954f15bd95f1 | 140 | #define DMP_REG_2 0x71 |
BaserK | 0:954f15bd95f1 | 141 | #define FIFO_COUNTH 0x72 |
BaserK | 0:954f15bd95f1 | 142 | #define FIFO_COUNTL 0x73 |
BaserK | 0:954f15bd95f1 | 143 | #define FIFO_R_W 0x74 |
BaserK | 0:954f15bd95f1 | 144 | #define WHO_AM_I_MPU6050 0x75 // Should return 0x68 |
BaserK | 0:954f15bd95f1 | 145 | |
BaserK | 0:954f15bd95f1 | 146 | // Using the GY-521 breakout board, I set ADO to 0 by grounding through a 4k7 resistor |
BaserK | 0:954f15bd95f1 | 147 | // Seven-bit device address is 110100 for ADO = 0 and 110101 for ADO = 1 |
BaserK | 0:954f15bd95f1 | 148 | #define ADO 0 |
BaserK | 0:954f15bd95f1 | 149 | #if ADO |
BaserK | 0:954f15bd95f1 | 150 | #define MPU6050_ADDRESS 0x69<<1 // Device address when ADO = 1 |
BaserK | 0:954f15bd95f1 | 151 | #else |
BaserK | 0:954f15bd95f1 | 152 | #define MPU6050_ADDRESS 0x68<<1 // Device address when ADO = 0 |
BaserK | 0:954f15bd95f1 | 153 | #endif |