Clone of mbed rtos 2 for easy accessibility.
Fork of mbed-rtos by
rtx/TARGET_CORTEX_M/rt_HAL_CM.h@119:19af2d39a542, 2016-08-10 (annotated)
- Committer:
- Kojto
- Date:
- Wed Aug 10 16:09:20 2016 +0100
- Revision:
- 119:19af2d39a542
- Parent:
- 118:6635230e06ba
- Child:
- 123:58563e6cba1e
RTOS rev119
Compatible with the mbed library v123
Changes:
- new targets: NRF52 and NUC472
- mbed singleton mutex addition
- main thread with timers fix
- Thread - mutex addition for synchronization
- Semaphore - default count argument set to 0
- RTOSTimer - add new ctor with Callback
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 49:77c8e4604045 | 1 | /*---------------------------------------------------------------------------- |
mbed_official | 112:53ace74b190c | 2 | * CMSIS-RTOS - RTX |
mbed_official | 49:77c8e4604045 | 3 | *---------------------------------------------------------------------------- |
mbed_official | 49:77c8e4604045 | 4 | * Name: RT_HAL_CM.H |
mbed_official | 49:77c8e4604045 | 5 | * Purpose: Hardware Abstraction Layer for Cortex-M definitions |
mbed_official | 112:53ace74b190c | 6 | * Rev.: V4.79 |
mbed_official | 49:77c8e4604045 | 7 | *---------------------------------------------------------------------------- |
mbed_official | 49:77c8e4604045 | 8 | * |
mbed_official | 112:53ace74b190c | 9 | * Copyright (c) 1999-2009 KEIL, 2009-2015 ARM Germany GmbH |
mbed_official | 49:77c8e4604045 | 10 | * All rights reserved. |
mbed_official | 49:77c8e4604045 | 11 | * Redistribution and use in source and binary forms, with or without |
mbed_official | 49:77c8e4604045 | 12 | * modification, are permitted provided that the following conditions are met: |
mbed_official | 49:77c8e4604045 | 13 | * - Redistributions of source code must retain the above copyright |
mbed_official | 49:77c8e4604045 | 14 | * notice, this list of conditions and the following disclaimer. |
mbed_official | 49:77c8e4604045 | 15 | * - Redistributions in binary form must reproduce the above copyright |
mbed_official | 49:77c8e4604045 | 16 | * notice, this list of conditions and the following disclaimer in the |
mbed_official | 49:77c8e4604045 | 17 | * documentation and/or other materials provided with the distribution. |
mbed_official | 49:77c8e4604045 | 18 | * - Neither the name of ARM nor the names of its contributors may be used |
mbed_official | 49:77c8e4604045 | 19 | * to endorse or promote products derived from this software without |
mbed_official | 49:77c8e4604045 | 20 | * specific prior written permission. |
mbed_official | 49:77c8e4604045 | 21 | * |
mbed_official | 49:77c8e4604045 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 49:77c8e4604045 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 49:77c8e4604045 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
mbed_official | 49:77c8e4604045 | 25 | * ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE |
mbed_official | 49:77c8e4604045 | 26 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
mbed_official | 49:77c8e4604045 | 27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
mbed_official | 49:77c8e4604045 | 28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
mbed_official | 49:77c8e4604045 | 29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
mbed_official | 49:77c8e4604045 | 30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
mbed_official | 49:77c8e4604045 | 31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
mbed_official | 49:77c8e4604045 | 32 | * POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 49:77c8e4604045 | 33 | *---------------------------------------------------------------------------*/ |
mbed_official | 49:77c8e4604045 | 34 | |
mbed_official | 49:77c8e4604045 | 35 | /* Definitions */ |
mbed_official | 112:53ace74b190c | 36 | #define INITIAL_xPSR 0x01000000U |
mbed_official | 112:53ace74b190c | 37 | #define DEMCR_TRCENA 0x01000000U |
mbed_official | 112:53ace74b190c | 38 | #define ITM_ITMENA 0x00000001U |
mbed_official | 112:53ace74b190c | 39 | #define MAGIC_WORD 0xE25A2EA5U |
mbed_official | 112:53ace74b190c | 40 | #define MAGIC_PATTERN 0xCCCCCCCCU |
mbed_official | 49:77c8e4604045 | 41 | |
mbed_official | 49:77c8e4604045 | 42 | #if defined (__CC_ARM) /* ARM Compiler */ |
mbed_official | 49:77c8e4604045 | 43 | |
mbed_official | 112:53ace74b190c | 44 | #if ((defined(__TARGET_ARCH_7_M) || defined(__TARGET_ARCH_7E_M)) && !defined(NO_EXCLUSIVE_ACCESS)) |
mbed_official | 49:77c8e4604045 | 45 | #define __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 46 | #else |
mbed_official | 49:77c8e4604045 | 47 | #undef __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 48 | #endif |
mbed_official | 49:77c8e4604045 | 49 | |
Kojto | 119:19af2d39a542 | 50 | /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */ |
Kojto | 119:19af2d39a542 | 51 | #ifdef __USE_EXCLUSIVE_ACCESS |
Kojto | 119:19af2d39a542 | 52 | #pragma diag_suppress 3731 |
Kojto | 119:19af2d39a542 | 53 | #endif |
Kojto | 119:19af2d39a542 | 54 | |
mbed_official | 112:53ace74b190c | 55 | #ifndef __CMSIS_GENERIC |
mbed_official | 112:53ace74b190c | 56 | #define __DMB() do {\ |
mbed_official | 112:53ace74b190c | 57 | __schedule_barrier();\ |
mbed_official | 112:53ace74b190c | 58 | __dmb(0xF);\ |
mbed_official | 112:53ace74b190c | 59 | __schedule_barrier();\ |
mbed_official | 112:53ace74b190c | 60 | } while (0) |
mbed_official | 112:53ace74b190c | 61 | #endif |
mbed_official | 112:53ace74b190c | 62 | |
mbed_official | 49:77c8e4604045 | 63 | #elif defined (__GNUC__) /* GNU Compiler */ |
mbed_official | 49:77c8e4604045 | 64 | |
mbed_official | 49:77c8e4604045 | 65 | #undef __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 66 | |
mbed_official | 49:77c8e4604045 | 67 | #if defined (__CORTEX_M0) || defined (__CORTEX_M0PLUS) |
mbed_official | 112:53ace74b190c | 68 | #define __TARGET_ARCH_6S_M |
mbed_official | 49:77c8e4604045 | 69 | #endif |
mbed_official | 49:77c8e4604045 | 70 | |
mbed_official | 49:77c8e4604045 | 71 | #if defined (__VFP_FP__) && !defined(__SOFTFP__) |
mbed_official | 112:53ace74b190c | 72 | #define __TARGET_FPU_VFP |
mbed_official | 49:77c8e4604045 | 73 | #endif |
mbed_official | 49:77c8e4604045 | 74 | |
mbed_official | 49:77c8e4604045 | 75 | #define __inline inline |
mbed_official | 49:77c8e4604045 | 76 | #define __weak __attribute__((weak)) |
mbed_official | 49:77c8e4604045 | 77 | |
mbed_official | 49:77c8e4604045 | 78 | #ifndef __CMSIS_GENERIC |
mbed_official | 49:77c8e4604045 | 79 | |
mbed_official | 49:77c8e4604045 | 80 | __attribute__((always_inline)) static inline void __enable_irq(void) |
mbed_official | 49:77c8e4604045 | 81 | { |
mbed_official | 49:77c8e4604045 | 82 | __asm volatile ("cpsie i"); |
mbed_official | 49:77c8e4604045 | 83 | } |
mbed_official | 49:77c8e4604045 | 84 | |
mbed_official | 49:77c8e4604045 | 85 | __attribute__((always_inline)) static inline U32 __disable_irq(void) |
mbed_official | 49:77c8e4604045 | 86 | { |
mbed_official | 49:77c8e4604045 | 87 | U32 result; |
mbed_official | 49:77c8e4604045 | 88 | |
mbed_official | 49:77c8e4604045 | 89 | __asm volatile ("mrs %0, primask" : "=r" (result)); |
mbed_official | 49:77c8e4604045 | 90 | __asm volatile ("cpsid i"); |
mbed_official | 49:77c8e4604045 | 91 | return(result & 1); |
mbed_official | 49:77c8e4604045 | 92 | } |
mbed_official | 49:77c8e4604045 | 93 | |
mbed_official | 112:53ace74b190c | 94 | __attribute__((always_inline)) static inline void __DMB(void) |
mbed_official | 112:53ace74b190c | 95 | { |
mbed_official | 112:53ace74b190c | 96 | __asm volatile ("dmb 0xF":::"memory"); |
mbed_official | 112:53ace74b190c | 97 | } |
mbed_official | 112:53ace74b190c | 98 | |
mbed_official | 49:77c8e4604045 | 99 | #endif |
mbed_official | 49:77c8e4604045 | 100 | |
mbed_official | 49:77c8e4604045 | 101 | __attribute__(( always_inline)) static inline U8 __clz(U32 value) |
mbed_official | 49:77c8e4604045 | 102 | { |
mbed_official | 49:77c8e4604045 | 103 | U8 result; |
mbed_official | 112:53ace74b190c | 104 | |
mbed_official | 49:77c8e4604045 | 105 | __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value)); |
mbed_official | 49:77c8e4604045 | 106 | return(result); |
mbed_official | 49:77c8e4604045 | 107 | } |
mbed_official | 49:77c8e4604045 | 108 | |
mbed_official | 49:77c8e4604045 | 109 | #elif defined (__ICCARM__) /* IAR Compiler */ |
mbed_official | 49:77c8e4604045 | 110 | |
mbed_official | 49:77c8e4604045 | 111 | #undef __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 112 | |
mbed_official | 49:77c8e4604045 | 113 | #if (__CORE__ == __ARM6M__) |
mbed_official | 49:77c8e4604045 | 114 | #define __TARGET_ARCH_6S_M 1 |
mbed_official | 49:77c8e4604045 | 115 | #endif |
mbed_official | 49:77c8e4604045 | 116 | |
mbed_official | 49:77c8e4604045 | 117 | #if defined __ARMVFP__ |
mbed_official | 49:77c8e4604045 | 118 | #define __TARGET_FPU_VFP 1 |
mbed_official | 49:77c8e4604045 | 119 | #endif |
mbed_official | 49:77c8e4604045 | 120 | |
mbed_official | 49:77c8e4604045 | 121 | #define __inline inline |
mbed_official | 49:77c8e4604045 | 122 | |
mbed_official | 49:77c8e4604045 | 123 | #ifndef __CMSIS_GENERIC |
mbed_official | 49:77c8e4604045 | 124 | |
mbed_official | 49:77c8e4604045 | 125 | static inline void __enable_irq(void) |
mbed_official | 49:77c8e4604045 | 126 | { |
mbed_official | 49:77c8e4604045 | 127 | __asm volatile ("cpsie i"); |
mbed_official | 49:77c8e4604045 | 128 | } |
mbed_official | 49:77c8e4604045 | 129 | |
mbed_official | 49:77c8e4604045 | 130 | static inline U32 __disable_irq(void) |
mbed_official | 49:77c8e4604045 | 131 | { |
mbed_official | 49:77c8e4604045 | 132 | U32 result; |
mbed_official | 112:53ace74b190c | 133 | |
mbed_official | 49:77c8e4604045 | 134 | __asm volatile ("mrs %0, primask" : "=r" (result)); |
mbed_official | 49:77c8e4604045 | 135 | __asm volatile ("cpsid i"); |
mbed_official | 49:77c8e4604045 | 136 | return(result & 1); |
mbed_official | 49:77c8e4604045 | 137 | } |
mbed_official | 49:77c8e4604045 | 138 | |
mbed_official | 49:77c8e4604045 | 139 | #endif |
mbed_official | 49:77c8e4604045 | 140 | |
mbed_official | 49:77c8e4604045 | 141 | static inline U8 __clz(U32 value) |
mbed_official | 49:77c8e4604045 | 142 | { |
mbed_official | 49:77c8e4604045 | 143 | U8 result; |
mbed_official | 112:53ace74b190c | 144 | |
mbed_official | 49:77c8e4604045 | 145 | __asm volatile ("clz %0, %1" : "=r" (result) : "r" (value)); |
mbed_official | 49:77c8e4604045 | 146 | return(result); |
mbed_official | 49:77c8e4604045 | 147 | } |
mbed_official | 49:77c8e4604045 | 148 | |
mbed_official | 49:77c8e4604045 | 149 | #endif |
mbed_official | 49:77c8e4604045 | 150 | |
mbed_official | 49:77c8e4604045 | 151 | /* NVIC registers */ |
mbed_official | 112:53ace74b190c | 152 | #define NVIC_ST_CTRL (*((volatile U32 *)0xE000E010U)) |
mbed_official | 112:53ace74b190c | 153 | #define NVIC_ST_RELOAD (*((volatile U32 *)0xE000E014U)) |
mbed_official | 112:53ace74b190c | 154 | #define NVIC_ST_CURRENT (*((volatile U32 *)0xE000E018U)) |
mbed_official | 112:53ace74b190c | 155 | #define NVIC_ISER ((volatile U32 *)0xE000E100U) |
mbed_official | 112:53ace74b190c | 156 | #define NVIC_ICER ((volatile U32 *)0xE000E180U) |
mbed_official | 112:53ace74b190c | 157 | #if defined(__TARGET_ARCH_6S_M) |
mbed_official | 112:53ace74b190c | 158 | #define NVIC_IP ((volatile U32 *)0xE000E400U) |
mbed_official | 49:77c8e4604045 | 159 | #else |
mbed_official | 112:53ace74b190c | 160 | #define NVIC_IP ((volatile U8 *)0xE000E400U) |
mbed_official | 49:77c8e4604045 | 161 | #endif |
mbed_official | 112:53ace74b190c | 162 | #define NVIC_INT_CTRL (*((volatile U32 *)0xE000ED04U)) |
mbed_official | 112:53ace74b190c | 163 | #define NVIC_AIR_CTRL (*((volatile U32 *)0xE000ED0CU)) |
mbed_official | 112:53ace74b190c | 164 | #define NVIC_SYS_PRI2 (*((volatile U32 *)0xE000ED1CU)) |
mbed_official | 112:53ace74b190c | 165 | #define NVIC_SYS_PRI3 (*((volatile U32 *)0xE000ED20U)) |
mbed_official | 49:77c8e4604045 | 166 | |
mbed_official | 112:53ace74b190c | 167 | #define OS_PEND_IRQ() NVIC_INT_CTRL = (1UL<<28) |
mbed_official | 112:53ace74b190c | 168 | #define OS_PENDING ((NVIC_INT_CTRL >> 26) & 5U) |
mbed_official | 112:53ace74b190c | 169 | #define OS_UNPEND(fl) NVIC_INT_CTRL = (U32)(fl = (U8)OS_PENDING) << 25 |
mbed_official | 112:53ace74b190c | 170 | #define OS_PEND(fl,p) NVIC_INT_CTRL = (U32)(fl | (U8)(p<<2)) << 26 |
mbed_official | 112:53ace74b190c | 171 | #define OS_LOCK() NVIC_ST_CTRL = 0x0005U |
mbed_official | 112:53ace74b190c | 172 | #define OS_UNLOCK() NVIC_ST_CTRL = 0x0007U |
mbed_official | 49:77c8e4604045 | 173 | |
mbed_official | 112:53ace74b190c | 174 | #define OS_X_PENDING ((NVIC_INT_CTRL >> 28) & 1U) |
mbed_official | 112:53ace74b190c | 175 | #define OS_X_UNPEND(fl) NVIC_INT_CTRL = (U32)(fl = (U8)OS_X_PENDING) << 27 |
mbed_official | 112:53ace74b190c | 176 | #define OS_X_PEND(fl,p) NVIC_INT_CTRL = (U32)(fl | p) << 28 |
mbed_official | 112:53ace74b190c | 177 | #if defined(__TARGET_ARCH_6S_M) |
mbed_official | 112:53ace74b190c | 178 | #define OS_X_INIT(n) NVIC_IP[n>>2] |= (U32)0xFFU << ((n & 0x03U) << 3); \ |
mbed_official | 112:53ace74b190c | 179 | NVIC_ISER[n>>5] = (U32)1U << (n & 0x1FU) |
mbed_official | 49:77c8e4604045 | 180 | #else |
mbed_official | 112:53ace74b190c | 181 | #define OS_X_INIT(n) NVIC_IP[n] = 0xFFU; \ |
mbed_official | 112:53ace74b190c | 182 | NVIC_ISER[n>>5] = (U32)1U << (n & 0x1FU) |
mbed_official | 49:77c8e4604045 | 183 | #endif |
mbed_official | 112:53ace74b190c | 184 | #define OS_X_LOCK(n) NVIC_ICER[n>>5] = (U32)1U << (n & 0x1FU) |
mbed_official | 112:53ace74b190c | 185 | #define OS_X_UNLOCK(n) NVIC_ISER[n>>5] = (U32)1U << (n & 0x1FU) |
mbed_official | 49:77c8e4604045 | 186 | |
mbed_official | 49:77c8e4604045 | 187 | /* Core Debug registers */ |
mbed_official | 112:53ace74b190c | 188 | #define DEMCR (*((volatile U32 *)0xE000EDFCU)) |
mbed_official | 49:77c8e4604045 | 189 | |
mbed_official | 49:77c8e4604045 | 190 | /* ITM registers */ |
mbed_official | 112:53ace74b190c | 191 | #define ITM_CONTROL (*((volatile U32 *)0xE0000E80U)) |
mbed_official | 112:53ace74b190c | 192 | #define ITM_ENABLE (*((volatile U32 *)0xE0000E00U)) |
mbed_official | 112:53ace74b190c | 193 | #define ITM_PORT30_U32 (*((volatile U32 *)0xE0000078U)) |
mbed_official | 112:53ace74b190c | 194 | #define ITM_PORT31_U32 (*((volatile U32 *)0xE000007CU)) |
mbed_official | 112:53ace74b190c | 195 | #define ITM_PORT31_U16 (*((volatile U16 *)0xE000007CU)) |
mbed_official | 112:53ace74b190c | 196 | #define ITM_PORT31_U8 (*((volatile U8 *)0xE000007CU)) |
mbed_official | 49:77c8e4604045 | 197 | |
mbed_official | 49:77c8e4604045 | 198 | /* Variables */ |
mbed_official | 49:77c8e4604045 | 199 | extern BIT dbg_msg; |
mbed_official | 49:77c8e4604045 | 200 | |
mbed_official | 49:77c8e4604045 | 201 | /* Functions */ |
mbed_official | 49:77c8e4604045 | 202 | #ifdef __USE_EXCLUSIVE_ACCESS |
mbed_official | 112:53ace74b190c | 203 | #define rt_inc(p) while(__strex((__ldrex(p)+1U),p)) |
mbed_official | 112:53ace74b190c | 204 | #define rt_dec(p) while(__strex((__ldrex(p)-1U),p)) |
mbed_official | 49:77c8e4604045 | 205 | #else |
mbed_official | 49:77c8e4604045 | 206 | #define rt_inc(p) __disable_irq();(*p)++;__enable_irq(); |
mbed_official | 49:77c8e4604045 | 207 | #define rt_dec(p) __disable_irq();(*p)--;__enable_irq(); |
mbed_official | 49:77c8e4604045 | 208 | #endif |
mbed_official | 49:77c8e4604045 | 209 | |
mbed_official | 49:77c8e4604045 | 210 | __inline static U32 rt_inc_qi (U32 size, U8 *count, U8 *first) { |
mbed_official | 49:77c8e4604045 | 211 | U32 cnt,c2; |
mbed_official | 49:77c8e4604045 | 212 | #ifdef __USE_EXCLUSIVE_ACCESS |
mbed_official | 49:77c8e4604045 | 213 | do { |
mbed_official | 49:77c8e4604045 | 214 | if ((cnt = __ldrex(count)) == size) { |
mbed_official | 49:77c8e4604045 | 215 | __clrex(); |
mbed_official | 49:77c8e4604045 | 216 | return (cnt); } |
mbed_official | 112:53ace74b190c | 217 | } while (__strex(cnt+1U, count)); |
mbed_official | 49:77c8e4604045 | 218 | do { |
mbed_official | 112:53ace74b190c | 219 | c2 = (cnt = __ldrex(first)) + 1U; |
mbed_official | 112:53ace74b190c | 220 | if (c2 == size) { c2 = 0U; } |
mbed_official | 49:77c8e4604045 | 221 | } while (__strex(c2, first)); |
mbed_official | 49:77c8e4604045 | 222 | #else |
mbed_official | 49:77c8e4604045 | 223 | __disable_irq(); |
mbed_official | 49:77c8e4604045 | 224 | if ((cnt = *count) < size) { |
mbed_official | 112:53ace74b190c | 225 | *count = (U8)(cnt+1U); |
mbed_official | 112:53ace74b190c | 226 | c2 = (cnt = *first) + 1U; |
mbed_official | 112:53ace74b190c | 227 | if (c2 == size) { c2 = 0U; } |
mbed_official | 112:53ace74b190c | 228 | *first = (U8)c2; |
mbed_official | 49:77c8e4604045 | 229 | } |
mbed_official | 49:77c8e4604045 | 230 | __enable_irq (); |
mbed_official | 49:77c8e4604045 | 231 | #endif |
mbed_official | 49:77c8e4604045 | 232 | return (cnt); |
mbed_official | 49:77c8e4604045 | 233 | } |
mbed_official | 49:77c8e4604045 | 234 | |
mbed_official | 49:77c8e4604045 | 235 | __inline static void rt_systick_init (void) { |
mbed_official | 49:77c8e4604045 | 236 | NVIC_ST_RELOAD = os_trv; |
mbed_official | 112:53ace74b190c | 237 | NVIC_ST_CURRENT = 0U; |
mbed_official | 112:53ace74b190c | 238 | NVIC_ST_CTRL = 0x0007U; |
mbed_official | 112:53ace74b190c | 239 | NVIC_SYS_PRI3 |= 0xFF000000U; |
mbed_official | 112:53ace74b190c | 240 | } |
mbed_official | 112:53ace74b190c | 241 | |
mbed_official | 112:53ace74b190c | 242 | __inline static U32 rt_systick_val (void) { |
mbed_official | 112:53ace74b190c | 243 | return (os_trv - NVIC_ST_CURRENT); |
mbed_official | 112:53ace74b190c | 244 | } |
mbed_official | 112:53ace74b190c | 245 | |
mbed_official | 112:53ace74b190c | 246 | __inline static U32 rt_systick_ovf (void) { |
mbed_official | 112:53ace74b190c | 247 | return ((NVIC_INT_CTRL >> 26) & 1U); |
mbed_official | 49:77c8e4604045 | 248 | } |
mbed_official | 49:77c8e4604045 | 249 | |
mbed_official | 49:77c8e4604045 | 250 | __inline static void rt_svc_init (void) { |
mbed_official | 112:53ace74b190c | 251 | #if !defined(__TARGET_ARCH_6S_M) |
mbed_official | 112:53ace74b190c | 252 | U32 sh,prigroup; |
mbed_official | 49:77c8e4604045 | 253 | #endif |
mbed_official | 112:53ace74b190c | 254 | NVIC_SYS_PRI3 |= 0x00FF0000U; |
mbed_official | 112:53ace74b190c | 255 | #if defined(__TARGET_ARCH_6S_M) |
mbed_official | 112:53ace74b190c | 256 | NVIC_SYS_PRI2 |= (NVIC_SYS_PRI3<<(8+1)) & 0xFC000000U; |
mbed_official | 49:77c8e4604045 | 257 | #else |
mbed_official | 112:53ace74b190c | 258 | sh = 8U - __clz(~((NVIC_SYS_PRI3 << 8) & 0xFF000000U)); |
mbed_official | 112:53ace74b190c | 259 | prigroup = ((NVIC_AIR_CTRL >> 8) & 0x07U); |
mbed_official | 49:77c8e4604045 | 260 | if (prigroup >= sh) { |
mbed_official | 112:53ace74b190c | 261 | sh = prigroup + 1U; |
mbed_official | 49:77c8e4604045 | 262 | } |
Kojto | 118:6635230e06ba | 263 | |
Kojto | 118:6635230e06ba | 264 | /* Only change the SVCall priority if uVisor is not present. */ |
Kojto | 118:6635230e06ba | 265 | #if !(defined(FEATURE_UVISOR) && defined(TARGET_UVISOR_SUPPORTED)) |
mbed_official | 112:53ace74b190c | 266 | NVIC_SYS_PRI2 = ((0xFEFFFFFFU << sh) & 0xFF000000U) | (NVIC_SYS_PRI2 & 0x00FFFFFFU); |
Kojto | 118:6635230e06ba | 267 | #endif /* !(defined(FEATURE_UVISOR) && defined(TARGET_UVISOR_SUPPORTED)) */ |
mbed_official | 49:77c8e4604045 | 268 | #endif |
mbed_official | 49:77c8e4604045 | 269 | } |
mbed_official | 49:77c8e4604045 | 270 | |
mbed_official | 49:77c8e4604045 | 271 | extern void rt_set_PSP (U32 stack); |
mbed_official | 49:77c8e4604045 | 272 | extern U32 rt_get_PSP (void); |
mbed_official | 49:77c8e4604045 | 273 | extern void os_set_env (void); |
mbed_official | 49:77c8e4604045 | 274 | extern void *_alloc_box (void *box_mem); |
mbed_official | 112:53ace74b190c | 275 | extern U32 _free_box (void *box_mem, void *box); |
mbed_official | 49:77c8e4604045 | 276 | |
mbed_official | 49:77c8e4604045 | 277 | extern void rt_init_stack (P_TCB p_TCB, FUNCP task_body); |
mbed_official | 49:77c8e4604045 | 278 | extern void rt_ret_val (P_TCB p_TCB, U32 v0); |
mbed_official | 49:77c8e4604045 | 279 | extern void rt_ret_val2 (P_TCB p_TCB, U32 v0, U32 v1); |
mbed_official | 49:77c8e4604045 | 280 | |
mbed_official | 49:77c8e4604045 | 281 | extern void dbg_init (void); |
mbed_official | 49:77c8e4604045 | 282 | extern void dbg_task_notify (P_TCB p_tcb, BOOL create); |
mbed_official | 49:77c8e4604045 | 283 | extern void dbg_task_switch (U32 task_id); |
mbed_official | 49:77c8e4604045 | 284 | |
mbed_official | 49:77c8e4604045 | 285 | #ifdef DBG_MSG |
mbed_official | 49:77c8e4604045 | 286 | #define DBG_INIT() dbg_init() |
mbed_official | 49:77c8e4604045 | 287 | #define DBG_TASK_NOTIFY(p_tcb,create) if (dbg_msg) dbg_task_notify(p_tcb,create) |
mbed_official | 112:53ace74b190c | 288 | #define DBG_TASK_SWITCH(task_id) if (dbg_msg && (os_tsk.new_tsk!=os_tsk.run)) \ |
mbed_official | 112:53ace74b190c | 289 | dbg_task_switch(task_id) |
mbed_official | 49:77c8e4604045 | 290 | #else |
mbed_official | 49:77c8e4604045 | 291 | #define DBG_INIT() |
mbed_official | 49:77c8e4604045 | 292 | #define DBG_TASK_NOTIFY(p_tcb,create) |
mbed_official | 49:77c8e4604045 | 293 | #define DBG_TASK_SWITCH(task_id) |
mbed_official | 49:77c8e4604045 | 294 | #endif |
mbed_official | 49:77c8e4604045 | 295 | |
mbed_official | 49:77c8e4604045 | 296 | /*---------------------------------------------------------------------------- |
mbed_official | 49:77c8e4604045 | 297 | * end of file |
mbed_official | 49:77c8e4604045 | 298 | *---------------------------------------------------------------------------*/ |