This Automatic mode is the most simple lib for MCU Gear with LPC1114FN28. You don't need to think about Bank.
Dependents: MCUGearALPC1114FN28
Fork of MCUGearA by
MCUGearBaseA.cpp@0:12d93184b350, 2014-03-09 (annotated)
- Committer:
- Info
- Date:
- Sun Mar 09 09:33:14 2014 +0000
- Revision:
- 0:12d93184b350
- Child:
- 1:95255bae41c8
Automatic module changer for MCU Gear. It make circuit each time. You don't need to think about the Bank.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Info | 0:12d93184b350 | 1 | /* MCU Gear Library, only for testing MCUGear without any circuit you connected. |
Info | 0:12d93184b350 | 2 | * Copyright (c) 2013, NestEgg Inc., http://www.mcugear.com/ |
Info | 0:12d93184b350 | 3 | * |
Info | 0:12d93184b350 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
Info | 0:12d93184b350 | 5 | * of this software and associated documentation files (the "Software"), to deal |
Info | 0:12d93184b350 | 6 | * in the Software without restriction, including without limitation the rights |
Info | 0:12d93184b350 | 7 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
Info | 0:12d93184b350 | 8 | * copies of the Software, and to permit persons to whom the Software is |
Info | 0:12d93184b350 | 9 | * furnished to do so, subject to the following conditions: |
Info | 0:12d93184b350 | 10 | * |
Info | 0:12d93184b350 | 11 | * The above copyright notice and this permission notice shall be included in |
Info | 0:12d93184b350 | 12 | * all copies or substantial portions of the Software. |
Info | 0:12d93184b350 | 13 | * |
Info | 0:12d93184b350 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
Info | 0:12d93184b350 | 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
Info | 0:12d93184b350 | 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
Info | 0:12d93184b350 | 17 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
Info | 0:12d93184b350 | 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
Info | 0:12d93184b350 | 19 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
Info | 0:12d93184b350 | 20 | * THE SOFTWARE. |
Info | 0:12d93184b350 | 21 | */ |
Info | 0:12d93184b350 | 22 | |
Info | 0:12d93184b350 | 23 | #include "mbed.h" |
Info | 0:12d93184b350 | 24 | #include "MCUGearBaseA.h" |
Info | 0:12d93184b350 | 25 | |
Info | 0:12d93184b350 | 26 | #if defined TARGET_LPC1768 |
Info | 0:12d93184b350 | 27 | I2C fpga_i2c(p28, p27); |
Info | 0:12d93184b350 | 28 | #endif |
Info | 0:12d93184b350 | 29 | |
Info | 0:12d93184b350 | 30 | #if defined TARGET_KL25Z |
Info | 0:12d93184b350 | 31 | I2C fpga_i2c(PTE0, PTE1); |
Info | 0:12d93184b350 | 32 | #endif |
Info | 0:12d93184b350 | 33 | |
Info | 0:12d93184b350 | 34 | void fpga_write(int dev_adr,unsigned char adr, unsigned char data) { |
Info | 0:12d93184b350 | 35 | char cmd[2]; |
Info | 0:12d93184b350 | 36 | cmd[0] = adr; |
Info | 0:12d93184b350 | 37 | cmd[1] = data; |
Info | 0:12d93184b350 | 38 | fpga_i2c.frequency (FPGA_I2C_CLOCK); |
Info | 0:12d93184b350 | 39 | fpga_i2c.write(dev_adr, cmd, 2); |
Info | 0:12d93184b350 | 40 | |
Info | 0:12d93184b350 | 41 | } |
Info | 0:12d93184b350 | 42 | |
Info | 0:12d93184b350 | 43 | unsigned char fpga_read(int dev_adr,unsigned char adr) { |
Info | 0:12d93184b350 | 44 | char cmd[2]; |
Info | 0:12d93184b350 | 45 | cmd[0] = adr; |
Info | 0:12d93184b350 | 46 | fpga_i2c.write(dev_adr, cmd, 1); |
Info | 0:12d93184b350 | 47 | fpga_i2c.read(dev_adr, cmd, 1); |
Info | 0:12d93184b350 | 48 | return cmd[0]; |
Info | 0:12d93184b350 | 49 | } |
Info | 0:12d93184b350 | 50 | |
Info | 0:12d93184b350 | 51 | void initBase(void){ |
Info | 0:12d93184b350 | 52 | |
Info | 0:12d93184b350 | 53 | // FPGA reg clear |
Info | 0:12d93184b350 | 54 | for (int i=0;i<20;i++) |
Info | 0:12d93184b350 | 55 | fpga_write(FPGA_I2C_ADR,0x80+i,0); |
Info | 0:12d93184b350 | 56 | |
Info | 0:12d93184b350 | 57 | // read FPGA registers |
Info | 0:12d93184b350 | 58 | fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0); |
Info | 0:12d93184b350 | 59 | fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+1); |
Info | 0:12d93184b350 | 60 | fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+2); |
Info | 0:12d93184b350 | 61 | fpga_read(FPGA_I2C_ADR,FPGA_SYSINFO_0+3); |
Info | 0:12d93184b350 | 62 | // FPGA enable |
Info | 0:12d93184b350 | 63 | fpga_write(FPGA_I2C_ADR,FPGA_ENABLE,1); |
Info | 0:12d93184b350 | 64 | } |
Info | 0:12d93184b350 | 65 | |
Info | 0:12d93184b350 | 66 | void I2Cwrite(char addr, char data){ |
Info | 0:12d93184b350 | 67 | |
Info | 0:12d93184b350 | 68 | char cmd[1]; |
Info | 0:12d93184b350 | 69 | cmd[0] = data; |
Info | 0:12d93184b350 | 70 | fpga_i2c.write(addr, cmd, 1); |
Info | 0:12d93184b350 | 71 | //wait(0.01); |
Info | 0:12d93184b350 | 72 | |
Info | 0:12d93184b350 | 73 | } |
Info | 0:12d93184b350 | 74 | |
Info | 0:12d93184b350 | 75 | void changeBank(uint8_t bank){ |
Info | 0:12d93184b350 | 76 | fpga_write(FPGA_I2C_ADR,0x10,bank); |
Info | 0:12d93184b350 | 77 | } |
Info | 0:12d93184b350 | 78 | |
Info | 0:12d93184b350 | 79 | void deleteBank(uint8_t bank){ |
Info | 0:12d93184b350 | 80 | fpga_write(FPGA_I2C_ADR,0x0c,(bank|0x80)); |
Info | 0:12d93184b350 | 81 | fpga_write(FPGA_I2C_ADR,0x10, bank); |
Info | 0:12d93184b350 | 82 | } |
Info | 0:12d93184b350 | 83 | /* |
Info | 0:12d93184b350 | 84 | void startReg(uint8_t bank){ |
Info | 0:12d93184b350 | 85 | fpga_write(FPGA_I2C_ADR,0x0c,bank); |
Info | 0:12d93184b350 | 86 | } |
Info | 0:12d93184b350 | 87 | |
Info | 0:12d93184b350 | 88 | void endReg(uint8_t bank){ |
Info | 0:12d93184b350 | 89 | fpga_write(FPGA_I2C_ADR,0x10, (bank|0x04)); |
Info | 0:12d93184b350 | 90 | } |
Info | 0:12d93184b350 | 91 | */ |
Info | 0:12d93184b350 | 92 | |
Info | 0:12d93184b350 | 93 |