MODSERIAL

Fork of MODSERIAL by Erik -

Committer:
Hooglugt
Date:
Mon Oct 06 12:41:35 2014 +0000
Revision:
37:2e4e3795a093
Parent:
28:76793a84f9e5
er is niks veranderd

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 28:76793a84f9e5 1 #if defined(TARGET_LPC1768)
Sissors 28:76793a84f9e5 2
Sissors 28:76793a84f9e5 3 #define MODSERIAL_IRQ_REG ((LPC_UART_TypeDef*)_base)->IER
Sissors 28:76793a84f9e5 4 #define DISABLE_TX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << 1)
Sissors 28:76793a84f9e5 5 #define DISABLE_RX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << 0)
Sissors 28:76793a84f9e5 6 #define ENABLE_TX_IRQ MODSERIAL_IRQ_REG |= (1UL << 1)
Sissors 28:76793a84f9e5 7 #define ENABLE_RX_IRQ MODSERIAL_IRQ_REG |= (1UL << 0)
Sissors 28:76793a84f9e5 8
Sissors 28:76793a84f9e5 9 #define RESET_TX_FIFO ((LPC_UART_TypeDef*)_base)->FCR |= (1UL<<2)
Sissors 28:76793a84f9e5 10 #define RESET_RX_FIFO ((LPC_UART_TypeDef*)_base)->FCR |= (1UL<<1)
Sissors 28:76793a84f9e5 11
Sissors 28:76793a84f9e5 12 #define MODSERIAL_READ_REG ((LPC_UART_TypeDef*)_base)->RBR
Sissors 28:76793a84f9e5 13 #define MODSERIAL_WRITE_REG ((LPC_UART_TypeDef*)_base)->THR
Sissors 28:76793a84f9e5 14 #define MODSERIAL_READABLE ((((LPC_UART_TypeDef*)_base)->LSR & (1UL<<0)) != 0)
Sissors 28:76793a84f9e5 15 #define MODSERIAL_WRITABLE ((((LPC_UART_TypeDef*)_base)->LSR & (1UL<<5)) != 0)
Sissors 28:76793a84f9e5 16
Sissors 28:76793a84f9e5 17 #define RX_IRQ_ENABLED true
Sissors 28:76793a84f9e5 18 #define TX_IRQ_ENABLED true
Sissors 28:76793a84f9e5 19
Sissors 28:76793a84f9e5 20 #endif