Aukie Hooglugt / MODSERIAL

MODSERIAL

Fork of MODSERIAL by Erik -

Device/MODSERIAL_KL05Z.h@37:2e4e3795a093, 2014-10-06 (annotated)

Committer:
Hooglugt
Date:
Mon Oct 06 12:41:35 2014 +0000
Revision:
37:2e4e3795a093
Parent:
34:e84b8ad1d98b 
er is niks veranderd

Who changed what in which revision?

UserRevisionLine numberNew contents of line
chaegle 34:e84b8ad1d98b 1 #if defined(TARGET_KL05Z)
chaegle 34:e84b8ad1d98b 2
chaegle 34:e84b8ad1d98b 3 #define MODSERIAL_IRQ_REG ((UARTLP_Type*)_base)->C2
chaegle 34:e84b8ad1d98b 4 #define DISABLE_TX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << UARTLP_C2_TIE_SHIFT)
chaegle 34:e84b8ad1d98b 5 #define DISABLE_RX_IRQ MODSERIAL_IRQ_REG &= ~(1UL << UARTLP_C2_RIE_SHIFT)
chaegle 34:e84b8ad1d98b 6 #define ENABLE_TX_IRQ MODSERIAL_IRQ_REG |= (1UL << UARTLP_C2_TIE_SHIFT)
chaegle 34:e84b8ad1d98b 7 #define ENABLE_RX_IRQ MODSERIAL_IRQ_REG |= (1UL << UARTLP_C2_RIE_SHIFT)
chaegle 34:e84b8ad1d98b 8
chaegle 34:e84b8ad1d98b 9 #define MODSERIAL_READ_REG ((UARTLP_Type*)_base)->D
chaegle 34:e84b8ad1d98b 10 #define MODSERIAL_WRITE_REG ((UARTLP_Type*)_base)->D
chaegle 34:e84b8ad1d98b 11 #define MODSERIAL_READABLE ((((UARTLP_Type*)_base)->S1 & (1UL<<5)) != 0)
chaegle 34:e84b8ad1d98b 12 #define MODSERIAL_WRITABLE ((((UARTLP_Type*)_base)->S1 & (1UL<<7)) != 0)
chaegle 34:e84b8ad1d98b 13
chaegle 34:e84b8ad1d98b 14 #define RESET_TX_FIFO while(0 == 1)
chaegle 34:e84b8ad1d98b 15 #define RESET_RX_FIFO while(MODSERIAL_READABLE) char dummy = MODSERIAL_READ_REG
chaegle 34:e84b8ad1d98b 16
chaegle 34:e84b8ad1d98b 17 #define RX_IRQ_ENABLED ((MODSERIAL_IRQ_REG & (1UL << UARTLP_C2_RIE_SHIFT)) != 0 )
chaegle 34:e84b8ad1d98b 18 #define TX_IRQ_ENABLED ((MODSERIAL_IRQ_REG & (1UL << UARTLP_C2_TIE_SHIFT)) != 0 )
chaegle 34:e84b8ad1d98b 19
chaegle 34:e84b8ad1d98b 20 #endif