Modules
	Configuration_of_CMSIS
	Device_Peripheral_Registers
Enumerations
enum	IRQn_Type { Reset_IRQn = -15, NonMaskableInt_IRQn = -14, HardFault_IRQn = -13, SVCall_IRQn = -5, DebugMonitor_IRQn = -4, PendSV_IRQn = -2, SysTick_IRQn = -1, POWER_CLOCK_IRQn = 0, RADIO_IRQn = 1, UART0_IRQn = 2, SPI0_TWI0_IRQn = 3, SPI1_TWI1_IRQn = 4, GPIOTE_IRQn = 6, ADC_IRQn = 7, TIMER0_IRQn = 8, TIMER1_IRQn = 9, TIMER2_IRQn = 10, RTC0_IRQn = 11, TEMP_IRQn = 12, RNG_IRQn = 13, ECB_IRQn = 14, CCM_AAR_IRQn = 15, WDT_IRQn = 16, RTC1_IRQn = 17, QDEC_IRQn = 18, LPCOMP_IRQn = 19, SWI0_IRQn = 20, SWI1_IRQn = 21, SWI2_IRQn = 22, SWI3_IRQn = 23, SWI4_IRQn = 24, SWI5_IRQn = 25 }

Enumeration Type Documentation

Enumerator:

Reset_IRQn	1 Reset Vector, invoked on Power up and warm reset
NonMaskableInt_IRQn	2 Non maskable Interrupt, cannot be stopped or preempted
HardFault_IRQn	3 Hard Fault, all classes of Fault
SVCall_IRQn	11 System Service Call via SVC instruction
DebugMonitor_IRQn	12 Debug Monitor
PendSV_IRQn	14 Pendable request for system service
SysTick_IRQn	15 System Tick Timer
POWER_CLOCK_IRQn	0 POWER_CLOCK
RADIO_IRQn	1 RADIO
UART0_IRQn	2 UART0
SPI0_TWI0_IRQn	3 SPI0_TWI0
SPI1_TWI1_IRQn	4 SPI1_TWI1
GPIOTE_IRQn	6 GPIOTE
ADC_IRQn	7 ADC
TIMER0_IRQn	8 TIMER0
TIMER1_IRQn	9 TIMER1
TIMER2_IRQn	10 TIMER2
RTC0_IRQn	11 RTC0
TEMP_IRQn	12 TEMP
RNG_IRQn	13 RNG
ECB_IRQn	14 ECB
CCM_AAR_IRQn	15 CCM_AAR
WDT_IRQn	16 WDT
RTC1_IRQn	17 RTC1
QDEC_IRQn	18 QDEC
LPCOMP_IRQn	19 LPCOMP
SWI0_IRQn	20 SWI0
SWI1_IRQn	21 SWI1
SWI2_IRQn	22 SWI2
SWI3_IRQn	23 SWI3
SWI4_IRQn	24 SWI4
SWI5_IRQn	25 SWI5

Definition at line 65 of file nrf51.h.

Nrf51
[Semiconductor]