Takao Aratani / SDHCFileSystem_ChanNFSSD

mbed Revision 38 SDHC 4GB

Dependencies:   ChaNFS

Dependents:   WebCamera_SD

Fork of ChaNFSSD by Stefan Mueller

SDHCFileSystem.cpp@1:311fcc5058b3, 2013-02-10 (annotated)

Committer:
Dromar
Date:
Sun Feb 10 15:25:02 2013 +0000
Revision:
1:311fcc5058b3
ChanNFSSD?SDHCFileSystem??????????; mbed?Revision38???????????

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Dromar 1:311fcc5058b3 1 /* mbed SDFileSystem Library, for providing file access to SD cards
Dromar 1:311fcc5058b3 2 * Copyright (c) 2008-2010, sford
Dromar 1:311fcc5058b3 3 *
Dromar 1:311fcc5058b3 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
Dromar 1:311fcc5058b3 5 * of this software and associated documentation files (the "Software"), to deal
Dromar 1:311fcc5058b3 6 * in the Software without restriction, including without limitation the rights
Dromar 1:311fcc5058b3 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
Dromar 1:311fcc5058b3 8 * copies of the Software, and to permit persons to whom the Software is
Dromar 1:311fcc5058b3 9 * furnished to do so, subject to the following conditions:
Dromar 1:311fcc5058b3 10 *
Dromar 1:311fcc5058b3 11 * The above copyright notice and this permission notice shall be included in
Dromar 1:311fcc5058b3 12 * all copies or substantial portions of the Software.
Dromar 1:311fcc5058b3 13 *
Dromar 1:311fcc5058b3 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
Dromar 1:311fcc5058b3 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
Dromar 1:311fcc5058b3 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
Dromar 1:311fcc5058b3 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
Dromar 1:311fcc5058b3 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Dromar 1:311fcc5058b3 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
Dromar 1:311fcc5058b3 20 * THE SOFTWARE.
Dromar 1:311fcc5058b3 21 */
Dromar 1:311fcc5058b3 22
Dromar 1:311fcc5058b3 23 /* Introduction
Dromar 1:311fcc5058b3 24 * ------------
Dromar 1:311fcc5058b3 25 * SD and MMC cards support a number of interfaces, but common to them all
Dromar 1:311fcc5058b3 26 * is one based on SPI. This is the one I'm implmenting because it means
Dromar 1:311fcc5058b3 27 * it is much more portable even though not so performant, and we already
Dromar 1:311fcc5058b3 28 * have the mbed SPI Interface!
Dromar 1:311fcc5058b3 29 *
Dromar 1:311fcc5058b3 30 * The main reference I'm using is Chapter 7, "SPI Mode" of:
Dromar 1:311fcc5058b3 31 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
Dromar 1:311fcc5058b3 32 *
Dromar 1:311fcc5058b3 33 * SPI Startup
Dromar 1:311fcc5058b3 34 * -----------
Dromar 1:311fcc5058b3 35 * The SD card powers up in SD mode. The SPI interface mode is selected by
Dromar 1:311fcc5058b3 36 * asserting CS low and sending the reset command (CMD0). The card will
Dromar 1:311fcc5058b3 37 * respond with a (R1) response.
Dromar 1:311fcc5058b3 38 *
Dromar 1:311fcc5058b3 39 * CMD8 is optionally sent to determine the voltage range supported, and
Dromar 1:311fcc5058b3 40 * indirectly determine whether it is a version 1.x SD/non-SD card or
Dromar 1:311fcc5058b3 41 * version 2.x. I'll just ignore this for now.
Dromar 1:311fcc5058b3 42 *
Dromar 1:311fcc5058b3 43 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
Dromar 1:311fcc5058b3 44 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
Dromar 1:311fcc5058b3 45 *
Dromar 1:311fcc5058b3 46 * You should also indicate whether the host supports High Capicity cards,
Dromar 1:311fcc5058b3 47 * and check whether the card is high capacity - i'll also ignore this
Dromar 1:311fcc5058b3 48 *
Dromar 1:311fcc5058b3 49 * SPI Protocol
Dromar 1:311fcc5058b3 50 * ------------
Dromar 1:311fcc5058b3 51 * The SD SPI protocol is based on transactions made up of 8-bit words, with
Dromar 1:311fcc5058b3 52 * the host starting every bus transaction by asserting the CS signal low. The
Dromar 1:311fcc5058b3 53 * card always responds to commands, data blocks and errors.
Dromar 1:311fcc5058b3 54 *
Dromar 1:311fcc5058b3 55 * The protocol supports a CRC, but by default it is off (except for the
Dromar 1:311fcc5058b3 56 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
Dromar 1:311fcc5058b3 57 * I'll leave the CRC off I think!
Dromar 1:311fcc5058b3 58 *
Dromar 1:311fcc5058b3 59 * Standard capacity cards have variable data block sizes, whereas High
Dromar 1:311fcc5058b3 60 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
Dromar 1:311fcc5058b3 61 * just always use the Standard Capacity cards with a block size of 512 bytes.
Dromar 1:311fcc5058b3 62 * This is set with CMD16.
Dromar 1:311fcc5058b3 63 *
Dromar 1:311fcc5058b3 64 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
Dromar 1:311fcc5058b3 65 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
Dromar 1:311fcc5058b3 66 * the card gets a read command, it responds with a response token, and then
Dromar 1:311fcc5058b3 67 * a data token or an error.
Dromar 1:311fcc5058b3 68 *
Dromar 1:311fcc5058b3 69 * SPI Command Format
Dromar 1:311fcc5058b3 70 * ------------------
Dromar 1:311fcc5058b3 71 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
Dromar 1:311fcc5058b3 72 *
Dromar 1:311fcc5058b3 73 * +---------------+------------+------------+-----------+----------+--------------+
Dromar 1:311fcc5058b3 74 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
Dromar 1:311fcc5058b3 75 * +---------------+------------+------------+-----------+----------+--------------+
Dromar 1:311fcc5058b3 76 *
Dromar 1:311fcc5058b3 77 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
Dromar 1:311fcc5058b3 78 *
Dromar 1:311fcc5058b3 79 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
Dromar 1:311fcc5058b3 80 *
Dromar 1:311fcc5058b3 81 * SPI Response Format
Dromar 1:311fcc5058b3 82 * -------------------
Dromar 1:311fcc5058b3 83 * The main response format (R1) is a status byte (normally zero). Key flags:
Dromar 1:311fcc5058b3 84 * idle - 1 if the card is in an idle state/initialising
Dromar 1:311fcc5058b3 85 * cmd - 1 if an illegal command code was detected
Dromar 1:311fcc5058b3 86 *
Dromar 1:311fcc5058b3 87 * +-------------------------------------------------+
Dromar 1:311fcc5058b3 88 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
Dromar 1:311fcc5058b3 89 * +-------------------------------------------------+
Dromar 1:311fcc5058b3 90 *
Dromar 1:311fcc5058b3 91 * R1b is the same, except it is followed by a busy signal (zeros) until
Dromar 1:311fcc5058b3 92 * the first non-zero byte when it is ready again.
Dromar 1:311fcc5058b3 93 *
Dromar 1:311fcc5058b3 94 * Data Response Token
Dromar 1:311fcc5058b3 95 * -------------------
Dromar 1:311fcc5058b3 96 * Every data block written to the card is acknowledged by a byte
Dromar 1:311fcc5058b3 97 * response token
Dromar 1:311fcc5058b3 98 *
Dromar 1:311fcc5058b3 99 * +----------------------+
Dromar 1:311fcc5058b3 100 * | xxx | 0 | status | 1 |
Dromar 1:311fcc5058b3 101 * +----------------------+
Dromar 1:311fcc5058b3 102 * 010 - OK!
Dromar 1:311fcc5058b3 103 * 101 - CRC Error
Dromar 1:311fcc5058b3 104 * 110 - Write Error
Dromar 1:311fcc5058b3 105 *
Dromar 1:311fcc5058b3 106 * Single Block Read and Write
Dromar 1:311fcc5058b3 107 * ---------------------------
Dromar 1:311fcc5058b3 108 *
Dromar 1:311fcc5058b3 109 * Block transfers have a byte header, followed by the data, followed
Dromar 1:311fcc5058b3 110 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
Dromar 1:311fcc5058b3 111 *
Dromar 1:311fcc5058b3 112 * +------+---------+---------+- - - -+---------+-----------+----------+
Dromar 1:311fcc5058b3 113 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
Dromar 1:311fcc5058b3 114 * +------+---------+---------+- - - -+---------+-----------+----------+
Dromar 1:311fcc5058b3 115 */
Dromar 1:311fcc5058b3 116
Dromar 1:311fcc5058b3 117 /*
Dromar 1:311fcc5058b3 118 * Comment: Changes for SDHC support till 32GB
Dromar 1:311fcc5058b3 119 * Name: KB
Dromar 1:311fcc5058b3 120 * Date: 07/24/2010
Dromar 1:311fcc5058b3 121 * Release: 0.1
Dromar 1:311fcc5058b3 122 */
Dromar 1:311fcc5058b3 123
Dromar 1:311fcc5058b3 124 #include "SDHCFileSystem.h"
Dromar 1:311fcc5058b3 125
Dromar 1:311fcc5058b3 126 #define DEBUG
Dromar 1:311fcc5058b3 127 #define SD_COMMAND_TIMEOUT 5000
Dromar 1:311fcc5058b3 128
Dromar 1:311fcc5058b3 129
Dromar 1:311fcc5058b3 130 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
Dromar 1:311fcc5058b3 131 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs) {
Dromar 1:311fcc5058b3 132 _cs = 1;
Dromar 1:311fcc5058b3 133 }
Dromar 1:311fcc5058b3 134
Dromar 1:311fcc5058b3 135 #define R1_IDLE_STATE (1 << 0)
Dromar 1:311fcc5058b3 136 #define R1_ERASE_RESET (1 << 1)
Dromar 1:311fcc5058b3 137 #define R1_ILLEGAL_COMMAND (1 << 2)
Dromar 1:311fcc5058b3 138 #define R1_COM_CRC_ERROR (1 << 3)
Dromar 1:311fcc5058b3 139 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
Dromar 1:311fcc5058b3 140 #define R1_ADDRESS_ERROR (1 << 5)
Dromar 1:311fcc5058b3 141 #define R1_PARAMETER_ERROR (1 << 6)
Dromar 1:311fcc5058b3 142
Dromar 1:311fcc5058b3 143 // Types
Dromar 1:311fcc5058b3 144 // - v1.x Standard Capacity
Dromar 1:311fcc5058b3 145 // - v2.x Standard Capacity
Dromar 1:311fcc5058b3 146 // - v2.x High Capacity
Dromar 1:311fcc5058b3 147 // - Not recognised as an SD Card
Dromar 1:311fcc5058b3 148
Dromar 1:311fcc5058b3 149 #define SDCARD_FAIL 0
Dromar 1:311fcc5058b3 150 #define SDCARD_V1 1
Dromar 1:311fcc5058b3 151 #define SDCARD_V2 2
Dromar 1:311fcc5058b3 152 #define SDCARD_V2HC 3
Dromar 1:311fcc5058b3 153
Dromar 1:311fcc5058b3 154 int SDFileSystem::initialise_card() {
Dromar 1:311fcc5058b3 155 // Set to 100kHz for initialisation, and clock card with cs = 1
Dromar 1:311fcc5058b3 156 _spi.frequency(100000);
Dromar 1:311fcc5058b3 157 _cs = 1;
Dromar 1:311fcc5058b3 158 for(int i=0; i<16; i++) {
Dromar 1:311fcc5058b3 159 _spi.write(0xFF);
Dromar 1:311fcc5058b3 160 }
Dromar 1:311fcc5058b3 161
Dromar 1:311fcc5058b3 162 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
Dromar 1:311fcc5058b3 163 if(_cmd(0, 0) != R1_IDLE_STATE) {
Dromar 1:311fcc5058b3 164 fprintf(stderr, "No disk, or could not put SD card in to SPI idle state\n");
Dromar 1:311fcc5058b3 165 return SDCARD_FAIL;
Dromar 1:311fcc5058b3 166 }
Dromar 1:311fcc5058b3 167
Dromar 1:311fcc5058b3 168 // send CMD8 to determine whther it is ver 2.x
Dromar 1:311fcc5058b3 169 int r = _cmd8();
Dromar 1:311fcc5058b3 170 if(r == R1_IDLE_STATE) {
Dromar 1:311fcc5058b3 171 return initialise_card_v2();
Dromar 1:311fcc5058b3 172 } else if(r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
Dromar 1:311fcc5058b3 173 return initialise_card_v1();
Dromar 1:311fcc5058b3 174 } else {
Dromar 1:311fcc5058b3 175 fprintf(stderr, "Not in idle state after sending CMD8 (not an SD card?)\n");
Dromar 1:311fcc5058b3 176 return SDCARD_FAIL;
Dromar 1:311fcc5058b3 177 }
Dromar 1:311fcc5058b3 178 }
Dromar 1:311fcc5058b3 179
Dromar 1:311fcc5058b3 180 int SDFileSystem::initialise_card_v1() {
Dromar 1:311fcc5058b3 181 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dromar 1:311fcc5058b3 182 _cmd(55, 0);
Dromar 1:311fcc5058b3 183 if(_cmd(41, 0) == 0) {
Dromar 1:311fcc5058b3 184 cdv = 512;
Dromar 1:311fcc5058b3 185 #ifdef DEBUG
Dromar 1:311fcc5058b3 186 printf("\n\rInit: SEDCARD_V1\n\r");
Dromar 1:311fcc5058b3 187 #endif
Dromar 1:311fcc5058b3 188 return SDCARD_V1;
Dromar 1:311fcc5058b3 189 }
Dromar 1:311fcc5058b3 190 }
Dromar 1:311fcc5058b3 191
Dromar 1:311fcc5058b3 192 fprintf(stderr, "Timeout waiting for v1.x card\n");
Dromar 1:311fcc5058b3 193 return SDCARD_FAIL;
Dromar 1:311fcc5058b3 194 }
Dromar 1:311fcc5058b3 195
Dromar 1:311fcc5058b3 196 int SDFileSystem::initialise_card_v2() {
Dromar 1:311fcc5058b3 197
Dromar 1:311fcc5058b3 198 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dromar 1:311fcc5058b3 199 wait_ms(50);
Dromar 1:311fcc5058b3 200 _cmd58();
Dromar 1:311fcc5058b3 201 _cmd(55, 0);
Dromar 1:311fcc5058b3 202 if(_cmd(41, 0x40000000) == 0) {
Dromar 1:311fcc5058b3 203 _cmd58();
Dromar 1:311fcc5058b3 204 #ifdef DEBUG
Dromar 1:311fcc5058b3 205 printf("\n\rInit: SDCARD_V2\n\r");
Dromar 1:311fcc5058b3 206 #endif
Dromar 1:311fcc5058b3 207 cdv = 1;
Dromar 1:311fcc5058b3 208 return SDCARD_V2;
Dromar 1:311fcc5058b3 209 }
Dromar 1:311fcc5058b3 210 }
Dromar 1:311fcc5058b3 211
Dromar 1:311fcc5058b3 212 fprintf(stderr, "Timeout waiting for v2.x card\n");
Dromar 1:311fcc5058b3 213 return SDCARD_FAIL;
Dromar 1:311fcc5058b3 214 }
Dromar 1:311fcc5058b3 215
Dromar 1:311fcc5058b3 216 int SDFileSystem::disk_initialize() {
Dromar 1:311fcc5058b3 217
Dromar 1:311fcc5058b3 218 int i = initialise_card();
Dromar 1:311fcc5058b3 219 #ifdef DEBUG
Dromar 1:311fcc5058b3 220 printf("init card = %d\n", i);
Dromar 1:311fcc5058b3 221 #endif
Dromar 1:311fcc5058b3 222 _sectors = _sd_sectors();
Dromar 1:311fcc5058b3 223
Dromar 1:311fcc5058b3 224 // Set block length to 512 (CMD16)
Dromar 1:311fcc5058b3 225 if(_cmd(16, 512) != 0) {
Dromar 1:311fcc5058b3 226 fprintf(stderr, "Set 512-byte block timed out\n");
Dromar 1:311fcc5058b3 227 return 1;
Dromar 1:311fcc5058b3 228 }
Dromar 1:311fcc5058b3 229
Dromar 1:311fcc5058b3 230 _spi.frequency(1000000); // Set to 1MHz for data transfer
Dromar 1:311fcc5058b3 231 return 0;
Dromar 1:311fcc5058b3 232 }
Dromar 1:311fcc5058b3 233
Dromar 1:311fcc5058b3 234 int SDFileSystem::disk_write(const char *buffer, int block_number) {
Dromar 1:311fcc5058b3 235 // set write address for single block (CMD24)
Dromar 1:311fcc5058b3 236 if(_cmd(24, block_number * cdv) != 0) {
Dromar 1:311fcc5058b3 237 return 1;
Dromar 1:311fcc5058b3 238 }
Dromar 1:311fcc5058b3 239
Dromar 1:311fcc5058b3 240 // send the data block
Dromar 1:311fcc5058b3 241 _write(buffer, 512);
Dromar 1:311fcc5058b3 242 return 0;
Dromar 1:311fcc5058b3 243 }
Dromar 1:311fcc5058b3 244
Dromar 1:311fcc5058b3 245 int SDFileSystem::disk_read(char *buffer, int block_number) {
Dromar 1:311fcc5058b3 246 // set read address for single block (CMD17)
Dromar 1:311fcc5058b3 247 if(_cmd(17, block_number * cdv) != 0) {
Dromar 1:311fcc5058b3 248 return 1;
Dromar 1:311fcc5058b3 249 }
Dromar 1:311fcc5058b3 250
Dromar 1:311fcc5058b3 251 // receive the data
Dromar 1:311fcc5058b3 252 _read(buffer, 512);
Dromar 1:311fcc5058b3 253 return 0;
Dromar 1:311fcc5058b3 254 }
Dromar 1:311fcc5058b3 255
Dromar 1:311fcc5058b3 256 int SDFileSystem::disk_status() { return 0; }
Dromar 1:311fcc5058b3 257 int SDFileSystem::disk_sync() { return 0; }
Dromar 1:311fcc5058b3 258 int SDFileSystem::disk_sectors() { return _sectors; }
Dromar 1:311fcc5058b3 259
Dromar 1:311fcc5058b3 260 // PRIVATE FUNCTIONS
Dromar 1:311fcc5058b3 261
Dromar 1:311fcc5058b3 262 int SDFileSystem::_cmd(int cmd, int arg) {
Dromar 1:311fcc5058b3 263 _cs = 0;
Dromar 1:311fcc5058b3 264
Dromar 1:311fcc5058b3 265 // send a command
Dromar 1:311fcc5058b3 266 _spi.write(0x40 | cmd);
Dromar 1:311fcc5058b3 267 _spi.write(arg >> 24);
Dromar 1:311fcc5058b3 268 _spi.write(arg >> 16);
Dromar 1:311fcc5058b3 269 _spi.write(arg >> 8);
Dromar 1:311fcc5058b3 270 _spi.write(arg >> 0);
Dromar 1:311fcc5058b3 271 _spi.write(0x95);
Dromar 1:311fcc5058b3 272
Dromar 1:311fcc5058b3 273 // wait for the repsonse (response[7] == 0)
Dromar 1:311fcc5058b3 274 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dromar 1:311fcc5058b3 275 int response = _spi.write(0xFF);
Dromar 1:311fcc5058b3 276 if(!(response & 0x80)) {
Dromar 1:311fcc5058b3 277 _cs = 1;
Dromar 1:311fcc5058b3 278 _spi.write(0xFF);
Dromar 1:311fcc5058b3 279 return response;
Dromar 1:311fcc5058b3 280 }
Dromar 1:311fcc5058b3 281 }
Dromar 1:311fcc5058b3 282 _cs = 1;
Dromar 1:311fcc5058b3 283 _spi.write(0xFF);
Dromar 1:311fcc5058b3 284 return -1; // timeout
Dromar 1:311fcc5058b3 285 }
Dromar 1:311fcc5058b3 286 int SDFileSystem::_cmdx(int cmd, int arg) {
Dromar 1:311fcc5058b3 287 _cs = 0;
Dromar 1:311fcc5058b3 288
Dromar 1:311fcc5058b3 289 // send a command
Dromar 1:311fcc5058b3 290 _spi.write(0x40 | cmd);
Dromar 1:311fcc5058b3 291 _spi.write(arg >> 24);
Dromar 1:311fcc5058b3 292 _spi.write(arg >> 16);
Dromar 1:311fcc5058b3 293 _spi.write(arg >> 8);
Dromar 1:311fcc5058b3 294 _spi.write(arg >> 0);
Dromar 1:311fcc5058b3 295 _spi.write(0x95);
Dromar 1:311fcc5058b3 296
Dromar 1:311fcc5058b3 297 // wait for the repsonse (response[7] == 0)
Dromar 1:311fcc5058b3 298 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dromar 1:311fcc5058b3 299 int response = _spi.write(0xFF);
Dromar 1:311fcc5058b3 300 if(!(response & 0x80)) {
Dromar 1:311fcc5058b3 301 return response;
Dromar 1:311fcc5058b3 302 }
Dromar 1:311fcc5058b3 303 }
Dromar 1:311fcc5058b3 304 _cs = 1;
Dromar 1:311fcc5058b3 305 _spi.write(0xFF);
Dromar 1:311fcc5058b3 306 return -1; // timeout
Dromar 1:311fcc5058b3 307 }
Dromar 1:311fcc5058b3 308
Dromar 1:311fcc5058b3 309
Dromar 1:311fcc5058b3 310 int SDFileSystem::_cmd58() {
Dromar 1:311fcc5058b3 311 _cs = 0;
Dromar 1:311fcc5058b3 312 int arg = 0;
Dromar 1:311fcc5058b3 313
Dromar 1:311fcc5058b3 314 // send a command
Dromar 1:311fcc5058b3 315 _spi.write(0x40 | 58);
Dromar 1:311fcc5058b3 316 _spi.write(arg >> 24);
Dromar 1:311fcc5058b3 317 _spi.write(arg >> 16);
Dromar 1:311fcc5058b3 318 _spi.write(arg >> 8);
Dromar 1:311fcc5058b3 319 _spi.write(arg >> 0);
Dromar 1:311fcc5058b3 320 _spi.write(0x95);
Dromar 1:311fcc5058b3 321
Dromar 1:311fcc5058b3 322 // wait for the repsonse (response[7] == 0)
Dromar 1:311fcc5058b3 323 for(int i=0; i<SD_COMMAND_TIMEOUT; i++) {
Dromar 1:311fcc5058b3 324 int response = _spi.write(0xFF);
Dromar 1:311fcc5058b3 325 if(!(response & 0x80)) {
Dromar 1:311fcc5058b3 326 int ocr = _spi.write(0xFF) << 24;
Dromar 1:311fcc5058b3 327 ocr |= _spi.write(0xFF) << 16;
Dromar 1:311fcc5058b3 328 ocr |= _spi.write(0xFF) << 8;
Dromar 1:311fcc5058b3 329 ocr |= _spi.write(0xFF) << 0;
Dromar 1:311fcc5058b3 330 // printf("OCR = 0x%08X\n", ocr);
Dromar 1:311fcc5058b3 331 _cs = 1;
Dromar 1:311fcc5058b3 332 _spi.write(0xFF);
Dromar 1:311fcc5058b3 333 return response;
Dromar 1:311fcc5058b3 334 }
Dromar 1:311fcc5058b3 335 }
Dromar 1:311fcc5058b3 336 _cs = 1;
Dromar 1:311fcc5058b3 337 _spi.write(0xFF);
Dromar 1:311fcc5058b3 338 return -1; // timeout
Dromar 1:311fcc5058b3 339 }
Dromar 1:311fcc5058b3 340
Dromar 1:311fcc5058b3 341 int SDFileSystem::_cmd8() {
Dromar 1:311fcc5058b3 342 _cs = 0;
Dromar 1:311fcc5058b3 343
Dromar 1:311fcc5058b3 344 // send a command
Dromar 1:311fcc5058b3 345 _spi.write(0x40 | 8); // CMD8
Dromar 1:311fcc5058b3 346 _spi.write(0x00); // reserved
Dromar 1:311fcc5058b3 347 _spi.write(0x00); // reserved
Dromar 1:311fcc5058b3 348 _spi.write(0x01); // 3.3v
Dromar 1:311fcc5058b3 349 _spi.write(0xAA); // check pattern
Dromar 1:311fcc5058b3 350 _spi.write(0x87); // crc
Dromar 1:311fcc5058b3 351
Dromar 1:311fcc5058b3 352 // wait for the repsonse (response[7] == 0)
Dromar 1:311fcc5058b3 353 for(int i=0; i<SD_COMMAND_TIMEOUT * 1000; i++) {
Dromar 1:311fcc5058b3 354 char response[5];
Dromar 1:311fcc5058b3 355 response[0] = _spi.write(0xFF);
Dromar 1:311fcc5058b3 356 if(!(response[0] & 0x80)) {
Dromar 1:311fcc5058b3 357 for(int j=1; j<5; j++) {
Dromar 1:311fcc5058b3 358 response[i] = _spi.write(0xFF);
Dromar 1:311fcc5058b3 359 }
Dromar 1:311fcc5058b3 360 _cs = 1;
Dromar 1:311fcc5058b3 361 _spi.write(0xFF);
Dromar 1:311fcc5058b3 362 return response[0];
Dromar 1:311fcc5058b3 363 }
Dromar 1:311fcc5058b3 364 }
Dromar 1:311fcc5058b3 365 _cs = 1;
Dromar 1:311fcc5058b3 366 _spi.write(0xFF);
Dromar 1:311fcc5058b3 367 return -1; // timeout
Dromar 1:311fcc5058b3 368 }
Dromar 1:311fcc5058b3 369
Dromar 1:311fcc5058b3 370 int SDFileSystem::_read(char *buffer, int length) {
Dromar 1:311fcc5058b3 371 _cs = 0;
Dromar 1:311fcc5058b3 372
Dromar 1:311fcc5058b3 373 // read until start byte (0xFF)
Dromar 1:311fcc5058b3 374 while(_spi.write(0xFF) != 0xFE);
Dromar 1:311fcc5058b3 375
Dromar 1:311fcc5058b3 376 // read data
Dromar 1:311fcc5058b3 377 for(int i=0; i<length; i++) {
Dromar 1:311fcc5058b3 378 buffer[i] = _spi.write(0xFF);
Dromar 1:311fcc5058b3 379 }
Dromar 1:311fcc5058b3 380 _spi.write(0xFF); // checksum
Dromar 1:311fcc5058b3 381 _spi.write(0xFF);
Dromar 1:311fcc5058b3 382
Dromar 1:311fcc5058b3 383 _cs = 1;
Dromar 1:311fcc5058b3 384 _spi.write(0xFF);
Dromar 1:311fcc5058b3 385 return 0;
Dromar 1:311fcc5058b3 386 }
Dromar 1:311fcc5058b3 387
Dromar 1:311fcc5058b3 388 int SDFileSystem::_write(const char *buffer, int length) {
Dromar 1:311fcc5058b3 389 _cs = 0;
Dromar 1:311fcc5058b3 390
Dromar 1:311fcc5058b3 391 // indicate start of block
Dromar 1:311fcc5058b3 392 _spi.write(0xFE);
Dromar 1:311fcc5058b3 393
Dromar 1:311fcc5058b3 394 // write the data
Dromar 1:311fcc5058b3 395 for(int i=0; i<length; i++) {
Dromar 1:311fcc5058b3 396 _spi.write(buffer[i]);
Dromar 1:311fcc5058b3 397 }
Dromar 1:311fcc5058b3 398
Dromar 1:311fcc5058b3 399 // write the checksum
Dromar 1:311fcc5058b3 400 _spi.write(0xFF);
Dromar 1:311fcc5058b3 401 _spi.write(0xFF);
Dromar 1:311fcc5058b3 402
Dromar 1:311fcc5058b3 403 // check the repsonse token
Dromar 1:311fcc5058b3 404 if((_spi.write(0xFF) & 0x1F) != 0x05) {
Dromar 1:311fcc5058b3 405 _cs = 1;
Dromar 1:311fcc5058b3 406 _spi.write(0xFF);
Dromar 1:311fcc5058b3 407 return 1;
Dromar 1:311fcc5058b3 408 }
Dromar 1:311fcc5058b3 409
Dromar 1:311fcc5058b3 410 // wait for write to finish
Dromar 1:311fcc5058b3 411 while(_spi.write(0xFF) == 0);
Dromar 1:311fcc5058b3 412
Dromar 1:311fcc5058b3 413 _cs = 1;
Dromar 1:311fcc5058b3 414 _spi.write(0xFF);
Dromar 1:311fcc5058b3 415 return 0;
Dromar 1:311fcc5058b3 416 }
Dromar 1:311fcc5058b3 417
Dromar 1:311fcc5058b3 418 static int ext_bits(char *data, int msb, int lsb) {
Dromar 1:311fcc5058b3 419 int bits = 0;
Dromar 1:311fcc5058b3 420 int size = 1 + msb - lsb;
Dromar 1:311fcc5058b3 421 for(int i=0; i<size; i++) {
Dromar 1:311fcc5058b3 422 int position = lsb + i;
Dromar 1:311fcc5058b3 423 int byte = 15 - (position >> 3);
Dromar 1:311fcc5058b3 424 int bit = position & 0x7;
Dromar 1:311fcc5058b3 425 int value = (data[byte] >> bit) & 1;
Dromar 1:311fcc5058b3 426 bits |= value << i;
Dromar 1:311fcc5058b3 427 }
Dromar 1:311fcc5058b3 428 return bits;
Dromar 1:311fcc5058b3 429 }
Dromar 1:311fcc5058b3 430
Dromar 1:311fcc5058b3 431 int SDFileSystem::_sd_sectors() {
Dromar 1:311fcc5058b3 432
Dromar 1:311fcc5058b3 433 int c_size, c_size_mult, read_bl_len;
Dromar 1:311fcc5058b3 434 int block_len, mult, blocknr, capacity;
Dromar 1:311fcc5058b3 435 int blocks, hc_c_size;
Dromar 1:311fcc5058b3 436 uint64_t hc_capacity;
Dromar 1:311fcc5058b3 437
Dromar 1:311fcc5058b3 438 // CMD9, Response R2 (R1 byte + 16-byte block read)
Dromar 1:311fcc5058b3 439 if(_cmdx(9, 0) != 0) {
Dromar 1:311fcc5058b3 440 fprintf(stderr, "Didn't get a response from the disk\n");
Dromar 1:311fcc5058b3 441 return 0;
Dromar 1:311fcc5058b3 442 }
Dromar 1:311fcc5058b3 443
Dromar 1:311fcc5058b3 444 char csd[16];
Dromar 1:311fcc5058b3 445 if(_read(csd, 16) != 0) {
Dromar 1:311fcc5058b3 446 fprintf(stderr, "Couldn't read csd response from disk\n");
Dromar 1:311fcc5058b3 447 return 0;
Dromar 1:311fcc5058b3 448 }
Dromar 1:311fcc5058b3 449
Dromar 1:311fcc5058b3 450 // csd_structure : csd[127:126]
Dromar 1:311fcc5058b3 451 // c_size : csd[73:62]
Dromar 1:311fcc5058b3 452 // c_size_mult : csd[49:47]
Dromar 1:311fcc5058b3 453 // read_bl_len : csd[83:80] - the *maximum* read block length
Dromar 1:311fcc5058b3 454
Dromar 1:311fcc5058b3 455 int csd_structure = ext_bits(csd, 127, 126);
Dromar 1:311fcc5058b3 456
Dromar 1:311fcc5058b3 457 #ifdef DEBUG
Dromar 1:311fcc5058b3 458 printf("\n\rCSD_STRUCT = %d\n", csd_structure);
Dromar 1:311fcc5058b3 459 #endif
Dromar 1:311fcc5058b3 460
Dromar 1:311fcc5058b3 461 switch (csd_structure){
Dromar 1:311fcc5058b3 462 case 0:
Dromar 1:311fcc5058b3 463 cdv = 512;
Dromar 1:311fcc5058b3 464 c_size = ext_bits(csd, 73, 62);
Dromar 1:311fcc5058b3 465 c_size_mult = ext_bits(csd, 49, 47);
Dromar 1:311fcc5058b3 466 read_bl_len = ext_bits(csd, 83, 80);
Dromar 1:311fcc5058b3 467
Dromar 1:311fcc5058b3 468 block_len = 1 << read_bl_len;
Dromar 1:311fcc5058b3 469 mult = 1 << (c_size_mult + 2);
Dromar 1:311fcc5058b3 470 blocknr = (c_size + 1) * mult;
Dromar 1:311fcc5058b3 471 capacity = blocknr * block_len;
Dromar 1:311fcc5058b3 472 blocks = capacity / 512;
Dromar 1:311fcc5058b3 473 #ifdef DEBUG
Dromar 1:311fcc5058b3 474 printf("\n\rSDCard\n\rc_size: %.4X \n\rcapacity: %.ld \n\rsectors: %d\n\r", c_size, capacity, blocks);
Dromar 1:311fcc5058b3 475 #endif
Dromar 1:311fcc5058b3 476 break;
Dromar 1:311fcc5058b3 477
Dromar 1:311fcc5058b3 478 case 1:
Dromar 1:311fcc5058b3 479 cdv = 1;
Dromar 1:311fcc5058b3 480 hc_c_size = ext_bits(csd, 63, 48);
Dromar 1:311fcc5058b3 481 int hc_read_bl_len = ext_bits(csd, 83, 80);
Dromar 1:311fcc5058b3 482 hc_capacity = hc_c_size+1;
Dromar 1:311fcc5058b3 483 blocks = (hc_c_size+1)*1024;
Dromar 1:311fcc5058b3 484 #ifdef DEBUG
Dromar 1:311fcc5058b3 485 printf("\n\rSDHC Card \n\rhc_c_size: %.4X \n\rcapacity: %.lld \n\rsectors: %d\n\r", hc_c_size, hc_capacity*512*1024, blocks);
Dromar 1:311fcc5058b3 486 #endif
Dromar 1:311fcc5058b3 487 break;
Dromar 1:311fcc5058b3 488
Dromar 1:311fcc5058b3 489 default:
Dromar 1:311fcc5058b3 490 fprintf(stderr, "This disk tastes funny! I only know about type 0 CSD structures\n");
Dromar 1:311fcc5058b3 491 return 0;
Dromar 1:311fcc5058b3 492 break;
Dromar 1:311fcc5058b3 493 };
Dromar 1:311fcc5058b3 494 return blocks;
Dromar 1:311fcc5058b3 495 }