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targets/TARGET_NUVOTON/TARGET_M451/us_ticker.c@182:57724642e740, 2018-02-16 (annotated)

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
182:57724642e740
Parent:
175:b96e65c34a4d 
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2015-2016 Nuvoton
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
<> 149:156823d33999 16
<> 149:156823d33999 17 #include "us_ticker_api.h"
<> 149:156823d33999 18 #include "sleep_api.h"
<> 149:156823d33999 19 #include "mbed_assert.h"
<> 149:156823d33999 20 #include "nu_modutil.h"
<> 149:156823d33999 21 #include "nu_miscutil.h"
<> 160:d5399cc887bb 22 #include "mbed_critical.h"
<> 149:156823d33999 23
<> 149:156823d33999 24 // us_ticker tick = us = timestamp
<> 149:156823d33999 25 #define US_PER_TICK 1
<> 149:156823d33999 26 #define US_PER_SEC (1000 * 1000)
<> 149:156823d33999 27
<> 149:156823d33999 28 #define TMR0HIRES_CLK_PER_SEC (1000 * 1000)
<> 149:156823d33999 29 #define TMR1HIRES_CLK_PER_SEC (1000 * 1000)
<> 149:156823d33999 30
<> 149:156823d33999 31 #define US_PER_TMR0HIRES_CLK (US_PER_SEC / TMR0HIRES_CLK_PER_SEC)
<> 149:156823d33999 32 #define US_PER_TMR1HIRES_CLK (US_PER_SEC / TMR1HIRES_CLK_PER_SEC)
<> 149:156823d33999 33
<> 149:156823d33999 34 #define US_PER_TMR0HIRES_INT (1000 * 1000 * 10)
<> 149:156823d33999 35 #define TMR0HIRES_CLK_PER_TMR0HIRES_INT ((uint32_t) ((uint64_t) US_PER_TMR0HIRES_INT * TMR0HIRES_CLK_PER_SEC / US_PER_SEC))
<> 149:156823d33999 36
<> 149:156823d33999 37
<> 149:156823d33999 38 static void tmr0_vec(void);
<> 149:156823d33999 39 static void tmr1_vec(void);
<> 149:156823d33999 40 static void us_ticker_arm_cd(void);
<> 149:156823d33999 41
<> 149:156823d33999 42 static int us_ticker_inited = 0;
<> 149:156823d33999 43 static volatile uint32_t counter_major = 0;
<> 149:156823d33999 44 static volatile uint32_t cd_major_minor_us = 0;
<> 149:156823d33999 45 static volatile uint32_t cd_minor_us = 0;
<> 149:156823d33999 46
<> 149:156823d33999 47 // NOTE: PCLK is set up in mbed_sdk_init(), invocation of which must be before C++ global object constructor. See init_api.c for details.
<> 149:156823d33999 48 // NOTE: Choose clock source of timer:
<> 149:156823d33999 49 // 1. HIRC: Be the most accurate but might cause unknown HardFault.
<> 149:156823d33999 50 // 2. HXT: Less accurate and cannot pass mbed-drivers test.
<> 149:156823d33999 51 // 3. PCLK(HXT): Less accurate but can pass mbed-drivers test.
<> 149:156823d33999 52 // NOTE: TIMER_0 for normal counter, TIMER_1 for countdown.
<> 149:156823d33999 53 static const struct nu_modinit_s timer0hires_modinit = {TIMER_0, TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK0, 0, TMR0_RST, TMR0_IRQn, (void *) tmr0_vec};
<> 149:156823d33999 54 static const struct nu_modinit_s timer1hires_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_PCLK0, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
<> 149:156823d33999 55
<> 149:156823d33999 56 #define TMR_CMP_MIN 2
<> 149:156823d33999 57 #define TMR_CMP_MAX 0xFFFFFFu
<> 149:156823d33999 58
<> 149:156823d33999 59 void us_ticker_init(void)
<> 149:156823d33999 60 {
<> 149:156823d33999 61 if (us_ticker_inited) {
<> 149:156823d33999 62 return;
<> 149:156823d33999 63 }
<> 149:156823d33999 64
<> 149:156823d33999 65 counter_major = 0;
<> 149:156823d33999 66 cd_major_minor_us = 0;
<> 149:156823d33999 67 cd_minor_us = 0;
<> 149:156823d33999 68 us_ticker_inited = 1;
<> 149:156823d33999 69
<> 149:156823d33999 70 // Reset IP
<> 149:156823d33999 71 SYS_ResetModule(timer0hires_modinit.rsetidx);
<> 159:612c381a210f 72 SYS_ResetModule(timer1hires_modinit.rsetidx);
<> 149:156823d33999 73
<> 149:156823d33999 74 // Select IP clock source
<> 149:156823d33999 75 CLK_SetModuleClock(timer0hires_modinit.clkidx, timer0hires_modinit.clksrc, timer0hires_modinit.clkdiv);
<> 159:612c381a210f 76 CLK_SetModuleClock(timer1hires_modinit.clkidx, timer1hires_modinit.clksrc, timer1hires_modinit.clkdiv);
<> 149:156823d33999 77 // Enable IP clock
<> 149:156823d33999 78 CLK_EnableModuleClock(timer0hires_modinit.clkidx);
<> 159:612c381a210f 79 CLK_EnableModuleClock(timer1hires_modinit.clkidx);
<> 149:156823d33999 80
<> 149:156823d33999 81 // Timer for normal counter
<> 149:156823d33999 82 uint32_t clk_timer0 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
<> 149:156823d33999 83 uint32_t prescale_timer0 = clk_timer0 / TMR0HIRES_CLK_PER_SEC - 1;
<> 149:156823d33999 84 MBED_ASSERT((prescale_timer0 != (uint32_t) -1) && prescale_timer0 <= 127);
<> 149:156823d33999 85 MBED_ASSERT((clk_timer0 % TMR0HIRES_CLK_PER_SEC) == 0);
<> 149:156823d33999 86 uint32_t cmp_timer0 = TMR0HIRES_CLK_PER_TMR0HIRES_INT;
<> 149:156823d33999 87 MBED_ASSERT(cmp_timer0 >= TMR_CMP_MIN && cmp_timer0 <= TMR_CMP_MAX);
<> 149:156823d33999 88 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default.
<> 149:156823d33999 89 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CTL = TIMER_PERIODIC_MODE | prescale_timer0/* | TIMER_CTL_CNTDATEN_Msk*/;
<> 149:156823d33999 90 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CMP = cmp_timer0;
<> 149:156823d33999 91
<> 149:156823d33999 92 NVIC_SetVector(timer0hires_modinit.irq_n, (uint32_t) timer0hires_modinit.var);
<> 159:612c381a210f 93 NVIC_SetVector(timer1hires_modinit.irq_n, (uint32_t) timer1hires_modinit.var);
<> 149:156823d33999 94
<> 149:156823d33999 95 NVIC_EnableIRQ(timer0hires_modinit.irq_n);
<> 159:612c381a210f 96 NVIC_EnableIRQ(timer1hires_modinit.irq_n);
<> 149:156823d33999 97
<> 149:156823d33999 98 TIMER_EnableInt((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
<> 149:156823d33999 99 TIMER_Start((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
<> 149:156823d33999 100 }
<> 149:156823d33999 101
<> 149:156823d33999 102 uint32_t us_ticker_read()
<> 149:156823d33999 103 {
<> 149:156823d33999 104 if (! us_ticker_inited) {
<> 149:156823d33999 105 us_ticker_init();
<> 149:156823d33999 106 }
<> 149:156823d33999 107
<> 149:156823d33999 108 TIMER_T * timer0_base = (TIMER_T *) NU_MODBASE(timer0hires_modinit.modname);
<> 149:156823d33999 109
<> 149:156823d33999 110 do {
<> 149:156823d33999 111 uint32_t major_minor_us;
<> 149:156823d33999 112 uint32_t minor_us;
<> 149:156823d33999 113
<> 149:156823d33999 114 // NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
<> 149:156823d33999 115 // NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
<> 149:156823d33999 116 do {
<> 149:156823d33999 117 core_util_critical_section_enter();
<> 149:156823d33999 118
<> 149:156823d33999 119 // NOTE: Order of reading minor_us/carry here is significant.
<> 149:156823d33999 120 minor_us = TIMER_GetCounter(timer0_base) * US_PER_TMR0HIRES_CLK;
<> 149:156823d33999 121 uint32_t carry = (timer0_base->INTSTS & TIMER_INTSTS_TIF_Msk) ? 1 : 0;
<> 149:156823d33999 122 // When TIMER_CNT approaches TIMER_CMP and will wrap soon, we may get carry but TIMER_CNT not wrapped. Hanlde carefully carry == 1 && TIMER_CNT is near TIMER_CMP.
<> 149:156823d33999 123 if (carry && minor_us > (US_PER_TMR0HIRES_INT / 2)) {
<> 149:156823d33999 124 major_minor_us = (counter_major + 1) * US_PER_TMR0HIRES_INT;
<> 149:156823d33999 125 }
<> 149:156823d33999 126 else {
<> 149:156823d33999 127 major_minor_us = (counter_major + carry) * US_PER_TMR0HIRES_INT + minor_us;
<> 149:156823d33999 128 }
<> 149:156823d33999 129
<> 149:156823d33999 130 core_util_critical_section_exit();
<> 149:156823d33999 131 }
<> 149:156823d33999 132 while (minor_us == 0 || minor_us == US_PER_TMR0HIRES_INT);
<> 149:156823d33999 133
<> 159:612c381a210f 134 return (major_minor_us / US_PER_TICK);
<> 149:156823d33999 135 }
<> 149:156823d33999 136 while (0);
<> 149:156823d33999 137 }
<> 149:156823d33999 138
<> 149:156823d33999 139 void us_ticker_disable_interrupt(void)
<> 149:156823d33999 140 {
<> 159:612c381a210f 141 TIMER_DisableInt((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
<> 149:156823d33999 142 }
<> 149:156823d33999 143
<> 149:156823d33999 144 void us_ticker_clear_interrupt(void)
<> 149:156823d33999 145 {
<> 159:612c381a210f 146 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
<> 149:156823d33999 147 }
<> 149:156823d33999 148
<> 149:156823d33999 149 void us_ticker_set_interrupt(timestamp_t timestamp)
<> 149:156823d33999 150 {
<> 159:612c381a210f 151 TIMER_Stop((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
<> 149:156823d33999 152
AnnaBridge 175:b96e65c34a4d 153 uint32_t delta = timestamp - us_ticker_read();
AnnaBridge 175:b96e65c34a4d 154 cd_major_minor_us = delta * US_PER_TICK;
AnnaBridge 175:b96e65c34a4d 155 us_ticker_arm_cd();
AnnaBridge 175:b96e65c34a4d 156 }
AnnaBridge 175:b96e65c34a4d 157
AnnaBridge 175:b96e65c34a4d 158 void us_ticker_fire_interrupt(void)
AnnaBridge 175:b96e65c34a4d 159 {
AnnaBridge 175:b96e65c34a4d 160 cd_major_minor_us = cd_minor_us = 0;
AnnaBridge 175:b96e65c34a4d 161 /**
AnnaBridge 175:b96e65c34a4d 162 * This event was in the past. Set the interrupt as pending, but don't process it here.
AnnaBridge 175:b96e65c34a4d 163 * This prevents a recurive loop under heavy load which can lead to a stack overflow.
AnnaBridge 175:b96e65c34a4d 164 */
AnnaBridge 175:b96e65c34a4d 165 NVIC_SetPendingIRQ(timer1hires_modinit.irq_n);
<> 149:156823d33999 166 }
<> 149:156823d33999 167
<> 149:156823d33999 168 static void tmr0_vec(void)
<> 149:156823d33999 169 {
<> 149:156823d33999 170 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
<> 149:156823d33999 171 counter_major ++;
<> 149:156823d33999 172 }
<> 149:156823d33999 173
<> 149:156823d33999 174 static void tmr1_vec(void)
<> 149:156823d33999 175 {
<> 159:612c381a210f 176 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
<> 149:156823d33999 177 cd_major_minor_us = (cd_major_minor_us > cd_minor_us) ? (cd_major_minor_us - cd_minor_us) : 0;
<> 149:156823d33999 178 if (cd_major_minor_us == 0) {
<> 149:156823d33999 179 // NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
<> 149:156823d33999 180 us_ticker_irq_handler();
<> 149:156823d33999 181 }
<> 149:156823d33999 182 else {
<> 149:156823d33999 183 us_ticker_arm_cd();
<> 149:156823d33999 184 }
<> 149:156823d33999 185 }
<> 149:156823d33999 186
<> 149:156823d33999 187 static void us_ticker_arm_cd(void)
<> 149:156823d33999 188 {
<> 159:612c381a210f 189 TIMER_T * timer1_base = (TIMER_T *) NU_MODBASE(timer1hires_modinit.modname);
<> 149:156823d33999 190
<> 159:612c381a210f 191 cd_minor_us = cd_major_minor_us;
<> 159:612c381a210f 192
<> 149:156823d33999 193 // Reset 8-bit PSC counter, 24-bit up counter value and CNTEN bit
<> 149:156823d33999 194 timer1_base->CTL |= TIMER_CTL_RSTCNT_Msk;
<> 149:156823d33999 195 // One-shot mode, Clock = 1 MHz
<> 159:612c381a210f 196 uint32_t clk_timer1 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer1hires_modinit.modname));
<> 159:612c381a210f 197 uint32_t prescale_timer1 = clk_timer1 / TMR1HIRES_CLK_PER_SEC - 1;
<> 149:156823d33999 198 MBED_ASSERT((prescale_timer1 != (uint32_t) -1) && prescale_timer1 <= 127);
<> 159:612c381a210f 199 MBED_ASSERT((clk_timer1 % TMR1HIRES_CLK_PER_SEC) == 0);
<> 149:156823d33999 200 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default.
<> 149:156823d33999 201 timer1_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk/* | TIMER_CTL_CNTDATEN_Msk*/);
<> 149:156823d33999 202 timer1_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer1/* | TIMER_CTL_CNTDATEN_Msk*/;
<> 149:156823d33999 203
<> 159:612c381a210f 204 uint32_t cmp_timer1 = cd_minor_us / US_PER_TMR1HIRES_CLK;
<> 149:156823d33999 205 cmp_timer1 = NU_CLAMP(cmp_timer1, TMR_CMP_MIN, TMR_CMP_MAX);
<> 149:156823d33999 206 timer1_base->CMP = cmp_timer1;
<> 149:156823d33999 207
<> 149:156823d33999 208 TIMER_EnableInt(timer1_base);
<> 149:156823d33999 209 TIMER_Start(timer1_base);
<> 149:156823d33999 210 }