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targets/TARGET_NUVOTON/TARGET_M451/us_ticker.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Child:
159:612c381a210f
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /* mbed Microcontroller Library
<> 149:156823d33999 2 * Copyright (c) 2015-2016 Nuvoton
<> 149:156823d33999 3 *
<> 149:156823d33999 4 * Licensed under the Apache License, Version 2.0 (the "License");
<> 149:156823d33999 5 * you may not use this file except in compliance with the License.
<> 149:156823d33999 6 * You may obtain a copy of the License at
<> 149:156823d33999 7 *
<> 149:156823d33999 8 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 9 *
<> 149:156823d33999 10 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 11 * distributed under the License is distributed on an "AS IS" BASIS,
<> 149:156823d33999 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 13 * See the License for the specific language governing permissions and
<> 149:156823d33999 14 * limitations under the License.
<> 149:156823d33999 15 */
<> 149:156823d33999 16
<> 149:156823d33999 17 #include "us_ticker_api.h"
<> 149:156823d33999 18 #include "sleep_api.h"
<> 149:156823d33999 19 #include "mbed_assert.h"
<> 149:156823d33999 20 #include "nu_modutil.h"
<> 149:156823d33999 21 #include "nu_miscutil.h"
<> 149:156823d33999 22 #include "critical.h"
<> 149:156823d33999 23
<> 149:156823d33999 24 // us_ticker tick = us = timestamp
<> 149:156823d33999 25 #define US_PER_TICK 1
<> 149:156823d33999 26 #define US_PER_SEC (1000 * 1000)
<> 149:156823d33999 27
<> 149:156823d33999 28 #define TMR0HIRES_CLK_PER_SEC (1000 * 1000)
<> 149:156823d33999 29 #define TMR1HIRES_CLK_PER_SEC (1000 * 1000)
<> 149:156823d33999 30 #define TMR1LORES_CLK_PER_SEC (__LIRC)
<> 149:156823d33999 31
<> 149:156823d33999 32 #define US_PER_TMR0HIRES_CLK (US_PER_SEC / TMR0HIRES_CLK_PER_SEC)
<> 149:156823d33999 33 #define US_PER_TMR1HIRES_CLK (US_PER_SEC / TMR1HIRES_CLK_PER_SEC)
<> 149:156823d33999 34 #define US_PER_TMR1LORES_CLK (US_PER_SEC / TMR1LORES_CLK_PER_SEC)
<> 149:156823d33999 35
<> 149:156823d33999 36 #define US_PER_TMR0HIRES_INT (1000 * 1000 * 10)
<> 149:156823d33999 37 #define TMR0HIRES_CLK_PER_TMR0HIRES_INT ((uint32_t) ((uint64_t) US_PER_TMR0HIRES_INT * TMR0HIRES_CLK_PER_SEC / US_PER_SEC))
<> 149:156823d33999 38
<> 149:156823d33999 39
<> 149:156823d33999 40 // Determine to use lo-res/hi-res timer according to CD period
<> 149:156823d33999 41 #define US_TMR_SEP_CD 1000
<> 149:156823d33999 42
<> 149:156823d33999 43 static void tmr0_vec(void);
<> 149:156823d33999 44 static void tmr1_vec(void);
<> 149:156823d33999 45 static void us_ticker_arm_cd(void);
<> 149:156823d33999 46
<> 149:156823d33999 47 static int us_ticker_inited = 0;
<> 149:156823d33999 48 static volatile uint32_t counter_major = 0;
<> 149:156823d33999 49 static volatile uint32_t pd_comp_us = 0; // Power-down compenstaion for normal counter
<> 149:156823d33999 50 static volatile uint32_t cd_major_minor_us = 0;
<> 149:156823d33999 51 static volatile uint32_t cd_minor_us = 0;
<> 149:156823d33999 52 static volatile int cd_hires_tmr_armed = 0; // Flag of armed or not of hi-res timer for CD counter
<> 149:156823d33999 53
<> 149:156823d33999 54 // NOTE: PCLK is set up in mbed_sdk_init(), invocation of which must be before C++ global object constructor. See init_api.c for details.
<> 149:156823d33999 55 // NOTE: Choose clock source of timer:
<> 149:156823d33999 56 // 1. HIRC: Be the most accurate but might cause unknown HardFault.
<> 149:156823d33999 57 // 2. HXT: Less accurate and cannot pass mbed-drivers test.
<> 149:156823d33999 58 // 3. PCLK(HXT): Less accurate but can pass mbed-drivers test.
<> 149:156823d33999 59 // NOTE: TIMER_0 for normal counter, TIMER_1 for countdown.
<> 149:156823d33999 60 static const struct nu_modinit_s timer0hires_modinit = {TIMER_0, TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK0, 0, TMR0_RST, TMR0_IRQn, (void *) tmr0_vec};
<> 149:156823d33999 61 static const struct nu_modinit_s timer1lores_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_LIRC, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
<> 149:156823d33999 62 static const struct nu_modinit_s timer1hires_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_PCLK0, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec};
<> 149:156823d33999 63
<> 149:156823d33999 64 #define TMR_CMP_MIN 2
<> 149:156823d33999 65 #define TMR_CMP_MAX 0xFFFFFFu
<> 149:156823d33999 66
<> 149:156823d33999 67 void us_ticker_init(void)
<> 149:156823d33999 68 {
<> 149:156823d33999 69 if (us_ticker_inited) {
<> 149:156823d33999 70 return;
<> 149:156823d33999 71 }
<> 149:156823d33999 72
<> 149:156823d33999 73 counter_major = 0;
<> 149:156823d33999 74 pd_comp_us = 0;
<> 149:156823d33999 75 cd_major_minor_us = 0;
<> 149:156823d33999 76 cd_minor_us = 0;
<> 149:156823d33999 77 cd_hires_tmr_armed = 0;
<> 149:156823d33999 78 us_ticker_inited = 1;
<> 149:156823d33999 79
<> 149:156823d33999 80 // Reset IP
<> 149:156823d33999 81 SYS_ResetModule(timer0hires_modinit.rsetidx);
<> 149:156823d33999 82 SYS_ResetModule(timer1lores_modinit.rsetidx);
<> 149:156823d33999 83
<> 149:156823d33999 84 // Select IP clock source
<> 149:156823d33999 85 CLK_SetModuleClock(timer0hires_modinit.clkidx, timer0hires_modinit.clksrc, timer0hires_modinit.clkdiv);
<> 149:156823d33999 86 CLK_SetModuleClock(timer1lores_modinit.clkidx, timer1lores_modinit.clksrc, timer1lores_modinit.clkdiv);
<> 149:156823d33999 87 // Enable IP clock
<> 149:156823d33999 88 CLK_EnableModuleClock(timer0hires_modinit.clkidx);
<> 149:156823d33999 89 CLK_EnableModuleClock(timer1lores_modinit.clkidx);
<> 149:156823d33999 90
<> 149:156823d33999 91 // Timer for normal counter
<> 149:156823d33999 92 uint32_t clk_timer0 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
<> 149:156823d33999 93 uint32_t prescale_timer0 = clk_timer0 / TMR0HIRES_CLK_PER_SEC - 1;
<> 149:156823d33999 94 MBED_ASSERT((prescale_timer0 != (uint32_t) -1) && prescale_timer0 <= 127);
<> 149:156823d33999 95 MBED_ASSERT((clk_timer0 % TMR0HIRES_CLK_PER_SEC) == 0);
<> 149:156823d33999 96 uint32_t cmp_timer0 = TMR0HIRES_CLK_PER_TMR0HIRES_INT;
<> 149:156823d33999 97 MBED_ASSERT(cmp_timer0 >= TMR_CMP_MIN && cmp_timer0 <= TMR_CMP_MAX);
<> 149:156823d33999 98 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default.
<> 149:156823d33999 99 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CTL = TIMER_PERIODIC_MODE | prescale_timer0/* | TIMER_CTL_CNTDATEN_Msk*/;
<> 149:156823d33999 100 ((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname))->CMP = cmp_timer0;
<> 149:156823d33999 101
<> 149:156823d33999 102 NVIC_SetVector(timer0hires_modinit.irq_n, (uint32_t) timer0hires_modinit.var);
<> 149:156823d33999 103 NVIC_SetVector(timer1lores_modinit.irq_n, (uint32_t) timer1lores_modinit.var);
<> 149:156823d33999 104
<> 149:156823d33999 105 NVIC_EnableIRQ(timer0hires_modinit.irq_n);
<> 149:156823d33999 106 NVIC_EnableIRQ(timer1lores_modinit.irq_n);
<> 149:156823d33999 107
<> 149:156823d33999 108 TIMER_EnableInt((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
<> 149:156823d33999 109 TIMER_Start((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
<> 149:156823d33999 110 }
<> 149:156823d33999 111
<> 149:156823d33999 112 uint32_t us_ticker_read()
<> 149:156823d33999 113 {
<> 149:156823d33999 114 if (! us_ticker_inited) {
<> 149:156823d33999 115 us_ticker_init();
<> 149:156823d33999 116 }
<> 149:156823d33999 117
<> 149:156823d33999 118 TIMER_T * timer0_base = (TIMER_T *) NU_MODBASE(timer0hires_modinit.modname);
<> 149:156823d33999 119
<> 149:156823d33999 120 do {
<> 149:156823d33999 121 uint32_t major_minor_us;
<> 149:156823d33999 122 uint32_t minor_us;
<> 149:156823d33999 123
<> 149:156823d33999 124 // NOTE: As TIMER_CNT = TIMER_CMP and counter_major has increased by one, TIMER_CNT doesn't change to 0 for one tick time.
<> 149:156823d33999 125 // NOTE: As TIMER_CNT = TIMER_CMP or TIMER_CNT = 0, counter_major (ISR) may not sync with TIMER_CNT. So skip and fetch stable one at the cost of 1 clock delay on this read.
<> 149:156823d33999 126 do {
<> 149:156823d33999 127 core_util_critical_section_enter();
<> 149:156823d33999 128
<> 149:156823d33999 129 // NOTE: Order of reading minor_us/carry here is significant.
<> 149:156823d33999 130 minor_us = TIMER_GetCounter(timer0_base) * US_PER_TMR0HIRES_CLK;
<> 149:156823d33999 131 uint32_t carry = (timer0_base->INTSTS & TIMER_INTSTS_TIF_Msk) ? 1 : 0;
<> 149:156823d33999 132 // When TIMER_CNT approaches TIMER_CMP and will wrap soon, we may get carry but TIMER_CNT not wrapped. Hanlde carefully carry == 1 && TIMER_CNT is near TIMER_CMP.
<> 149:156823d33999 133 if (carry && minor_us > (US_PER_TMR0HIRES_INT / 2)) {
<> 149:156823d33999 134 major_minor_us = (counter_major + 1) * US_PER_TMR0HIRES_INT;
<> 149:156823d33999 135 }
<> 149:156823d33999 136 else {
<> 149:156823d33999 137 major_minor_us = (counter_major + carry) * US_PER_TMR0HIRES_INT + minor_us;
<> 149:156823d33999 138 }
<> 149:156823d33999 139
<> 149:156823d33999 140 core_util_critical_section_exit();
<> 149:156823d33999 141 }
<> 149:156823d33999 142 while (minor_us == 0 || minor_us == US_PER_TMR0HIRES_INT);
<> 149:156823d33999 143
<> 149:156823d33999 144 // Add power-down compensation
<> 149:156823d33999 145 return (major_minor_us + pd_comp_us) / US_PER_TICK;
<> 149:156823d33999 146 }
<> 149:156823d33999 147 while (0);
<> 149:156823d33999 148 }
<> 149:156823d33999 149
<> 149:156823d33999 150 void us_ticker_disable_interrupt(void)
<> 149:156823d33999 151 {
<> 149:156823d33999 152 TIMER_DisableInt((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
<> 149:156823d33999 153 }
<> 149:156823d33999 154
<> 149:156823d33999 155 void us_ticker_clear_interrupt(void)
<> 149:156823d33999 156 {
<> 149:156823d33999 157 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
<> 149:156823d33999 158 }
<> 149:156823d33999 159
<> 149:156823d33999 160 void us_ticker_set_interrupt(timestamp_t timestamp)
<> 149:156823d33999 161 {
<> 149:156823d33999 162 TIMER_Stop((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
<> 149:156823d33999 163 cd_hires_tmr_armed = 0;
<> 149:156823d33999 164
<> 149:156823d33999 165 int delta = (int) (timestamp - us_ticker_read());
<> 149:156823d33999 166 if (delta > 0) {
<> 149:156823d33999 167 cd_major_minor_us = delta * US_PER_TICK;
<> 149:156823d33999 168 us_ticker_arm_cd();
<> 149:156823d33999 169 }
<> 149:156823d33999 170 else {
<> 149:156823d33999 171 cd_major_minor_us = cd_minor_us = 0;
<> 149:156823d33999 172 /**
<> 149:156823d33999 173 * This event was in the past. Set the interrupt as pending, but don't process it here.
<> 149:156823d33999 174 * This prevents a recurive loop under heavy load which can lead to a stack overflow.
<> 149:156823d33999 175 */
<> 149:156823d33999 176 NVIC_SetPendingIRQ(timer1lores_modinit.irq_n);
<> 149:156823d33999 177 }
<> 149:156823d33999 178 }
<> 149:156823d33999 179
<> 149:156823d33999 180 void us_ticker_prepare_sleep(struct sleep_s *obj)
<> 149:156823d33999 181 {
<> 149:156823d33999 182 // Reject power-down if hi-res timer (HIRC/HXT) is now armed for CD counter.
<> 149:156823d33999 183 if (obj->powerdown) {
<> 149:156823d33999 184 obj->powerdown = ! cd_hires_tmr_armed;
<> 149:156823d33999 185 }
<> 149:156823d33999 186
<> 149:156823d33999 187 core_util_critical_section_enter();
<> 149:156823d33999 188
<> 149:156823d33999 189 if (obj->powerdown) {
<> 149:156823d33999 190 // NOTE: On entering power-down mode, HIRC/HXT will be disabled in normal mode, but not in ICE mode. This may cause confusion in development.
<> 149:156823d33999 191 // To not be inconsistent due to above, always disable clock source of normal counter, and then re-enable it and make compensation on wakeup from power-down.
<> 149:156823d33999 192 CLK_DisableModuleClock(timer0hires_modinit.clkidx);
<> 149:156823d33999 193 }
<> 149:156823d33999 194
<> 149:156823d33999 195 core_util_critical_section_exit();
<> 149:156823d33999 196 }
<> 149:156823d33999 197
<> 149:156823d33999 198 void us_ticker_wakeup_from_sleep(struct sleep_s *obj)
<> 149:156823d33999 199 {
<> 149:156823d33999 200 core_util_critical_section_enter();
<> 149:156823d33999 201
<> 149:156823d33999 202 if (obj->powerdown) {
<> 149:156823d33999 203 // Calculate power-down compensation
<> 149:156823d33999 204 pd_comp_us += obj->period_us;
<> 149:156823d33999 205
<> 149:156823d33999 206 CLK_EnableModuleClock(timer0hires_modinit.clkidx);
<> 149:156823d33999 207 }
<> 149:156823d33999 208
<> 149:156823d33999 209 core_util_critical_section_exit();
<> 149:156823d33999 210 }
<> 149:156823d33999 211
<> 149:156823d33999 212 static void tmr0_vec(void)
<> 149:156823d33999 213 {
<> 149:156823d33999 214 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer0hires_modinit.modname));
<> 149:156823d33999 215 counter_major ++;
<> 149:156823d33999 216 }
<> 149:156823d33999 217
<> 149:156823d33999 218 static void tmr1_vec(void)
<> 149:156823d33999 219 {
<> 149:156823d33999 220 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
<> 149:156823d33999 221 cd_major_minor_us = (cd_major_minor_us > cd_minor_us) ? (cd_major_minor_us - cd_minor_us) : 0;
<> 149:156823d33999 222 cd_hires_tmr_armed = 0;
<> 149:156823d33999 223 if (cd_major_minor_us == 0) {
<> 149:156823d33999 224 // NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler();
<> 149:156823d33999 225 us_ticker_irq_handler();
<> 149:156823d33999 226 }
<> 149:156823d33999 227 else {
<> 149:156823d33999 228 us_ticker_arm_cd();
<> 149:156823d33999 229 }
<> 149:156823d33999 230 }
<> 149:156823d33999 231
<> 149:156823d33999 232 static void us_ticker_arm_cd(void)
<> 149:156823d33999 233 {
<> 149:156823d33999 234 TIMER_T * timer1_base = (TIMER_T *) NU_MODBASE(timer1lores_modinit.modname);
<> 149:156823d33999 235 uint32_t tmr1_clk_per_sec;
<> 149:156823d33999 236 uint32_t us_per_tmr1_clk;
<> 149:156823d33999 237
<> 149:156823d33999 238 /**
<> 149:156823d33999 239 * Reserve US_TMR_SEP_CD-plus alarm period for hi-res timer
<> 149:156823d33999 240 * 1. period >= US_TMR_SEP_CD * 2. Divide into two rounds:
<> 149:156823d33999 241 * US_TMR_SEP_CD * n (lo-res timer)
<> 149:156823d33999 242 * US_TMR_SEP_CD + period % US_TMR_SEP_CD (hi-res timer)
<> 149:156823d33999 243 * 2. period < US_TMR_SEP_CD * 2. Just one round:
<> 149:156823d33999 244 * period (hi-res timer)
<> 149:156823d33999 245 */
<> 149:156823d33999 246 if (cd_major_minor_us >= US_TMR_SEP_CD * 2) {
<> 149:156823d33999 247 cd_minor_us = cd_major_minor_us - cd_major_minor_us % US_TMR_SEP_CD - US_TMR_SEP_CD;
<> 149:156823d33999 248
<> 149:156823d33999 249 CLK_SetModuleClock(timer1lores_modinit.clkidx, timer1lores_modinit.clksrc, timer1lores_modinit.clkdiv);
<> 149:156823d33999 250 tmr1_clk_per_sec = TMR1LORES_CLK_PER_SEC;
<> 149:156823d33999 251 us_per_tmr1_clk = US_PER_TMR1LORES_CLK;
<> 149:156823d33999 252
<> 149:156823d33999 253 cd_hires_tmr_armed = 0;
<> 149:156823d33999 254 }
<> 149:156823d33999 255 else {
<> 149:156823d33999 256 cd_minor_us = cd_major_minor_us;
<> 149:156823d33999 257
<> 149:156823d33999 258 CLK_SetModuleClock(timer1hires_modinit.clkidx, timer1hires_modinit.clksrc, timer1hires_modinit.clkdiv);
<> 149:156823d33999 259 tmr1_clk_per_sec = TMR1HIRES_CLK_PER_SEC;
<> 149:156823d33999 260 us_per_tmr1_clk = US_PER_TMR1HIRES_CLK;
<> 149:156823d33999 261
<> 149:156823d33999 262 cd_hires_tmr_armed = 1;
<> 149:156823d33999 263 }
<> 149:156823d33999 264
<> 149:156823d33999 265 // Reset 8-bit PSC counter, 24-bit up counter value and CNTEN bit
<> 149:156823d33999 266 timer1_base->CTL |= TIMER_CTL_RSTCNT_Msk;
<> 149:156823d33999 267 // One-shot mode, Clock = 1 MHz
<> 149:156823d33999 268 uint32_t clk_timer1 = TIMER_GetModuleClock((TIMER_T *) NU_MODBASE(timer1lores_modinit.modname));
<> 149:156823d33999 269 uint32_t prescale_timer1 = clk_timer1 / tmr1_clk_per_sec - 1;
<> 149:156823d33999 270 MBED_ASSERT((prescale_timer1 != (uint32_t) -1) && prescale_timer1 <= 127);
<> 149:156823d33999 271 MBED_ASSERT((clk_timer1 % tmr1_clk_per_sec) == 0);
<> 149:156823d33999 272 // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default.
<> 149:156823d33999 273 timer1_base->CTL &= ~(TIMER_CTL_OPMODE_Msk | TIMER_CTL_PSC_Msk/* | TIMER_CTL_CNTDATEN_Msk*/);
<> 149:156823d33999 274 timer1_base->CTL |= TIMER_ONESHOT_MODE | prescale_timer1/* | TIMER_CTL_CNTDATEN_Msk*/;
<> 149:156823d33999 275
<> 149:156823d33999 276 uint32_t cmp_timer1 = cd_minor_us / us_per_tmr1_clk;
<> 149:156823d33999 277 cmp_timer1 = NU_CLAMP(cmp_timer1, TMR_CMP_MIN, TMR_CMP_MAX);
<> 149:156823d33999 278 timer1_base->CMP = cmp_timer1;
<> 149:156823d33999 279
<> 149:156823d33999 280 TIMER_EnableInt(timer1_base);
<> 149:156823d33999 281 TIMER_Start(timer1_base);
<> 149:156823d33999 282 }