Daniel Kupiniak / SX1272Lib

Elmo board support

Fork of SX1272Lib by Semtech

sx1272/sx1272-hal.cpp@6:896fb1b22cb9, 2016-05-25 (annotated)

Committer:
Daniel_espo
Date:
Wed May 25 11:36:41 2016 +0000
Revision:
6:896fb1b22cb9
Parent:
4:90bd79f1b458 
Add Elmo board support

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mluis 0:45c4f0364ca4 1 /*
mluis 0:45c4f0364ca4 2 / _____) _ | |
mluis 0:45c4f0364ca4 3 ( (____ _____ ____ _| |_ _____ ____| |__
mluis 0:45c4f0364ca4 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
mluis 0:45c4f0364ca4 5 _____) ) ____| | | || |_| ____( (___| | | |
mluis 0:45c4f0364ca4 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
mluis 0:45c4f0364ca4 7 (C) 2015 Semtech
mluis 0:45c4f0364ca4 8
mluis 0:45c4f0364ca4 9 Description: -
mluis 0:45c4f0364ca4 10
mluis 0:45c4f0364ca4 11 License: Revised BSD License, see LICENSE.TXT file include in the project
mluis 0:45c4f0364ca4 12
mluis 0:45c4f0364ca4 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
mluis 0:45c4f0364ca4 14 */
mluis 0:45c4f0364ca4 15 #include "sx1272-hal.h"
mluis 0:45c4f0364ca4 16
GregCr 2:cd1093b6676f 17 const RadioRegisters_t SX1272MB2xAS::RadioRegsInit[] = RADIO_INIT_REGISTERS_VALUE;
mluis 0:45c4f0364ca4 18
GregCr 2:cd1093b6676f 19 SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events,
mluis 0:45c4f0364ca4 20 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
mluis 0:45c4f0364ca4 21 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5,
mluis 0:45c4f0364ca4 22 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 23 PinName rfSwitchCntr1, PinName rfSwitchCntr2 )
dudmuck 1:b0372ef620d0 24 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 25 PinName txctl, PinName rxctl )
mluis 0:45c4f0364ca4 26 #else
mluis 0:45c4f0364ca4 27 PinName antSwitch )
mluis 0:45c4f0364ca4 28 #endif
mluis 0:45c4f0364ca4 29 : SX1272( events, mosi, miso, sclk, nss, reset, dio0, dio1, dio2, dio3, dio4, dio5 ),
mluis 0:45c4f0364ca4 30 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 31 RfSwitchCntr1( rfSwitchCntr1 ),
mluis 0:45c4f0364ca4 32 RfSwitchCntr2( rfSwitchCntr2 ),
dudmuck 1:b0372ef620d0 33 PwrAmpCntr( PD_2 )
dudmuck 1:b0372ef620d0 34 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 35 TxCtl ( txctl ),
dudmuck 1:b0372ef620d0 36 RxCtl ( rxctl )
Daniel_espo 6:896fb1b22cb9 37
mluis 0:45c4f0364ca4 38 #else
mluis 0:45c4f0364ca4 39 AntSwitch( antSwitch ),
Daniel_espo 6:896fb1b22cb9 40 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_ELMO_F411RE ) )
dudmuck 1:b0372ef620d0 41 Fake( D8 )
mluis 0:45c4f0364ca4 42 #else
mluis 0:45c4f0364ca4 43 Fake( A3 )
mluis 0:45c4f0364ca4 44 #endif
mluis 0:45c4f0364ca4 45 #endif
mluis 0:45c4f0364ca4 46 {
mluis 0:45c4f0364ca4 47 this->RadioEvents = events;
mluis 0:45c4f0364ca4 48
mluis 0:45c4f0364ca4 49 Reset( );
mluis 4:90bd79f1b458 50
mluis 0:45c4f0364ca4 51 IoInit( );
mluis 4:90bd79f1b458 52
mluis 0:45c4f0364ca4 53 SetOpMode( RF_OPMODE_SLEEP );
mluis 4:90bd79f1b458 54
mluis 0:45c4f0364ca4 55 IoIrqInit( dioIrq );
mluis 4:90bd79f1b458 56
mluis 0:45c4f0364ca4 57 RadioRegistersInit( );
mluis 0:45c4f0364ca4 58
mluis 0:45c4f0364ca4 59 SetModem( MODEM_FSK );
mluis 0:45c4f0364ca4 60
mluis 0:45c4f0364ca4 61 this->settings.State = RF_IDLE ;
mluis 0:45c4f0364ca4 62 }
mluis 0:45c4f0364ca4 63
mluis 4:90bd79f1b458 64 SX1272MB2xAS::SX1272MB2xAS( RadioEvents_t *events )
mluis 0:45c4f0364ca4 65 #if defined ( TARGET_NUCLEO_L152RE )
mluis 0:45c4f0364ca4 66 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, A3, D9 ), // For NUCLEO L152RE dio4 is on port A3
mluis 0:45c4f0364ca4 67 AntSwitch( A4 ),
mluis 0:45c4f0364ca4 68 Fake( D8 )
mluis 0:45c4f0364ca4 69 #elif defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 70 : SX1272( events, PB_15, PB_14, PB_13, PB_12, PC_2, PC_6, PC_10, PC_11, PC_8, PC_9, PC_12 ),
mluis 0:45c4f0364ca4 71 RfSwitchCntr1( PC_4 ),
mluis 0:45c4f0364ca4 72 RfSwitchCntr2( PC_13 ),
mluis 0:45c4f0364ca4 73 PwrAmpCntr( PD_2 )
dudmuck 1:b0372ef620d0 74 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 75 : SX1272( events, LORA_MOSI, LORA_MISO, LORA_SCK, LORA_NSS, LORA_RESET, LORA_DIO0, LORA_DIO1, LORA_DIO2, LORA_DIO3, LORA_DIO4, LORA_DIO5 ),
dudmuck 1:b0372ef620d0 76 TxCtl( LORA_TXCTL ),
mluis 4:90bd79f1b458 77 RxCtl( LORA_RXCTL )
Daniel_espo 6:896fb1b22cb9 78 #elif defined ( TARGET_ELMO_F411RE )
Daniel_espo 6:896fb1b22cb9 79 : SX1272( events, RF_SPI_MOSI, RF_SPI_MISO, RF_SPI_SCK, RF_SPI_CS, RF_RESET, RF_DIO0, RF_DIO1, RF_DIO2, RF_DIO3, RF_DIO4, RF_DIO5),
Daniel_espo 6:896fb1b22cb9 80 AntSwitch(RF_RXTX_SW ),
Daniel_espo 6:896fb1b22cb9 81 Fake(D8)
mluis 0:45c4f0364ca4 82 #else
mluis 0:45c4f0364ca4 83 : SX1272( events, D11, D12, D13, D10, A0, D2, D3, D4, D5, D8, D9 ),
mluis 0:45c4f0364ca4 84 AntSwitch( A4 ),
mluis 0:45c4f0364ca4 85 Fake( A3 )
mluis 0:45c4f0364ca4 86 #endif
mluis 0:45c4f0364ca4 87 {
mluis 0:45c4f0364ca4 88 this->RadioEvents = events;
mluis 0:45c4f0364ca4 89
mluis 0:45c4f0364ca4 90 Reset( );
mluis 4:90bd79f1b458 91
mluis 0:45c4f0364ca4 92 boardConnected = UNKNOWN;
mluis 4:90bd79f1b458 93
mluis 0:45c4f0364ca4 94 DetectBoardType( );
mluis 4:90bd79f1b458 95
mluis 0:45c4f0364ca4 96 IoInit( );
mluis 4:90bd79f1b458 97
mluis 0:45c4f0364ca4 98 SetOpMode( RF_OPMODE_SLEEP );
mluis 0:45c4f0364ca4 99 IoIrqInit( dioIrq );
mluis 4:90bd79f1b458 100
mluis 0:45c4f0364ca4 101 RadioRegistersInit( );
mluis 0:45c4f0364ca4 102
mluis 0:45c4f0364ca4 103 SetModem( MODEM_FSK );
mluis 0:45c4f0364ca4 104
mluis 0:45c4f0364ca4 105 this->settings.State = RF_IDLE ;
mluis 0:45c4f0364ca4 106 }
mluis 0:45c4f0364ca4 107
mluis 0:45c4f0364ca4 108 //-------------------------------------------------------------------------
mluis 0:45c4f0364ca4 109 // Board relative functions
mluis 0:45c4f0364ca4 110 //-------------------------------------------------------------------------
GregCr 2:cd1093b6676f 111 uint8_t SX1272MB2xAS::DetectBoardType( void )
mluis 0:45c4f0364ca4 112 {
mluis 0:45c4f0364ca4 113 if( boardConnected == UNKNOWN )
mluis 0:45c4f0364ca4 114 {
mluis 0:45c4f0364ca4 115 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 116 boardConnected = NA_MOTE_72;
dudmuck 1:b0372ef620d0 117 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 118 boardConnected = MDOT_F411RE;
mluis 0:45c4f0364ca4 119 #else
mluis 0:45c4f0364ca4 120 this->AntSwitch.input( );
mluis 0:45c4f0364ca4 121 wait_ms( 1 );
mluis 0:45c4f0364ca4 122 if( this->AntSwitch == 1 )
mluis 0:45c4f0364ca4 123 {
mluis 0:45c4f0364ca4 124 boardConnected = SX1272MB1DCS;
mluis 0:45c4f0364ca4 125 }
mluis 0:45c4f0364ca4 126 else
mluis 0:45c4f0364ca4 127 {
GregCr 2:cd1093b6676f 128 boardConnected = SX1272MB2XAS;
mluis 0:45c4f0364ca4 129 }
mluis 0:45c4f0364ca4 130 this->AntSwitch.output( );
mluis 0:45c4f0364ca4 131 wait_ms( 1 );
mluis 0:45c4f0364ca4 132 #endif
mluis 0:45c4f0364ca4 133 }
mluis 0:45c4f0364ca4 134 return ( boardConnected );
mluis 0:45c4f0364ca4 135 }
mluis 0:45c4f0364ca4 136
GregCr 2:cd1093b6676f 137 void SX1272MB2xAS::IoInit( void )
mluis 0:45c4f0364ca4 138 {
mluis 0:45c4f0364ca4 139 AntSwInit( );
mluis 0:45c4f0364ca4 140 SpiInit( );
mluis 0:45c4f0364ca4 141 }
mluis 0:45c4f0364ca4 142
GregCr 2:cd1093b6676f 143 void SX1272MB2xAS::RadioRegistersInit( )
mluis 0:45c4f0364ca4 144 {
mluis 0:45c4f0364ca4 145 uint8_t i = 0;
mluis 0:45c4f0364ca4 146 for( i = 0; i < sizeof( RadioRegsInit ) / sizeof( RadioRegisters_t ); i++ )
mluis 0:45c4f0364ca4 147 {
mluis 0:45c4f0364ca4 148 SetModem( RadioRegsInit[i].Modem );
mluis 0:45c4f0364ca4 149 Write( RadioRegsInit[i].Addr, RadioRegsInit[i].Value );
mluis 0:45c4f0364ca4 150 }
mluis 0:45c4f0364ca4 151 }
mluis 0:45c4f0364ca4 152
GregCr 2:cd1093b6676f 153 void SX1272MB2xAS::SpiInit( void )
mluis 0:45c4f0364ca4 154 {
mluis 0:45c4f0364ca4 155 nss = 1;
mluis 0:45c4f0364ca4 156 spi.format( 8,0 );
mluis 0:45c4f0364ca4 157 uint32_t frequencyToSet = 8000000;
Daniel_espo 6:896fb1b22cb9 158 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_LPC11U6X ) || defined ( TARGET_MTS_MDOT_F411RE ) || defined ( TARGET_ELMO_F411RE ) )
mluis 0:45c4f0364ca4 159 spi.frequency( frequencyToSet );
mluis 0:45c4f0364ca4 160 #elif( defined ( TARGET_KL25Z ) ) //busclock frequency is halved -> double the spi frequency to compensate
mluis 0:45c4f0364ca4 161 spi.frequency( frequencyToSet * 2 );
mluis 0:45c4f0364ca4 162 #else
mluis 0:45c4f0364ca4 163 #warning "Check the board's SPI frequency"
mluis 0:45c4f0364ca4 164 #endif
mluis 0:45c4f0364ca4 165 wait(0.1);
mluis 0:45c4f0364ca4 166 }
mluis 0:45c4f0364ca4 167
GregCr 2:cd1093b6676f 168 void SX1272MB2xAS::IoIrqInit( DioIrqHandler *irqHandlers )
mluis 0:45c4f0364ca4 169 {
Daniel_espo 6:896fb1b22cb9 170 #if( defined ( TARGET_NUCLEO_L152RE ) || defined ( TARGET_MOTE_L152RC ) || defined ( TARGET_LPC11U6X ) || defined ( TARGET_ELMO_F411RE ) )
mluis 0:45c4f0364ca4 171 dio0.mode( PullDown );
mluis 0:45c4f0364ca4 172 dio1.mode( PullDown );
mluis 0:45c4f0364ca4 173 dio2.mode( PullDown );
mluis 0:45c4f0364ca4 174 dio3.mode( PullDown );
mluis 0:45c4f0364ca4 175 dio4.mode( PullDown );
mluis 0:45c4f0364ca4 176 #endif
GregCr 2:cd1093b6676f 177 dio0.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[0] ) );
GregCr 2:cd1093b6676f 178 dio1.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[1] ) );
GregCr 2:cd1093b6676f 179 dio2.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[2] ) );
GregCr 2:cd1093b6676f 180 dio3.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[3] ) );
GregCr 2:cd1093b6676f 181 dio4.rise( this, static_cast< TriggerMB2xAS > ( irqHandlers[4] ) );
mluis 0:45c4f0364ca4 182 }
mluis 0:45c4f0364ca4 183
GregCr 2:cd1093b6676f 184 void SX1272MB2xAS::IoDeInit( void )
mluis 0:45c4f0364ca4 185 {
mluis 0:45c4f0364ca4 186 //nothing
mluis 0:45c4f0364ca4 187 }
mluis 0:45c4f0364ca4 188
GregCr 2:cd1093b6676f 189 uint8_t SX1272MB2xAS::GetPaSelect( uint32_t channel )
mluis 0:45c4f0364ca4 190 {
dudmuck 1:b0372ef620d0 191 if( boardConnected == SX1272MB1DCS || boardConnected == MDOT_F411RE )
mluis 0:45c4f0364ca4 192 {
mluis 0:45c4f0364ca4 193 return RF_PACONFIG_PASELECT_PABOOST;
mluis 0:45c4f0364ca4 194 }
mluis 0:45c4f0364ca4 195 else
mluis 0:45c4f0364ca4 196 {
mluis 0:45c4f0364ca4 197 return RF_PACONFIG_PASELECT_RFO;
mluis 0:45c4f0364ca4 198 }
mluis 0:45c4f0364ca4 199 }
mluis 0:45c4f0364ca4 200
GregCr 2:cd1093b6676f 201 void SX1272MB2xAS::SetAntSwLowPower( bool status )
mluis 0:45c4f0364ca4 202 {
mluis 0:45c4f0364ca4 203 if( isRadioActive != status )
mluis 0:45c4f0364ca4 204 {
mluis 0:45c4f0364ca4 205 isRadioActive = status;
mluis 0:45c4f0364ca4 206
mluis 0:45c4f0364ca4 207 if( status == false )
mluis 0:45c4f0364ca4 208 {
mluis 0:45c4f0364ca4 209 AntSwInit( );
mluis 0:45c4f0364ca4 210 }
mluis 0:45c4f0364ca4 211 else
mluis 0:45c4f0364ca4 212 {
mluis 0:45c4f0364ca4 213 AntSwDeInit( );
mluis 0:45c4f0364ca4 214 }
mluis 0:45c4f0364ca4 215 }
mluis 0:45c4f0364ca4 216 }
mluis 0:45c4f0364ca4 217
GregCr 2:cd1093b6676f 218 void SX1272MB2xAS::AntSwInit( void )
mluis 0:45c4f0364ca4 219 {
mluis 0:45c4f0364ca4 220 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 221 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 222 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 223 this->PwrAmpCntr = 0;
dudmuck 1:b0372ef620d0 224 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 225 this->TxCtl = 0;
dudmuck 1:b0372ef620d0 226 this->RxCtl = 0;
mluis 0:45c4f0364ca4 227 #else
mluis 0:45c4f0364ca4 228 this->AntSwitch = 0;
mluis 0:45c4f0364ca4 229 #endif
mluis 0:45c4f0364ca4 230 }
mluis 0:45c4f0364ca4 231
GregCr 2:cd1093b6676f 232 void SX1272MB2xAS::AntSwDeInit( void )
mluis 0:45c4f0364ca4 233 {
mluis 0:45c4f0364ca4 234 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 235 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 236 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 237 this->PwrAmpCntr = 0;
dudmuck 1:b0372ef620d0 238 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 239 this->TxCtl = 0;
dudmuck 1:b0372ef620d0 240 this->RxCtl = 0;
mluis 0:45c4f0364ca4 241 #else
mluis 0:45c4f0364ca4 242 this->AntSwitch = 0;
mluis 0:45c4f0364ca4 243 #endif
mluis 0:45c4f0364ca4 244 }
mluis 0:45c4f0364ca4 245
GregCr 2:cd1093b6676f 246 void SX1272MB2xAS::SetAntSw( uint8_t rxTx )
mluis 0:45c4f0364ca4 247 {
mluis 0:45c4f0364ca4 248 #if defined ( TARGET_MOTE_L152RC )
mluis 0:45c4f0364ca4 249 switch( this->currentOpMode )
mluis 0:45c4f0364ca4 250 {
mluis 0:45c4f0364ca4 251 case RFLR_OPMODE_TRANSMITTER:
mluis 0:45c4f0364ca4 252 if( ( Read( REG_PACONFIG ) & RF_PACONFIG_PASELECT_PABOOST ) == RF_PACONFIG_PASELECT_PABOOST )
mluis 0:45c4f0364ca4 253 {
mluis 0:45c4f0364ca4 254 this->RfSwitchCntr1 = 1;
mluis 0:45c4f0364ca4 255 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 256 }
mluis 0:45c4f0364ca4 257 else
mluis 0:45c4f0364ca4 258 {
mluis 0:45c4f0364ca4 259 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 260 this->RfSwitchCntr2 = 1;
mluis 0:45c4f0364ca4 261 }
mluis 0:45c4f0364ca4 262 break;
mluis 0:45c4f0364ca4 263 case RFLR_OPMODE_RECEIVER:
mluis 0:45c4f0364ca4 264 case RFLR_OPMODE_RECEIVER_SINGLE:
mluis 0:45c4f0364ca4 265 case RFLR_OPMODE_CAD:
mluis 0:45c4f0364ca4 266 this->RfSwitchCntr1 = 1;
mluis 0:45c4f0364ca4 267 this->RfSwitchCntr2 = 1;
mluis 0:45c4f0364ca4 268 break;
mluis 0:45c4f0364ca4 269 default:
mluis 0:45c4f0364ca4 270 this->RfSwitchCntr1 = 0;
mluis 0:45c4f0364ca4 271 this->RfSwitchCntr2 = 0;
mluis 0:45c4f0364ca4 272 this->PwrAmpCntr = 0;
mluis 0:45c4f0364ca4 273 break;
mluis 0:45c4f0364ca4 274 }
dudmuck 1:b0372ef620d0 275 #elif defined ( TARGET_MTS_MDOT_F411RE )
dudmuck 1:b0372ef620d0 276 /* SKY13350 */
dudmuck 1:b0372ef620d0 277 this->rxTx = rxTx;
dudmuck 1:b0372ef620d0 278
dudmuck 1:b0372ef620d0 279 // 1: Tx, 0: Rx
dudmuck 1:b0372ef620d0 280 if( rxTx != 0 )
dudmuck 1:b0372ef620d0 281 {
dudmuck 1:b0372ef620d0 282 this->TxCtl = 1;
dudmuck 1:b0372ef620d0 283 this->RxCtl = 0;
dudmuck 1:b0372ef620d0 284 }
dudmuck 1:b0372ef620d0 285 else
dudmuck 1:b0372ef620d0 286 {
dudmuck 1:b0372ef620d0 287 this->TxCtl = 0;
dudmuck 1:b0372ef620d0 288 this->RxCtl = 1;
dudmuck 1:b0372ef620d0 289 }
mluis 0:45c4f0364ca4 290 #else
mluis 0:45c4f0364ca4 291 this->rxTx = rxTx;
mluis 0:45c4f0364ca4 292
mluis 0:45c4f0364ca4 293 // 1: Tx, 0: Rx
mluis 0:45c4f0364ca4 294 if( rxTx != 0 )
mluis 0:45c4f0364ca4 295 {
mluis 0:45c4f0364ca4 296 this->AntSwitch = 1;
mluis 0:45c4f0364ca4 297 }
mluis 0:45c4f0364ca4 298 else
mluis 0:45c4f0364ca4 299 {
mluis 0:45c4f0364ca4 300 this->AntSwitch = 0;
mluis 0:45c4f0364ca4 301 }
mluis 0:45c4f0364ca4 302 #endif
mluis 0:45c4f0364ca4 303 }
mluis 0:45c4f0364ca4 304
GregCr 2:cd1093b6676f 305 bool SX1272MB2xAS::CheckRfFrequency( uint32_t frequency )
mluis 0:45c4f0364ca4 306 {
mluis 0:45c4f0364ca4 307 //TODO: Implement check, currently all frequencies are supported
mluis 0:45c4f0364ca4 308 return true;
mluis 0:45c4f0364ca4 309 }
mluis 0:45c4f0364ca4 310
mluis 0:45c4f0364ca4 311
GregCr 2:cd1093b6676f 312 void SX1272MB2xAS::Reset( void )
mluis 0:45c4f0364ca4 313 {
mluis 0:45c4f0364ca4 314 reset.output();
mluis 0:45c4f0364ca4 315 reset = 0;
mluis 0:45c4f0364ca4 316 wait_ms( 1 );
mluis 0:45c4f0364ca4 317 reset.input();
mluis 0:45c4f0364ca4 318 wait_ms( 6 );
mluis 0:45c4f0364ca4 319 }
mluis 0:45c4f0364ca4 320
GregCr 2:cd1093b6676f 321 void SX1272MB2xAS::Write( uint8_t addr, uint8_t data )
mluis 0:45c4f0364ca4 322 {
mluis 0:45c4f0364ca4 323 Write( addr, &data, 1 );
mluis 0:45c4f0364ca4 324 }
mluis 0:45c4f0364ca4 325
GregCr 2:cd1093b6676f 326 uint8_t SX1272MB2xAS::Read( uint8_t addr )
mluis 0:45c4f0364ca4 327 {
mluis 0:45c4f0364ca4 328 uint8_t data;
mluis 0:45c4f0364ca4 329 Read( addr, &data, 1 );
mluis 0:45c4f0364ca4 330 return data;
mluis 0:45c4f0364ca4 331 }
mluis 0:45c4f0364ca4 332
GregCr 2:cd1093b6676f 333 void SX1272MB2xAS::Write( uint8_t addr, uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 334 {
mluis 0:45c4f0364ca4 335 uint8_t i;
mluis 0:45c4f0364ca4 336
mluis 0:45c4f0364ca4 337 nss = 0;
mluis 0:45c4f0364ca4 338 spi.write( addr | 0x80 );
mluis 0:45c4f0364ca4 339 for( i = 0; i < size; i++ )
mluis 0:45c4f0364ca4 340 {
mluis 0:45c4f0364ca4 341 spi.write( buffer[i] );
mluis 0:45c4f0364ca4 342 }
mluis 0:45c4f0364ca4 343 nss = 1;
mluis 0:45c4f0364ca4 344 }
mluis 0:45c4f0364ca4 345
GregCr 2:cd1093b6676f 346 void SX1272MB2xAS::Read( uint8_t addr, uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 347 {
mluis 0:45c4f0364ca4 348 uint8_t i;
mluis 0:45c4f0364ca4 349
mluis 0:45c4f0364ca4 350 nss = 0;
mluis 0:45c4f0364ca4 351 spi.write( addr & 0x7F );
mluis 0:45c4f0364ca4 352 for( i = 0; i < size; i++ )
mluis 0:45c4f0364ca4 353 {
mluis 0:45c4f0364ca4 354 buffer[i] = spi.write( 0 );
mluis 0:45c4f0364ca4 355 }
mluis 0:45c4f0364ca4 356 nss = 1;
mluis 0:45c4f0364ca4 357 }
mluis 0:45c4f0364ca4 358
GregCr 2:cd1093b6676f 359 void SX1272MB2xAS::WriteFifo( uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 360 {
mluis 0:45c4f0364ca4 361 Write( 0, buffer, size );
mluis 0:45c4f0364ca4 362 }
mluis 0:45c4f0364ca4 363
GregCr 2:cd1093b6676f 364 void SX1272MB2xAS::ReadFifo( uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 365 {
mluis 0:45c4f0364ca4 366 Read( 0, buffer, size );
mluis 0:45c4f0364ca4 367 }