Daniel Levine / VL53L0X_MAX32630FTHR

Makes the VL53L0X library compatible with MAX32630FTHR definitions. Adjusts default sensor settings to fastest reading (20ms) vs. default (30ms).

Dependencies:   ST_INTERFACES X_NUCLEO_COMMON

Fork of VL53L0X by ST

VL53L0X_device.h@5:d25feb417ac1, 2018-03-13 (annotated)

Committer:
DVLevine
Date:
Tue Mar 13 01:23:22 2018 +0000
Revision:
5:d25feb417ac1
Parent:
2:d07edeaff6f1 
changed library for compatibility with MAX32630 definitions and changed prox mode to fast readings (20ms) vs. default long distance setting (33ms).

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nikapov 0:a1a69d32f310 1 /*******************************************************************************
nikapov 0:a1a69d32f310 2 Copyright © 2016, STMicroelectronics International N.V.
nikapov 0:a1a69d32f310 3 All rights reserved.
nikapov 0:a1a69d32f310 4
nikapov 0:a1a69d32f310 5 Redistribution and use in source and binary forms, with or without
nikapov 0:a1a69d32f310 6 modification, are permitted provided that the following conditions are met:
nikapov 0:a1a69d32f310 7 * Redistributions of source code must retain the above copyright
nikapov 0:a1a69d32f310 8 notice, this list of conditions and the following disclaimer.
nikapov 0:a1a69d32f310 9 * Redistributions in binary form must reproduce the above copyright
nikapov 0:a1a69d32f310 10 notice, this list of conditions and the following disclaimer in the
nikapov 0:a1a69d32f310 11 documentation and/or other materials provided with the distribution.
nikapov 0:a1a69d32f310 12 * Neither the name of STMicroelectronics nor the
nikapov 0:a1a69d32f310 13 names of its contributors may be used to endorse or promote products
nikapov 0:a1a69d32f310 14 derived from this software without specific prior written permission.
nikapov 0:a1a69d32f310 15
nikapov 0:a1a69d32f310 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
nikapov 0:a1a69d32f310 17 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
nikapov 0:a1a69d32f310 18 WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
nikapov 0:a1a69d32f310 19 NON-INFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS ARE DISCLAIMED.
nikapov 0:a1a69d32f310 20 IN NO EVENT SHALL STMICROELECTRONICS INTERNATIONAL N.V. BE LIABLE FOR ANY
nikapov 0:a1a69d32f310 21 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
nikapov 0:a1a69d32f310 22 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
nikapov 0:a1a69d32f310 23 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
nikapov 0:a1a69d32f310 24 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
nikapov 0:a1a69d32f310 25 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
nikapov 0:a1a69d32f310 26 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
nikapov 0:a1a69d32f310 27 *******************************************************************************/
nikapov 0:a1a69d32f310 28
nikapov 0:a1a69d32f310 29 /**
nikapov 0:a1a69d32f310 30 * Device specific defines. To be adapted by implementer for the targeted
nikapov 0:a1a69d32f310 31 * device.
nikapov 0:a1a69d32f310 32 */
nikapov 0:a1a69d32f310 33
nikapov 0:a1a69d32f310 34 #ifndef _VL53L0X_DEVICE_H_
nikapov 0:a1a69d32f310 35 #define _VL53L0X_DEVICE_H_
nikapov 0:a1a69d32f310 36
nikapov 0:a1a69d32f310 37 #include "VL53L0X_types.h"
nikapov 0:a1a69d32f310 38
nikapov 0:a1a69d32f310 39
nikapov 0:a1a69d32f310 40 /** @defgroup VL53L0X_DevSpecDefines_group VL53L0X cut1.1 Device Specific Defines
nikapov 0:a1a69d32f310 41 * @brief VL53L0X cut1.1 Device Specific Defines
nikapov 0:a1a69d32f310 42 * @{
nikapov 0:a1a69d32f310 43 */
nikapov 0:a1a69d32f310 44
nikapov 0:a1a69d32f310 45
nikapov 0:a1a69d32f310 46 /** @defgroup VL53L0X_DeviceError_group Device Error
nikapov 0:a1a69d32f310 47 * @brief Device Error code
nikapov 0:a1a69d32f310 48 *
nikapov 0:a1a69d32f310 49 * This enum is Device specific it should be updated in the implementation
nikapov 0:a1a69d32f310 50 * Use @a VL53L0X_GetStatusErrorString() to get the string.
nikapov 0:a1a69d32f310 51 * It is related to Status Register of the Device.
nikapov 0:a1a69d32f310 52 * @{
nikapov 0:a1a69d32f310 53 */
nikapov 0:a1a69d32f310 54 typedef uint8_t VL53L0X_DeviceError;
nikapov 0:a1a69d32f310 55
nikapov 0:a1a69d32f310 56 #define VL53L0X_DEVICEERROR_NONE ((VL53L0X_DeviceError) 0)
Davidroid 2:d07edeaff6f1 57 /*!< 0 NoError */
nikapov 0:a1a69d32f310 58 #define VL53L0X_DEVICEERROR_VCSELCONTINUITYTESTFAILURE ((VL53L0X_DeviceError) 1)
nikapov 0:a1a69d32f310 59 #define VL53L0X_DEVICEERROR_VCSELWATCHDOGTESTFAILURE ((VL53L0X_DeviceError) 2)
nikapov 0:a1a69d32f310 60 #define VL53L0X_DEVICEERROR_NOVHVVALUEFOUND ((VL53L0X_DeviceError) 3)
nikapov 0:a1a69d32f310 61 #define VL53L0X_DEVICEERROR_MSRCNOTARGET ((VL53L0X_DeviceError) 4)
nikapov 0:a1a69d32f310 62 #define VL53L0X_DEVICEERROR_SNRCHECK ((VL53L0X_DeviceError) 5)
nikapov 0:a1a69d32f310 63 #define VL53L0X_DEVICEERROR_RANGEPHASECHECK ((VL53L0X_DeviceError) 6)
nikapov 0:a1a69d32f310 64 #define VL53L0X_DEVICEERROR_SIGMATHRESHOLDCHECK ((VL53L0X_DeviceError) 7)
nikapov 0:a1a69d32f310 65 #define VL53L0X_DEVICEERROR_TCC ((VL53L0X_DeviceError) 8)
nikapov 0:a1a69d32f310 66 #define VL53L0X_DEVICEERROR_PHASECONSISTENCY ((VL53L0X_DeviceError) 9)
nikapov 0:a1a69d32f310 67 #define VL53L0X_DEVICEERROR_MINCLIP ((VL53L0X_DeviceError) 10)
nikapov 0:a1a69d32f310 68 #define VL53L0X_DEVICEERROR_RANGECOMPLETE ((VL53L0X_DeviceError) 11)
nikapov 0:a1a69d32f310 69 #define VL53L0X_DEVICEERROR_ALGOUNDERFLOW ((VL53L0X_DeviceError) 12)
nikapov 0:a1a69d32f310 70 #define VL53L0X_DEVICEERROR_ALGOOVERFLOW ((VL53L0X_DeviceError) 13)
nikapov 0:a1a69d32f310 71 #define VL53L0X_DEVICEERROR_RANGEIGNORETHRESHOLD ((VL53L0X_DeviceError) 14)
nikapov 0:a1a69d32f310 72
nikapov 0:a1a69d32f310 73 /** @} end of VL53L0X_DeviceError_group */
nikapov 0:a1a69d32f310 74
nikapov 0:a1a69d32f310 75
nikapov 0:a1a69d32f310 76 /** @defgroup VL53L0X_CheckEnable_group Check Enable list
nikapov 0:a1a69d32f310 77 * @brief Check Enable code
nikapov 0:a1a69d32f310 78 *
nikapov 0:a1a69d32f310 79 * Define used to specify the LimitCheckId.
nikapov 0:a1a69d32f310 80 * Use @a VL53L0X_GetLimitCheckInfo() to get the string.
nikapov 0:a1a69d32f310 81 * @{
nikapov 0:a1a69d32f310 82 */
nikapov 0:a1a69d32f310 83
nikapov 0:a1a69d32f310 84 #define VL53L0X_CHECKENABLE_SIGMA_FINAL_RANGE 0
nikapov 0:a1a69d32f310 85 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_FINAL_RANGE 1
nikapov 0:a1a69d32f310 86 #define VL53L0X_CHECKENABLE_SIGNAL_REF_CLIP 2
nikapov 0:a1a69d32f310 87 #define VL53L0X_CHECKENABLE_RANGE_IGNORE_THRESHOLD 3
nikapov 0:a1a69d32f310 88 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_MSRC 4
nikapov 0:a1a69d32f310 89 #define VL53L0X_CHECKENABLE_SIGNAL_RATE_PRE_RANGE 5
nikapov 0:a1a69d32f310 90
nikapov 0:a1a69d32f310 91 #define VL53L0X_CHECKENABLE_NUMBER_OF_CHECKS 6
nikapov 0:a1a69d32f310 92
nikapov 0:a1a69d32f310 93 /** @} end of VL53L0X_CheckEnable_group */
nikapov 0:a1a69d32f310 94
nikapov 0:a1a69d32f310 95
nikapov 0:a1a69d32f310 96 /** @defgroup VL53L0X_GpioFunctionality_group Gpio Functionality
nikapov 0:a1a69d32f310 97 * @brief Defines the different functionalities for the device GPIO(s)
nikapov 0:a1a69d32f310 98 * @{
nikapov 0:a1a69d32f310 99 */
nikapov 0:a1a69d32f310 100 typedef uint8_t VL53L0X_GpioFunctionality;
nikapov 0:a1a69d32f310 101
nikapov 0:a1a69d32f310 102 #define VL53L0X_GPIOFUNCTIONALITY_OFF \
nikapov 0:a1a69d32f310 103 ((VL53L0X_GpioFunctionality) 0) /*!< NO Interrupt */
nikapov 0:a1a69d32f310 104 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_LOW \
nikapov 0:a1a69d32f310 105 ((VL53L0X_GpioFunctionality) 1) /*!< Level Low (value < thresh_low) */
nikapov 0:a1a69d32f310 106 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_HIGH \
nikapov 0:a1a69d32f310 107 ((VL53L0X_GpioFunctionality) 2) /*!< Level High (value > thresh_high) */
nikapov 0:a1a69d32f310 108 #define VL53L0X_GPIOFUNCTIONALITY_THRESHOLD_CROSSED_OUT \
nikapov 0:a1a69d32f310 109 ((VL53L0X_GpioFunctionality) 3)
Davidroid 2:d07edeaff6f1 110 /*!< Out Of Window (value < thresh_low OR value > thresh_high) */
nikapov 0:a1a69d32f310 111 #define VL53L0X_GPIOFUNCTIONALITY_NEW_MEASURE_READY \
nikapov 0:a1a69d32f310 112 ((VL53L0X_GpioFunctionality) 4) /*!< New Sample Ready */
nikapov 0:a1a69d32f310 113
nikapov 0:a1a69d32f310 114 /** @} end of VL53L0X_GpioFunctionality_group */
nikapov 0:a1a69d32f310 115
nikapov 0:a1a69d32f310 116
nikapov 0:a1a69d32f310 117 /* Device register map */
nikapov 0:a1a69d32f310 118
nikapov 0:a1a69d32f310 119 /** @defgroup VL53L0X_DefineRegisters_group Define Registers
nikapov 0:a1a69d32f310 120 * @brief List of all the defined registers
nikapov 0:a1a69d32f310 121 * @{
nikapov 0:a1a69d32f310 122 */
nikapov 0:a1a69d32f310 123 #define VL53L0X_REG_SYSRANGE_START 0x000
Davidroid 2:d07edeaff6f1 124 /** mask existing bit in #VL53L0X_REG_SYSRANGE_START*/
Davidroid 2:d07edeaff6f1 125 #define VL53L0X_REG_SYSRANGE_MODE_MASK 0x0F
Davidroid 2:d07edeaff6f1 126 /** bit 0 in #VL53L0X_REG_SYSRANGE_START write 1 toggle state in
Davidroid 2:d07edeaff6f1 127 * continuous mode and arm next shot in single shot mode */
Davidroid 2:d07edeaff6f1 128 #define VL53L0X_REG_SYSRANGE_MODE_START_STOP 0x01
Davidroid 2:d07edeaff6f1 129 /** bit 1 write 0 in #VL53L0X_REG_SYSRANGE_START set single shot mode */
Davidroid 2:d07edeaff6f1 130 #define VL53L0X_REG_SYSRANGE_MODE_SINGLESHOT 0x00
Davidroid 2:d07edeaff6f1 131 /** bit 1 write 1 in #VL53L0X_REG_SYSRANGE_START set back-to-back
Davidroid 2:d07edeaff6f1 132 * operation mode */
Davidroid 2:d07edeaff6f1 133 #define VL53L0X_REG_SYSRANGE_MODE_BACKTOBACK 0x02
Davidroid 2:d07edeaff6f1 134 /** bit 2 write 1 in #VL53L0X_REG_SYSRANGE_START set timed operation
Davidroid 2:d07edeaff6f1 135 * mode */
Davidroid 2:d07edeaff6f1 136 #define VL53L0X_REG_SYSRANGE_MODE_TIMED 0x04
Davidroid 2:d07edeaff6f1 137 /** bit 3 write 1 in #VL53L0X_REG_SYSRANGE_START set histogram operation
Davidroid 2:d07edeaff6f1 138 * mode */
Davidroid 2:d07edeaff6f1 139 #define VL53L0X_REG_SYSRANGE_MODE_HISTOGRAM 0x08
nikapov 0:a1a69d32f310 140
nikapov 0:a1a69d32f310 141
nikapov 0:a1a69d32f310 142 #define VL53L0X_REG_SYSTEM_THRESH_HIGH 0x000C
nikapov 0:a1a69d32f310 143 #define VL53L0X_REG_SYSTEM_THRESH_LOW 0x000E
nikapov 0:a1a69d32f310 144
nikapov 0:a1a69d32f310 145
nikapov 0:a1a69d32f310 146 #define VL53L0X_REG_SYSTEM_SEQUENCE_CONFIG 0x0001
nikapov 0:a1a69d32f310 147 #define VL53L0X_REG_SYSTEM_RANGE_CONFIG 0x0009
nikapov 0:a1a69d32f310 148 #define VL53L0X_REG_SYSTEM_INTERMEASUREMENT_PERIOD 0x0004
nikapov 0:a1a69d32f310 149
nikapov 0:a1a69d32f310 150
nikapov 0:a1a69d32f310 151 #define VL53L0X_REG_SYSTEM_INTERRUPT_CONFIG_GPIO 0x000A
nikapov 0:a1a69d32f310 152 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_DISABLED 0x00
nikapov 0:a1a69d32f310 153 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_LOW 0x01
nikapov 0:a1a69d32f310 154 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_LEVEL_HIGH 0x02
nikapov 0:a1a69d32f310 155 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_OUT_OF_WINDOW 0x03
nikapov 0:a1a69d32f310 156 #define VL53L0X_REG_SYSTEM_INTERRUPT_GPIO_NEW_SAMPLE_READY 0x04
nikapov 0:a1a69d32f310 157
nikapov 0:a1a69d32f310 158 #define VL53L0X_REG_GPIO_HV_MUX_ACTIVE_HIGH 0x0084
nikapov 0:a1a69d32f310 159
nikapov 0:a1a69d32f310 160
nikapov 0:a1a69d32f310 161 #define VL53L0X_REG_SYSTEM_INTERRUPT_CLEAR 0x000B
nikapov 0:a1a69d32f310 162
nikapov 0:a1a69d32f310 163 /* Result registers */
nikapov 0:a1a69d32f310 164 #define VL53L0X_REG_RESULT_INTERRUPT_STATUS 0x0013
nikapov 0:a1a69d32f310 165 #define VL53L0X_REG_RESULT_RANGE_STATUS 0x0014
nikapov 0:a1a69d32f310 166
nikapov 0:a1a69d32f310 167 #define VL53L0X_REG_RESULT_CORE_PAGE 1
nikapov 0:a1a69d32f310 168 #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN 0x00BC
nikapov 0:a1a69d32f310 169 #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_RTN 0x00C0
nikapov 0:a1a69d32f310 170 #define VL53L0X_REG_RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF 0x00D0
nikapov 0:a1a69d32f310 171 #define VL53L0X_REG_RESULT_CORE_RANGING_TOTAL_EVENTS_REF 0x00D4
nikapov 0:a1a69d32f310 172 #define VL53L0X_REG_RESULT_PEAK_SIGNAL_RATE_REF 0x00B6
nikapov 0:a1a69d32f310 173
nikapov 0:a1a69d32f310 174 /* Algo register */
nikapov 0:a1a69d32f310 175
nikapov 0:a1a69d32f310 176 #define VL53L0X_REG_ALGO_PART_TO_PART_RANGE_OFFSET_MM 0x0028
nikapov 0:a1a69d32f310 177
nikapov 0:a1a69d32f310 178 #define VL53L0X_REG_I2C_SLAVE_DEVICE_ADDRESS 0x008a
nikapov 0:a1a69d32f310 179
nikapov 0:a1a69d32f310 180 /* Check Limit registers */
nikapov 0:a1a69d32f310 181 #define VL53L0X_REG_MSRC_CONFIG_CONTROL 0x0060
nikapov 0:a1a69d32f310 182
nikapov 0:a1a69d32f310 183 #define VL53L0X_REG_PRE_RANGE_CONFIG_MIN_SNR 0X0027
nikapov 0:a1a69d32f310 184 #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_LOW 0x0056
nikapov 0:a1a69d32f310 185 #define VL53L0X_REG_PRE_RANGE_CONFIG_VALID_PHASE_HIGH 0x0057
nikapov 0:a1a69d32f310 186 #define VL53L0X_REG_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT 0x0064
nikapov 0:a1a69d32f310 187
nikapov 0:a1a69d32f310 188 #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_SNR 0X0067
nikapov 0:a1a69d32f310 189 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_LOW 0x0047
nikapov 0:a1a69d32f310 190 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH 0x0048
nikapov 0:a1a69d32f310 191 #define VL53L0X_REG_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT 0x0044
nikapov 0:a1a69d32f310 192
nikapov 0:a1a69d32f310 193
nikapov 0:a1a69d32f310 194 #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_HI 0X0061
nikapov 0:a1a69d32f310 195 #define VL53L0X_REG_PRE_RANGE_CONFIG_SIGMA_THRESH_LO 0X0062
nikapov 0:a1a69d32f310 196
nikapov 0:a1a69d32f310 197 /* PRE RANGE registers */
nikapov 0:a1a69d32f310 198 #define VL53L0X_REG_PRE_RANGE_CONFIG_VCSEL_PERIOD 0x0050
nikapov 0:a1a69d32f310 199 #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0051
nikapov 0:a1a69d32f310 200 #define VL53L0X_REG_PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0052
nikapov 0:a1a69d32f310 201
nikapov 0:a1a69d32f310 202 #define VL53L0X_REG_SYSTEM_HISTOGRAM_BIN 0x0081
nikapov 0:a1a69d32f310 203 #define VL53L0X_REG_HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT 0x0033
nikapov 0:a1a69d32f310 204 #define VL53L0X_REG_HISTOGRAM_CONFIG_READOUT_CTRL 0x0055
nikapov 0:a1a69d32f310 205
nikapov 0:a1a69d32f310 206 #define VL53L0X_REG_FINAL_RANGE_CONFIG_VCSEL_PERIOD 0x0070
nikapov 0:a1a69d32f310 207 #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI 0x0071
nikapov 0:a1a69d32f310 208 #define VL53L0X_REG_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO 0x0072
nikapov 0:a1a69d32f310 209 #define VL53L0X_REG_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS 0x0020
nikapov 0:a1a69d32f310 210
nikapov 0:a1a69d32f310 211 #define VL53L0X_REG_MSRC_CONFIG_TIMEOUT_MACROP 0x0046
nikapov 0:a1a69d32f310 212
nikapov 0:a1a69d32f310 213
nikapov 0:a1a69d32f310 214 #define VL53L0X_REG_SOFT_RESET_GO2_SOFT_RESET_N 0x00bf
nikapov 0:a1a69d32f310 215 #define VL53L0X_REG_IDENTIFICATION_MODEL_ID 0x00c0
nikapov 0:a1a69d32f310 216 #define VL53L0X_REG_IDENTIFICATION_REVISION_ID 0x00c2
nikapov 0:a1a69d32f310 217
nikapov 0:a1a69d32f310 218 #define VL53L0X_REG_OSC_CALIBRATE_VAL 0x00f8
nikapov 0:a1a69d32f310 219
nikapov 0:a1a69d32f310 220
nikapov 0:a1a69d32f310 221 #define VL53L0X_SIGMA_ESTIMATE_MAX_VALUE 65535
nikapov 0:a1a69d32f310 222 /* equivalent to a range sigma of 655.35mm */
nikapov 0:a1a69d32f310 223
nikapov 0:a1a69d32f310 224 #define VL53L0X_REG_GLOBAL_CONFIG_VCSEL_WIDTH 0x032
nikapov 0:a1a69d32f310 225 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_0 0x0B0
nikapov 0:a1a69d32f310 226 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_1 0x0B1
nikapov 0:a1a69d32f310 227 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_2 0x0B2
nikapov 0:a1a69d32f310 228 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_3 0x0B3
nikapov 0:a1a69d32f310 229 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_4 0x0B4
nikapov 0:a1a69d32f310 230 #define VL53L0X_REG_GLOBAL_CONFIG_SPAD_ENABLES_REF_5 0x0B5
nikapov 0:a1a69d32f310 231
nikapov 0:a1a69d32f310 232 #define VL53L0X_REG_GLOBAL_CONFIG_REF_EN_START_SELECT 0xB6
nikapov 0:a1a69d32f310 233 #define VL53L0X_REG_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD 0x4E /* 0x14E */
nikapov 0:a1a69d32f310 234 #define VL53L0X_REG_DYNAMIC_SPAD_REF_EN_START_OFFSET 0x4F /* 0x14F */
nikapov 0:a1a69d32f310 235 #define VL53L0X_REG_POWER_MANAGEMENT_GO1_POWER_FORCE 0x80
nikapov 0:a1a69d32f310 236
nikapov 0:a1a69d32f310 237 /*
nikapov 0:a1a69d32f310 238 * Speed of light in um per 1E-10 Seconds
nikapov 0:a1a69d32f310 239 */
nikapov 0:a1a69d32f310 240
nikapov 0:a1a69d32f310 241 #define VL53L0X_SPEED_OF_LIGHT_IN_AIR 2997
nikapov 0:a1a69d32f310 242
nikapov 0:a1a69d32f310 243 #define VL53L0X_REG_VHV_CONFIG_PAD_SCL_SDA__EXTSUP_HV 0x0089
nikapov 0:a1a69d32f310 244
nikapov 0:a1a69d32f310 245 #define VL53L0X_REG_ALGO_PHASECAL_LIM 0x0030 /* 0x130 */
nikapov 0:a1a69d32f310 246 #define VL53L0X_REG_ALGO_PHASECAL_CONFIG_TIMEOUT 0x0030
nikapov 0:a1a69d32f310 247
nikapov 0:a1a69d32f310 248 /** @} VL53L0X_DefineRegisters_group */
nikapov 0:a1a69d32f310 249
nikapov 0:a1a69d32f310 250 /** @} VL53L0X_DevSpecDefines_group */
nikapov 0:a1a69d32f310 251
nikapov 0:a1a69d32f310 252
nikapov 0:a1a69d32f310 253 #endif
nikapov 0:a1a69d32f310 254
nikapov 0:a1a69d32f310 255 /* _VL53L0X_DEVICE_H_ */
nikapov 0:a1a69d32f310 256
nikapov 0:a1a69d32f310 257