Michael Spencer / Smoothie

Fork of Smoothie to port to mbed non-LPC targets.

Dependencies:   mbed

Fork of Smoothie by Stéphane Cachat

libs/LPC17xx/LPC17xxLib/src/lpc17xx_ssp.c@2:1df0b61d3b5a, 2014-02-28 (annotated)

Committer:
Michael J. Spencer
Date:
Fri Feb 28 18:52:52 2014 -0800
Revision:
2:1df0b61d3b5a
Update to latest Smoothie.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Michael J. Spencer 2:1df0b61d3b5a 1 #ifdef __LPC17XX__
Michael J. Spencer 2:1df0b61d3b5a 2
Michael J. Spencer 2:1df0b61d3b5a 3 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 4 * $Id$ lpc17xx_ssp.c 2010-06-18
Michael J. Spencer 2:1df0b61d3b5a 5 *//**
Michael J. Spencer 2:1df0b61d3b5a 6 * @file lpc17xx_ssp.c
Michael J. Spencer 2:1df0b61d3b5a 7 * @brief Contains all functions support for SSP firmware library on LPC17xx
Michael J. Spencer 2:1df0b61d3b5a 8 * @version 3.0
Michael J. Spencer 2:1df0b61d3b5a 9 * @date 18. June. 2010
Michael J. Spencer 2:1df0b61d3b5a 10 * @author NXP MCU SW Application Team
Michael J. Spencer 2:1df0b61d3b5a 11 *
Michael J. Spencer 2:1df0b61d3b5a 12 * Copyright(C) 2010, NXP Semiconductor
Michael J. Spencer 2:1df0b61d3b5a 13 * All rights reserved.
Michael J. Spencer 2:1df0b61d3b5a 14 *
Michael J. Spencer 2:1df0b61d3b5a 15 ***********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 16 * Software that is described herein is for illustrative purposes only
Michael J. Spencer 2:1df0b61d3b5a 17 * which provides customers with programming information regarding the
Michael J. Spencer 2:1df0b61d3b5a 18 * products. This software is supplied "AS IS" without any warranties.
Michael J. Spencer 2:1df0b61d3b5a 19 * NXP Semiconductors assumes no responsibility or liability for the
Michael J. Spencer 2:1df0b61d3b5a 20 * use of the software, conveys no license or title under any patent,
Michael J. Spencer 2:1df0b61d3b5a 21 * copyright, or mask work right to the product. NXP Semiconductors
Michael J. Spencer 2:1df0b61d3b5a 22 * reserves the right to make changes in the software without
Michael J. Spencer 2:1df0b61d3b5a 23 * notification. NXP Semiconductors also make no representation or
Michael J. Spencer 2:1df0b61d3b5a 24 * warranty that such application will be suitable for the specified
Michael J. Spencer 2:1df0b61d3b5a 25 * use without further testing or modification.
Michael J. Spencer 2:1df0b61d3b5a 26 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 27
Michael J. Spencer 2:1df0b61d3b5a 28 /* Peripheral group ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 29 /** @addtogroup SSP
Michael J. Spencer 2:1df0b61d3b5a 30 * @{
Michael J. Spencer 2:1df0b61d3b5a 31 */
Michael J. Spencer 2:1df0b61d3b5a 32
Michael J. Spencer 2:1df0b61d3b5a 33 /* Includes ------------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 34 #include "lpc17xx_ssp.h"
Michael J. Spencer 2:1df0b61d3b5a 35 #include "lpc17xx_clkpwr.h"
Michael J. Spencer 2:1df0b61d3b5a 36
Michael J. Spencer 2:1df0b61d3b5a 37
Michael J. Spencer 2:1df0b61d3b5a 38 /* If this source file built with example, the LPC17xx FW library configuration
Michael J. Spencer 2:1df0b61d3b5a 39 * file in each example directory ("lpc17xx_libcfg.h") must be included,
Michael J. Spencer 2:1df0b61d3b5a 40 * otherwise the default FW library configuration file must be included instead
Michael J. Spencer 2:1df0b61d3b5a 41 */
Michael J. Spencer 2:1df0b61d3b5a 42 #ifdef __BUILD_WITH_EXAMPLE__
Michael J. Spencer 2:1df0b61d3b5a 43 #include "lpc17xx_libcfg.h"
Michael J. Spencer 2:1df0b61d3b5a 44 #else
Michael J. Spencer 2:1df0b61d3b5a 45 #include "lpc17xx_libcfg_default.h"
Michael J. Spencer 2:1df0b61d3b5a 46 #endif /* __BUILD_WITH_EXAMPLE__ */
Michael J. Spencer 2:1df0b61d3b5a 47
Michael J. Spencer 2:1df0b61d3b5a 48
Michael J. Spencer 2:1df0b61d3b5a 49 #ifdef _SSP
Michael J. Spencer 2:1df0b61d3b5a 50
Michael J. Spencer 2:1df0b61d3b5a 51 /* Public Functions ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 52 /** @addtogroup SSP_Public_Functions
Michael J. Spencer 2:1df0b61d3b5a 53 * @{
Michael J. Spencer 2:1df0b61d3b5a 54 */
Michael J. Spencer 2:1df0b61d3b5a 55 static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock);
Michael J. Spencer 2:1df0b61d3b5a 56
Michael J. Spencer 2:1df0b61d3b5a 57 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 58 * @brief Setup clock rate for SSP device
Michael J. Spencer 2:1df0b61d3b5a 59 * @param[in] SSPx SSP peripheral definition, should be:
Michael J. Spencer 2:1df0b61d3b5a 60 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 61 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 62 * @param[in] target_clock : clock of SSP (Hz)
Michael J. Spencer 2:1df0b61d3b5a 63 * @return None
Michael J. Spencer 2:1df0b61d3b5a 64 ***********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 65 static void setSSPclock (LPC_SSP_TypeDef *SSPx, uint32_t target_clock)
Michael J. Spencer 2:1df0b61d3b5a 66 {
Michael J. Spencer 2:1df0b61d3b5a 67 uint32_t prescale, cr0_div, cmp_clk, ssp_clk;
Michael J. Spencer 2:1df0b61d3b5a 68
Michael J. Spencer 2:1df0b61d3b5a 69 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 70
Michael J. Spencer 2:1df0b61d3b5a 71 /* The SSP clock is derived from the (main system oscillator / 2),
Michael J. Spencer 2:1df0b61d3b5a 72 so compute the best divider from that clock */
Michael J. Spencer 2:1df0b61d3b5a 73 if (SSPx == LPC_SSP0){
Michael J. Spencer 2:1df0b61d3b5a 74 ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP0);
Michael J. Spencer 2:1df0b61d3b5a 75 } else if (SSPx == LPC_SSP1) {
Michael J. Spencer 2:1df0b61d3b5a 76 ssp_clk = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_SSP1);
Michael J. Spencer 2:1df0b61d3b5a 77 } else {
Michael J. Spencer 2:1df0b61d3b5a 78 return;
Michael J. Spencer 2:1df0b61d3b5a 79 }
Michael J. Spencer 2:1df0b61d3b5a 80
Michael J. Spencer 2:1df0b61d3b5a 81 /* Find closest divider to get at or under the target frequency.
Michael J. Spencer 2:1df0b61d3b5a 82 Use smallest prescale possible and rely on the divider to get
Michael J. Spencer 2:1df0b61d3b5a 83 the closest target frequency */
Michael J. Spencer 2:1df0b61d3b5a 84 cr0_div = 0;
Michael J. Spencer 2:1df0b61d3b5a 85 cmp_clk = 0xFFFFFFFF;
Michael J. Spencer 2:1df0b61d3b5a 86 prescale = 2;
Michael J. Spencer 2:1df0b61d3b5a 87 while (cmp_clk > target_clock)
Michael J. Spencer 2:1df0b61d3b5a 88 {
Michael J. Spencer 2:1df0b61d3b5a 89 cmp_clk = ssp_clk / ((cr0_div + 1) * prescale);
Michael J. Spencer 2:1df0b61d3b5a 90 if (cmp_clk > target_clock)
Michael J. Spencer 2:1df0b61d3b5a 91 {
Michael J. Spencer 2:1df0b61d3b5a 92 cr0_div++;
Michael J. Spencer 2:1df0b61d3b5a 93 if (cr0_div > 0xFF)
Michael J. Spencer 2:1df0b61d3b5a 94 {
Michael J. Spencer 2:1df0b61d3b5a 95 cr0_div = 0;
Michael J. Spencer 2:1df0b61d3b5a 96 prescale += 2;
Michael J. Spencer 2:1df0b61d3b5a 97 }
Michael J. Spencer 2:1df0b61d3b5a 98 }
Michael J. Spencer 2:1df0b61d3b5a 99 }
Michael J. Spencer 2:1df0b61d3b5a 100
Michael J. Spencer 2:1df0b61d3b5a 101 /* Write computed prescaler and divider back to register */
Michael J. Spencer 2:1df0b61d3b5a 102 SSPx->CR0 &= (~SSP_CR0_SCR(0xFF)) & SSP_CR0_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 103 SSPx->CR0 |= (SSP_CR0_SCR(cr0_div)) & SSP_CR0_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 104 SSPx->CPSR = prescale & SSP_CPSR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 105 }
Michael J. Spencer 2:1df0b61d3b5a 106
Michael J. Spencer 2:1df0b61d3b5a 107 /**
Michael J. Spencer 2:1df0b61d3b5a 108 * @}
Michael J. Spencer 2:1df0b61d3b5a 109 */
Michael J. Spencer 2:1df0b61d3b5a 110
Michael J. Spencer 2:1df0b61d3b5a 111 /* Public Functions ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 112 /** @addtogroup SSP_Public_Functions
Michael J. Spencer 2:1df0b61d3b5a 113 * @{
Michael J. Spencer 2:1df0b61d3b5a 114 */
Michael J. Spencer 2:1df0b61d3b5a 115
Michael J. Spencer 2:1df0b61d3b5a 116 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 117 * @brief Initializes the SSPx peripheral according to the specified
Michael J. Spencer 2:1df0b61d3b5a 118 * parameters in the SSP_ConfigStruct.
Michael J. Spencer 2:1df0b61d3b5a 119 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 120 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 121 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 122 * @param[in] SSP_ConfigStruct Pointer to a SSP_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 123 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 124 * specified SSP peripheral.
Michael J. Spencer 2:1df0b61d3b5a 125 * @return None
Michael J. Spencer 2:1df0b61d3b5a 126 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 127 void SSP_Init(LPC_SSP_TypeDef *SSPx, SSP_CFG_Type *SSP_ConfigStruct)
Michael J. Spencer 2:1df0b61d3b5a 128 {
Michael J. Spencer 2:1df0b61d3b5a 129 uint32_t tmp;
Michael J. Spencer 2:1df0b61d3b5a 130
Michael J. Spencer 2:1df0b61d3b5a 131 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 132
Michael J. Spencer 2:1df0b61d3b5a 133 if(SSPx == LPC_SSP0) {
Michael J. Spencer 2:1df0b61d3b5a 134 /* Set up clock and power for SSP0 module */
Michael J. Spencer 2:1df0b61d3b5a 135 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 136 } else if(SSPx == LPC_SSP1) {
Michael J. Spencer 2:1df0b61d3b5a 137 /* Set up clock and power for SSP1 module */
Michael J. Spencer 2:1df0b61d3b5a 138 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 139 } else {
Michael J. Spencer 2:1df0b61d3b5a 140 return;
Michael J. Spencer 2:1df0b61d3b5a 141 }
Michael J. Spencer 2:1df0b61d3b5a 142
Michael J. Spencer 2:1df0b61d3b5a 143 /* Configure SSP, interrupt is disable, LoopBack mode is disable,
Michael J. Spencer 2:1df0b61d3b5a 144 * SSP is disable, Slave output is disable as default
Michael J. Spencer 2:1df0b61d3b5a 145 */
Michael J. Spencer 2:1df0b61d3b5a 146 tmp = ((SSP_ConfigStruct->CPHA) | (SSP_ConfigStruct->CPOL) \
Michael J. Spencer 2:1df0b61d3b5a 147 | (SSP_ConfigStruct->FrameFormat) | (SSP_ConfigStruct->Databit))
Michael J. Spencer 2:1df0b61d3b5a 148 & SSP_CR0_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 149 // write back to SSP control register
Michael J. Spencer 2:1df0b61d3b5a 150 SSPx->CR0 = tmp;
Michael J. Spencer 2:1df0b61d3b5a 151
Michael J. Spencer 2:1df0b61d3b5a 152 tmp = SSP_ConfigStruct->Mode & SSP_CR1_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 153 // Write back to CR1
Michael J. Spencer 2:1df0b61d3b5a 154 SSPx->CR1 = tmp;
Michael J. Spencer 2:1df0b61d3b5a 155
Michael J. Spencer 2:1df0b61d3b5a 156 // Set clock rate for SSP peripheral
Michael J. Spencer 2:1df0b61d3b5a 157 setSSPclock(SSPx, SSP_ConfigStruct->ClockRate);
Michael J. Spencer 2:1df0b61d3b5a 158 }
Michael J. Spencer 2:1df0b61d3b5a 159
Michael J. Spencer 2:1df0b61d3b5a 160 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 161 * @brief De-initializes the SSPx peripheral registers to their
Michael J. Spencer 2:1df0b61d3b5a 162 * default reset values.
Michael J. Spencer 2:1df0b61d3b5a 163 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 164 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 165 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 166 * @return None
Michael J. Spencer 2:1df0b61d3b5a 167 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 168 void SSP_DeInit(LPC_SSP_TypeDef* SSPx)
Michael J. Spencer 2:1df0b61d3b5a 169 {
Michael J. Spencer 2:1df0b61d3b5a 170 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 171
Michael J. Spencer 2:1df0b61d3b5a 172 if (SSPx == LPC_SSP0){
Michael J. Spencer 2:1df0b61d3b5a 173 /* Set up clock and power for SSP0 module */
Michael J. Spencer 2:1df0b61d3b5a 174 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP0, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 175 } else if (SSPx == LPC_SSP1) {
Michael J. Spencer 2:1df0b61d3b5a 176 /* Set up clock and power for SSP1 module */
Michael J. Spencer 2:1df0b61d3b5a 177 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCSSP1, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 178 }
Michael J. Spencer 2:1df0b61d3b5a 179 }
Michael J. Spencer 2:1df0b61d3b5a 180
Michael J. Spencer 2:1df0b61d3b5a 181 /*****************************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 182 * @brief Get data size bit selected
Michael J. Spencer 2:1df0b61d3b5a 183 * @param[in] SSPx pointer to LPC_SSP_TypeDef structure, should be:
Michael J. Spencer 2:1df0b61d3b5a 184 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 185 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 186 * @return Data size, could be:
Michael J. Spencer 2:1df0b61d3b5a 187 * - SSP_DATABIT_4: 4 bit transfer
Michael J. Spencer 2:1df0b61d3b5a 188 * - SSP_DATABIT_5: 5 bit transfer
Michael J. Spencer 2:1df0b61d3b5a 189 * ...
Michael J. Spencer 2:1df0b61d3b5a 190 * - SSP_DATABIT_16: 16 bit transfer
Michael J. Spencer 2:1df0b61d3b5a 191 *******************************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 192 uint8_t SSP_GetDataSize(LPC_SSP_TypeDef* SSPx)
Michael J. Spencer 2:1df0b61d3b5a 193 {
Michael J. Spencer 2:1df0b61d3b5a 194 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 195 return (SSPx->CR0 & (0xF));
Michael J. Spencer 2:1df0b61d3b5a 196 }
Michael J. Spencer 2:1df0b61d3b5a 197
Michael J. Spencer 2:1df0b61d3b5a 198 /*****************************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 199 * @brief Fills each SSP_InitStruct member with its default value:
Michael J. Spencer 2:1df0b61d3b5a 200 * - CPHA = SSP_CPHA_FIRST
Michael J. Spencer 2:1df0b61d3b5a 201 * - CPOL = SSP_CPOL_HI
Michael J. Spencer 2:1df0b61d3b5a 202 * - ClockRate = 1000000
Michael J. Spencer 2:1df0b61d3b5a 203 * - Databit = SSP_DATABIT_8
Michael J. Spencer 2:1df0b61d3b5a 204 * - Mode = SSP_MASTER_MODE
Michael J. Spencer 2:1df0b61d3b5a 205 * - FrameFormat = SSP_FRAME_SSP
Michael J. Spencer 2:1df0b61d3b5a 206 * @param[in] SSP_InitStruct Pointer to a SSP_CFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 207 * which will be initialized.
Michael J. Spencer 2:1df0b61d3b5a 208 * @return None
Michael J. Spencer 2:1df0b61d3b5a 209 *******************************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 210 void SSP_ConfigStructInit(SSP_CFG_Type *SSP_InitStruct)
Michael J. Spencer 2:1df0b61d3b5a 211 {
Michael J. Spencer 2:1df0b61d3b5a 212 SSP_InitStruct->CPHA = SSP_CPHA_FIRST;
Michael J. Spencer 2:1df0b61d3b5a 213 SSP_InitStruct->CPOL = SSP_CPOL_HI;
Michael J. Spencer 2:1df0b61d3b5a 214 SSP_InitStruct->ClockRate = 1000000;
Michael J. Spencer 2:1df0b61d3b5a 215 SSP_InitStruct->Databit = SSP_DATABIT_8;
Michael J. Spencer 2:1df0b61d3b5a 216 SSP_InitStruct->Mode = SSP_MASTER_MODE;
Michael J. Spencer 2:1df0b61d3b5a 217 SSP_InitStruct->FrameFormat = SSP_FRAME_SPI;
Michael J. Spencer 2:1df0b61d3b5a 218 }
Michael J. Spencer 2:1df0b61d3b5a 219
Michael J. Spencer 2:1df0b61d3b5a 220
Michael J. Spencer 2:1df0b61d3b5a 221 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 222 * @brief Enable or disable SSP peripheral's operation
Michael J. Spencer 2:1df0b61d3b5a 223 * @param[in] SSPx SSP peripheral, should be:
Michael J. Spencer 2:1df0b61d3b5a 224 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 225 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 226 * @param[in] NewState New State of SSPx peripheral's operation
Michael J. Spencer 2:1df0b61d3b5a 227 * @return none
Michael J. Spencer 2:1df0b61d3b5a 228 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 229 void SSP_Cmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 230 {
Michael J. Spencer 2:1df0b61d3b5a 231 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 232 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 233
Michael J. Spencer 2:1df0b61d3b5a 234 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 235 {
Michael J. Spencer 2:1df0b61d3b5a 236 SSPx->CR1 |= SSP_CR1_SSP_EN;
Michael J. Spencer 2:1df0b61d3b5a 237 }
Michael J. Spencer 2:1df0b61d3b5a 238 else
Michael J. Spencer 2:1df0b61d3b5a 239 {
Michael J. Spencer 2:1df0b61d3b5a 240 SSPx->CR1 &= (~SSP_CR1_SSP_EN) & SSP_CR1_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 241 }
Michael J. Spencer 2:1df0b61d3b5a 242 }
Michael J. Spencer 2:1df0b61d3b5a 243
Michael J. Spencer 2:1df0b61d3b5a 244 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 245 * @brief Enable or disable Loop Back mode function in SSP peripheral
Michael J. Spencer 2:1df0b61d3b5a 246 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 247 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 248 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 249 * @param[in] NewState New State of Loop Back mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 250 * - ENABLE: Enable this function
Michael J. Spencer 2:1df0b61d3b5a 251 * - DISABLE: Disable this function
Michael J. Spencer 2:1df0b61d3b5a 252 * @return None
Michael J. Spencer 2:1df0b61d3b5a 253 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 254 void SSP_LoopBackCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 255 {
Michael J. Spencer 2:1df0b61d3b5a 256 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 257 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 258
Michael J. Spencer 2:1df0b61d3b5a 259 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 260 {
Michael J. Spencer 2:1df0b61d3b5a 261 SSPx->CR1 |= SSP_CR1_LBM_EN;
Michael J. Spencer 2:1df0b61d3b5a 262 }
Michael J. Spencer 2:1df0b61d3b5a 263 else
Michael J. Spencer 2:1df0b61d3b5a 264 {
Michael J. Spencer 2:1df0b61d3b5a 265 SSPx->CR1 &= (~SSP_CR1_LBM_EN) & SSP_CR1_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 266 }
Michael J. Spencer 2:1df0b61d3b5a 267 }
Michael J. Spencer 2:1df0b61d3b5a 268
Michael J. Spencer 2:1df0b61d3b5a 269 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 270 * @brief Enable or disable Slave Output function in SSP peripheral
Michael J. Spencer 2:1df0b61d3b5a 271 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 272 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 273 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 274 * @param[in] NewState New State of Slave Output function, should be:
Michael J. Spencer 2:1df0b61d3b5a 275 * - ENABLE: Slave Output in normal operation
Michael J. Spencer 2:1df0b61d3b5a 276 * - DISABLE: Slave Output is disabled. This blocks
Michael J. Spencer 2:1df0b61d3b5a 277 * SSP controller from driving the transmit data
Michael J. Spencer 2:1df0b61d3b5a 278 * line (MISO)
Michael J. Spencer 2:1df0b61d3b5a 279 * Note: This function is available when SSP peripheral in Slave mode
Michael J. Spencer 2:1df0b61d3b5a 280 * @return None
Michael J. Spencer 2:1df0b61d3b5a 281 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 282 void SSP_SlaveOutputCmd(LPC_SSP_TypeDef* SSPx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 283 {
Michael J. Spencer 2:1df0b61d3b5a 284 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 285 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 286
Michael J. Spencer 2:1df0b61d3b5a 287 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 288 {
Michael J. Spencer 2:1df0b61d3b5a 289 SSPx->CR1 &= (~SSP_CR1_SO_DISABLE) & SSP_CR1_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 290 }
Michael J. Spencer 2:1df0b61d3b5a 291 else
Michael J. Spencer 2:1df0b61d3b5a 292 {
Michael J. Spencer 2:1df0b61d3b5a 293 SSPx->CR1 |= SSP_CR1_SO_DISABLE;
Michael J. Spencer 2:1df0b61d3b5a 294 }
Michael J. Spencer 2:1df0b61d3b5a 295 }
Michael J. Spencer 2:1df0b61d3b5a 296
Michael J. Spencer 2:1df0b61d3b5a 297
Michael J. Spencer 2:1df0b61d3b5a 298
Michael J. Spencer 2:1df0b61d3b5a 299 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 300 * @brief Transmit a single data through SSPx peripheral
Michael J. Spencer 2:1df0b61d3b5a 301 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 302 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 303 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 304 * @param[in] Data Data to transmit (must be 16 or 8-bit long,
Michael J. Spencer 2:1df0b61d3b5a 305 * this depend on SSP data bit number configured)
Michael J. Spencer 2:1df0b61d3b5a 306 * @return none
Michael J. Spencer 2:1df0b61d3b5a 307 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 308 void SSP_SendData(LPC_SSP_TypeDef* SSPx, uint16_t Data)
Michael J. Spencer 2:1df0b61d3b5a 309 {
Michael J. Spencer 2:1df0b61d3b5a 310 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 311
Michael J. Spencer 2:1df0b61d3b5a 312 SSPx->DR = SSP_DR_BITMASK(Data);
Michael J. Spencer 2:1df0b61d3b5a 313 }
Michael J. Spencer 2:1df0b61d3b5a 314
Michael J. Spencer 2:1df0b61d3b5a 315
Michael J. Spencer 2:1df0b61d3b5a 316
Michael J. Spencer 2:1df0b61d3b5a 317 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 318 * @brief Receive a single data from SSPx peripheral
Michael J. Spencer 2:1df0b61d3b5a 319 * @param[in] SSPx SSP peripheral selected, should be
Michael J. Spencer 2:1df0b61d3b5a 320 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 321 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 322 * @return Data received (16-bit long)
Michael J. Spencer 2:1df0b61d3b5a 323 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 324 uint16_t SSP_ReceiveData(LPC_SSP_TypeDef* SSPx)
Michael J. Spencer 2:1df0b61d3b5a 325 {
Michael J. Spencer 2:1df0b61d3b5a 326 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 327
Michael J. Spencer 2:1df0b61d3b5a 328 return ((uint16_t) (SSP_DR_BITMASK(SSPx->DR)));
Michael J. Spencer 2:1df0b61d3b5a 329 }
Michael J. Spencer 2:1df0b61d3b5a 330
Michael J. Spencer 2:1df0b61d3b5a 331 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 332 * @brief SSP Read write data function
Michael J. Spencer 2:1df0b61d3b5a 333 * @param[in] SSPx Pointer to SSP peripheral, should be
Michael J. Spencer 2:1df0b61d3b5a 334 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 335 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 336 * @param[in] dataCfg Pointer to a SSP_DATA_SETUP_Type structure that
Michael J. Spencer 2:1df0b61d3b5a 337 * contains specified information about transmit
Michael J. Spencer 2:1df0b61d3b5a 338 * data configuration.
Michael J. Spencer 2:1df0b61d3b5a 339 * @param[in] xfType Transfer type, should be:
Michael J. Spencer 2:1df0b61d3b5a 340 * - SSP_TRANSFER_POLLING: Polling mode
Michael J. Spencer 2:1df0b61d3b5a 341 * - SSP_TRANSFER_INTERRUPT: Interrupt mode
Michael J. Spencer 2:1df0b61d3b5a 342 * @return Actual Data length has been transferred in polling mode.
Michael J. Spencer 2:1df0b61d3b5a 343 * In interrupt mode, always return (0)
Michael J. Spencer 2:1df0b61d3b5a 344 * Return (-1) if error.
Michael J. Spencer 2:1df0b61d3b5a 345 * Note: This function can be used in both master and slave mode.
Michael J. Spencer 2:1df0b61d3b5a 346 ***********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 347 int32_t SSP_ReadWrite (LPC_SSP_TypeDef *SSPx, SSP_DATA_SETUP_Type *dataCfg, \
Michael J. Spencer 2:1df0b61d3b5a 348 SSP_TRANSFER_Type xfType)
Michael J. Spencer 2:1df0b61d3b5a 349 {
Michael J. Spencer 2:1df0b61d3b5a 350 uint8_t *rdata8 = NULL;
Michael J. Spencer 2:1df0b61d3b5a 351 uint8_t *wdata8 = NULL;
Michael J. Spencer 2:1df0b61d3b5a 352 uint16_t *rdata16 = NULL;
Michael J. Spencer 2:1df0b61d3b5a 353 uint16_t *wdata16 = NULL;
Michael J. Spencer 2:1df0b61d3b5a 354 uint32_t stat;
Michael J. Spencer 2:1df0b61d3b5a 355 uint32_t tmp;
Michael J. Spencer 2:1df0b61d3b5a 356 int32_t dataword;
Michael J. Spencer 2:1df0b61d3b5a 357
Michael J. Spencer 2:1df0b61d3b5a 358 dataCfg->rx_cnt = 0;
Michael J. Spencer 2:1df0b61d3b5a 359 dataCfg->tx_cnt = 0;
Michael J. Spencer 2:1df0b61d3b5a 360 dataCfg->status = 0;
Michael J. Spencer 2:1df0b61d3b5a 361
Michael J. Spencer 2:1df0b61d3b5a 362
Michael J. Spencer 2:1df0b61d3b5a 363 /* Clear all remaining data in RX FIFO */
Michael J. Spencer 2:1df0b61d3b5a 364 while (SSPx->SR & SSP_SR_RNE){
Michael J. Spencer 2:1df0b61d3b5a 365 tmp = (uint32_t) SSP_ReceiveData(SSPx);
Michael J. Spencer 2:1df0b61d3b5a 366 }
Michael J. Spencer 2:1df0b61d3b5a 367
Michael J. Spencer 2:1df0b61d3b5a 368 // Clear status
Michael J. Spencer 2:1df0b61d3b5a 369 SSPx->ICR = SSP_ICR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 370 if(SSP_GetDataSize(SSPx)>8)
Michael J. Spencer 2:1df0b61d3b5a 371 dataword = 1;
Michael J. Spencer 2:1df0b61d3b5a 372 else dataword = 0;
Michael J. Spencer 2:1df0b61d3b5a 373
Michael J. Spencer 2:1df0b61d3b5a 374 // Polling mode ----------------------------------------------------------------------
Michael J. Spencer 2:1df0b61d3b5a 375 if (xfType == SSP_TRANSFER_POLLING){
Michael J. Spencer 2:1df0b61d3b5a 376 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 377 rdata8 = (uint8_t *)dataCfg->rx_data;
Michael J. Spencer 2:1df0b61d3b5a 378 wdata8 = (uint8_t *)dataCfg->tx_data;
Michael J. Spencer 2:1df0b61d3b5a 379 } else {
Michael J. Spencer 2:1df0b61d3b5a 380 rdata16 = (uint16_t *)dataCfg->rx_data;
Michael J. Spencer 2:1df0b61d3b5a 381 wdata16 = (uint16_t *)dataCfg->tx_data;
Michael J. Spencer 2:1df0b61d3b5a 382 }
Michael J. Spencer 2:1df0b61d3b5a 383 while ((dataCfg->tx_cnt != dataCfg->length) || (dataCfg->rx_cnt != dataCfg->length)){
Michael J. Spencer 2:1df0b61d3b5a 384 if ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt != dataCfg->length)){
Michael J. Spencer 2:1df0b61d3b5a 385 // Write data to buffer
Michael J. Spencer 2:1df0b61d3b5a 386 if(dataCfg->tx_data == NULL){
Michael J. Spencer 2:1df0b61d3b5a 387 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 388 SSP_SendData(SSPx, 0xFF);
Michael J. Spencer 2:1df0b61d3b5a 389 dataCfg->tx_cnt++;
Michael J. Spencer 2:1df0b61d3b5a 390 } else {
Michael J. Spencer 2:1df0b61d3b5a 391 SSP_SendData(SSPx, 0xFFFF);
Michael J. Spencer 2:1df0b61d3b5a 392 dataCfg->tx_cnt += 2;
Michael J. Spencer 2:1df0b61d3b5a 393 }
Michael J. Spencer 2:1df0b61d3b5a 394 } else {
Michael J. Spencer 2:1df0b61d3b5a 395 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 396 SSP_SendData(SSPx, *wdata8);
Michael J. Spencer 2:1df0b61d3b5a 397 wdata8++;
Michael J. Spencer 2:1df0b61d3b5a 398 dataCfg->tx_cnt++;
Michael J. Spencer 2:1df0b61d3b5a 399 } else {
Michael J. Spencer 2:1df0b61d3b5a 400 SSP_SendData(SSPx, *wdata16);
Michael J. Spencer 2:1df0b61d3b5a 401 wdata16++;
Michael J. Spencer 2:1df0b61d3b5a 402 dataCfg->tx_cnt += 2;
Michael J. Spencer 2:1df0b61d3b5a 403 }
Michael J. Spencer 2:1df0b61d3b5a 404 }
Michael J. Spencer 2:1df0b61d3b5a 405 }
Michael J. Spencer 2:1df0b61d3b5a 406
Michael J. Spencer 2:1df0b61d3b5a 407 // Check overrun error
Michael J. Spencer 2:1df0b61d3b5a 408 if ((stat = SSPx->RIS) & SSP_RIS_ROR){
Michael J. Spencer 2:1df0b61d3b5a 409 // save status and return
Michael J. Spencer 2:1df0b61d3b5a 410 dataCfg->status = stat | SSP_STAT_ERROR;
Michael J. Spencer 2:1df0b61d3b5a 411 return (-1);
Michael J. Spencer 2:1df0b61d3b5a 412 }
Michael J. Spencer 2:1df0b61d3b5a 413
Michael J. Spencer 2:1df0b61d3b5a 414 // Check for any data available in RX FIFO
Michael J. Spencer 2:1df0b61d3b5a 415 while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt != dataCfg->length)){
Michael J. Spencer 2:1df0b61d3b5a 416 // Read data from SSP data
Michael J. Spencer 2:1df0b61d3b5a 417 tmp = SSP_ReceiveData(SSPx);
Michael J. Spencer 2:1df0b61d3b5a 418
Michael J. Spencer 2:1df0b61d3b5a 419 // Store data to destination
Michael J. Spencer 2:1df0b61d3b5a 420 if (dataCfg->rx_data != NULL)
Michael J. Spencer 2:1df0b61d3b5a 421 {
Michael J. Spencer 2:1df0b61d3b5a 422 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 423 *(rdata8) = (uint8_t) tmp;
Michael J. Spencer 2:1df0b61d3b5a 424 rdata8++;
Michael J. Spencer 2:1df0b61d3b5a 425 } else {
Michael J. Spencer 2:1df0b61d3b5a 426 *(rdata16) = (uint16_t) tmp;
Michael J. Spencer 2:1df0b61d3b5a 427 rdata16++;
Michael J. Spencer 2:1df0b61d3b5a 428 }
Michael J. Spencer 2:1df0b61d3b5a 429 }
Michael J. Spencer 2:1df0b61d3b5a 430 // Increase counter
Michael J. Spencer 2:1df0b61d3b5a 431 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 432 dataCfg->rx_cnt++;
Michael J. Spencer 2:1df0b61d3b5a 433 } else {
Michael J. Spencer 2:1df0b61d3b5a 434 dataCfg->rx_cnt += 2;
Michael J. Spencer 2:1df0b61d3b5a 435 }
Michael J. Spencer 2:1df0b61d3b5a 436 }
Michael J. Spencer 2:1df0b61d3b5a 437 }
Michael J. Spencer 2:1df0b61d3b5a 438
Michael J. Spencer 2:1df0b61d3b5a 439 // save status
Michael J. Spencer 2:1df0b61d3b5a 440 dataCfg->status = SSP_STAT_DONE;
Michael J. Spencer 2:1df0b61d3b5a 441
Michael J. Spencer 2:1df0b61d3b5a 442 if (dataCfg->tx_data != NULL){
Michael J. Spencer 2:1df0b61d3b5a 443 return dataCfg->tx_cnt;
Michael J. Spencer 2:1df0b61d3b5a 444 } else if (dataCfg->rx_data != NULL){
Michael J. Spencer 2:1df0b61d3b5a 445 return dataCfg->rx_cnt;
Michael J. Spencer 2:1df0b61d3b5a 446 } else {
Michael J. Spencer 2:1df0b61d3b5a 447 return (0);
Michael J. Spencer 2:1df0b61d3b5a 448 }
Michael J. Spencer 2:1df0b61d3b5a 449 }
Michael J. Spencer 2:1df0b61d3b5a 450
Michael J. Spencer 2:1df0b61d3b5a 451 // Interrupt mode ----------------------------------------------------------------------
Michael J. Spencer 2:1df0b61d3b5a 452 else if (xfType == SSP_TRANSFER_INTERRUPT){
Michael J. Spencer 2:1df0b61d3b5a 453
Michael J. Spencer 2:1df0b61d3b5a 454 while ((SSPx->SR & SSP_SR_TNF) && (dataCfg->tx_cnt != dataCfg->length)){
Michael J. Spencer 2:1df0b61d3b5a 455 // Write data to buffer
Michael J. Spencer 2:1df0b61d3b5a 456 if(dataCfg->tx_data == NULL){
Michael J. Spencer 2:1df0b61d3b5a 457 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 458 SSP_SendData(SSPx, 0xFF);
Michael J. Spencer 2:1df0b61d3b5a 459 dataCfg->tx_cnt++;
Michael J. Spencer 2:1df0b61d3b5a 460 } else {
Michael J. Spencer 2:1df0b61d3b5a 461 SSP_SendData(SSPx, 0xFFFF);
Michael J. Spencer 2:1df0b61d3b5a 462 dataCfg->tx_cnt += 2;
Michael J. Spencer 2:1df0b61d3b5a 463 }
Michael J. Spencer 2:1df0b61d3b5a 464 } else {
Michael J. Spencer 2:1df0b61d3b5a 465 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 466 SSP_SendData(SSPx, (*(uint8_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
Michael J. Spencer 2:1df0b61d3b5a 467 dataCfg->tx_cnt++;
Michael J. Spencer 2:1df0b61d3b5a 468 } else {
Michael J. Spencer 2:1df0b61d3b5a 469 SSP_SendData(SSPx, (*(uint16_t *)((uint32_t)dataCfg->tx_data + dataCfg->tx_cnt)));
Michael J. Spencer 2:1df0b61d3b5a 470 dataCfg->tx_cnt += 2;
Michael J. Spencer 2:1df0b61d3b5a 471 }
Michael J. Spencer 2:1df0b61d3b5a 472 }
Michael J. Spencer 2:1df0b61d3b5a 473
Michael J. Spencer 2:1df0b61d3b5a 474 // Check error
Michael J. Spencer 2:1df0b61d3b5a 475 if ((stat = SSPx->RIS) & SSP_RIS_ROR){
Michael J. Spencer 2:1df0b61d3b5a 476 // save status and return
Michael J. Spencer 2:1df0b61d3b5a 477 dataCfg->status = stat | SSP_STAT_ERROR;
Michael J. Spencer 2:1df0b61d3b5a 478 return (-1);
Michael J. Spencer 2:1df0b61d3b5a 479 }
Michael J. Spencer 2:1df0b61d3b5a 480
Michael J. Spencer 2:1df0b61d3b5a 481 // Check for any data available in RX FIFO
Michael J. Spencer 2:1df0b61d3b5a 482 while ((SSPx->SR & SSP_SR_RNE) && (dataCfg->rx_cnt != dataCfg->length)){
Michael J. Spencer 2:1df0b61d3b5a 483 // Read data from SSP data
Michael J. Spencer 2:1df0b61d3b5a 484 tmp = SSP_ReceiveData(SSPx);
Michael J. Spencer 2:1df0b61d3b5a 485
Michael J. Spencer 2:1df0b61d3b5a 486 // Store data to destination
Michael J. Spencer 2:1df0b61d3b5a 487 if (dataCfg->rx_data != NULL)
Michael J. Spencer 2:1df0b61d3b5a 488 {
Michael J. Spencer 2:1df0b61d3b5a 489 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 490 *(uint8_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint8_t) tmp;
Michael J. Spencer 2:1df0b61d3b5a 491 } else {
Michael J. Spencer 2:1df0b61d3b5a 492 *(uint16_t *)((uint32_t)dataCfg->rx_data + dataCfg->rx_cnt) = (uint16_t) tmp;
Michael J. Spencer 2:1df0b61d3b5a 493 }
Michael J. Spencer 2:1df0b61d3b5a 494 }
Michael J. Spencer 2:1df0b61d3b5a 495 // Increase counter
Michael J. Spencer 2:1df0b61d3b5a 496 if (dataword == 0){
Michael J. Spencer 2:1df0b61d3b5a 497 dataCfg->rx_cnt++;
Michael J. Spencer 2:1df0b61d3b5a 498 } else {
Michael J. Spencer 2:1df0b61d3b5a 499 dataCfg->rx_cnt += 2;
Michael J. Spencer 2:1df0b61d3b5a 500 }
Michael J. Spencer 2:1df0b61d3b5a 501 }
Michael J. Spencer 2:1df0b61d3b5a 502 }
Michael J. Spencer 2:1df0b61d3b5a 503
Michael J. Spencer 2:1df0b61d3b5a 504 // If there more data to sent or receive
Michael J. Spencer 2:1df0b61d3b5a 505 if ((dataCfg->rx_cnt != dataCfg->length) || (dataCfg->tx_cnt != dataCfg->length)){
Michael J. Spencer 2:1df0b61d3b5a 506 // Enable all interrupt
Michael J. Spencer 2:1df0b61d3b5a 507 SSPx->IMSC = SSP_IMSC_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 508 } else {
Michael J. Spencer 2:1df0b61d3b5a 509 // Save status
Michael J. Spencer 2:1df0b61d3b5a 510 dataCfg->status = SSP_STAT_DONE;
Michael J. Spencer 2:1df0b61d3b5a 511 }
Michael J. Spencer 2:1df0b61d3b5a 512 return (0);
Michael J. Spencer 2:1df0b61d3b5a 513 }
Michael J. Spencer 2:1df0b61d3b5a 514
Michael J. Spencer 2:1df0b61d3b5a 515 return (-1);
Michael J. Spencer 2:1df0b61d3b5a 516 }
Michael J. Spencer 2:1df0b61d3b5a 517
Michael J. Spencer 2:1df0b61d3b5a 518 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 519 * @brief Checks whether the specified SSP status flag is set or not
Michael J. Spencer 2:1df0b61d3b5a 520 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 521 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 522 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 523 * @param[in] FlagType Type of flag to check status, should be one
Michael J. Spencer 2:1df0b61d3b5a 524 * of following:
Michael J. Spencer 2:1df0b61d3b5a 525 * - SSP_STAT_TXFIFO_EMPTY: TX FIFO is empty
Michael J. Spencer 2:1df0b61d3b5a 526 * - SSP_STAT_TXFIFO_NOTFULL: TX FIFO is not full
Michael J. Spencer 2:1df0b61d3b5a 527 * - SSP_STAT_RXFIFO_NOTEMPTY: RX FIFO is not empty
Michael J. Spencer 2:1df0b61d3b5a 528 * - SSP_STAT_RXFIFO_FULL: RX FIFO is full
Michael J. Spencer 2:1df0b61d3b5a 529 * - SSP_STAT_BUSY: SSP peripheral is busy
Michael J. Spencer 2:1df0b61d3b5a 530 * @return New State of specified SSP status flag
Michael J. Spencer 2:1df0b61d3b5a 531 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 532 FlagStatus SSP_GetStatus(LPC_SSP_TypeDef* SSPx, uint32_t FlagType)
Michael J. Spencer 2:1df0b61d3b5a 533 {
Michael J. Spencer 2:1df0b61d3b5a 534 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 535 CHECK_PARAM(PARAM_SSP_STAT(FlagType));
Michael J. Spencer 2:1df0b61d3b5a 536
Michael J. Spencer 2:1df0b61d3b5a 537 return ((SSPx->SR & FlagType) ? SET : RESET);
Michael J. Spencer 2:1df0b61d3b5a 538 }
Michael J. Spencer 2:1df0b61d3b5a 539
Michael J. Spencer 2:1df0b61d3b5a 540 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 541 * @brief Enable or disable specified interrupt type in SSP peripheral
Michael J. Spencer 2:1df0b61d3b5a 542 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 543 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 544 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 545 * @param[in] IntType Interrupt type in SSP peripheral, should be:
Michael J. Spencer 2:1df0b61d3b5a 546 * - SSP_INTCFG_ROR: Receive Overrun interrupt
Michael J. Spencer 2:1df0b61d3b5a 547 * - SSP_INTCFG_RT: Receive Time out interrupt
Michael J. Spencer 2:1df0b61d3b5a 548 * - SSP_INTCFG_RX: RX FIFO is at least half full interrupt
Michael J. Spencer 2:1df0b61d3b5a 549 * - SSP_INTCFG_TX: TX FIFO is at least half empty interrupt
Michael J. Spencer 2:1df0b61d3b5a 550 * @param[in] NewState New State of specified interrupt type, should be:
Michael J. Spencer 2:1df0b61d3b5a 551 * - ENABLE: Enable this interrupt type
Michael J. Spencer 2:1df0b61d3b5a 552 * - DISABLE: Disable this interrupt type
Michael J. Spencer 2:1df0b61d3b5a 553 * @return None
Michael J. Spencer 2:1df0b61d3b5a 554 * Note: We can enable/disable multi-interrupt type by OR multi value
Michael J. Spencer 2:1df0b61d3b5a 555 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 556 void SSP_IntConfig(LPC_SSP_TypeDef *SSPx, uint32_t IntType, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 557 {
Michael J. Spencer 2:1df0b61d3b5a 558 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 559
Michael J. Spencer 2:1df0b61d3b5a 560 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 561 {
Michael J. Spencer 2:1df0b61d3b5a 562 SSPx->IMSC |= IntType;
Michael J. Spencer 2:1df0b61d3b5a 563 }
Michael J. Spencer 2:1df0b61d3b5a 564 else
Michael J. Spencer 2:1df0b61d3b5a 565 {
Michael J. Spencer 2:1df0b61d3b5a 566 SSPx->IMSC &= (~IntType) & SSP_IMSC_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 567 }
Michael J. Spencer 2:1df0b61d3b5a 568 }
Michael J. Spencer 2:1df0b61d3b5a 569
Michael J. Spencer 2:1df0b61d3b5a 570 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 571 * @brief Check whether the specified Raw interrupt status flag is
Michael J. Spencer 2:1df0b61d3b5a 572 * set or not
Michael J. Spencer 2:1df0b61d3b5a 573 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 574 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 575 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 576 * @param[in] RawIntType Raw Interrupt Type, should be:
Michael J. Spencer 2:1df0b61d3b5a 577 * - SSP_INTSTAT_RAW_ROR: Receive Overrun interrupt
Michael J. Spencer 2:1df0b61d3b5a 578 * - SSP_INTSTAT_RAW_RT: Receive Time out interrupt
Michael J. Spencer 2:1df0b61d3b5a 579 * - SSP_INTSTAT_RAW_RX: RX FIFO is at least half full interrupt
Michael J. Spencer 2:1df0b61d3b5a 580 * - SSP_INTSTAT_RAW_TX: TX FIFO is at least half empty interrupt
Michael J. Spencer 2:1df0b61d3b5a 581 * @return New State of specified Raw interrupt status flag in SSP peripheral
Michael J. Spencer 2:1df0b61d3b5a 582 * Note: Enabling/Disabling specified interrupt in SSP peripheral does not
Michael J. Spencer 2:1df0b61d3b5a 583 * effect to Raw Interrupt Status flag.
Michael J. Spencer 2:1df0b61d3b5a 584 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 585 IntStatus SSP_GetRawIntStatus(LPC_SSP_TypeDef *SSPx, uint32_t RawIntType)
Michael J. Spencer 2:1df0b61d3b5a 586 {
Michael J. Spencer 2:1df0b61d3b5a 587 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 588 CHECK_PARAM(PARAM_SSP_INTSTAT_RAW(RawIntType));
Michael J. Spencer 2:1df0b61d3b5a 589
Michael J. Spencer 2:1df0b61d3b5a 590 return ((SSPx->RIS & RawIntType) ? SET : RESET);
Michael J. Spencer 2:1df0b61d3b5a 591 }
Michael J. Spencer 2:1df0b61d3b5a 592
Michael J. Spencer 2:1df0b61d3b5a 593 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 594 * @brief Get Raw Interrupt Status register
Michael J. Spencer 2:1df0b61d3b5a 595 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 596 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 597 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 598 * @return Raw Interrupt Status (RIS) register value
Michael J. Spencer 2:1df0b61d3b5a 599 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 600 uint32_t SSP_GetRawIntStatusReg(LPC_SSP_TypeDef *SSPx)
Michael J. Spencer 2:1df0b61d3b5a 601 {
Michael J. Spencer 2:1df0b61d3b5a 602 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 603 return (SSPx->RIS);
Michael J. Spencer 2:1df0b61d3b5a 604 }
Michael J. Spencer 2:1df0b61d3b5a 605
Michael J. Spencer 2:1df0b61d3b5a 606 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 607 * @brief Check whether the specified interrupt status flag is
Michael J. Spencer 2:1df0b61d3b5a 608 * set or not
Michael J. Spencer 2:1df0b61d3b5a 609 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 610 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 611 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 612 * @param[in] IntType Raw Interrupt Type, should be:
Michael J. Spencer 2:1df0b61d3b5a 613 * - SSP_INTSTAT_ROR: Receive Overrun interrupt
Michael J. Spencer 2:1df0b61d3b5a 614 * - SSP_INTSTAT_RT: Receive Time out interrupt
Michael J. Spencer 2:1df0b61d3b5a 615 * - SSP_INTSTAT_RX: RX FIFO is at least half full interrupt
Michael J. Spencer 2:1df0b61d3b5a 616 * - SSP_INTSTAT_TX: TX FIFO is at least half empty interrupt
Michael J. Spencer 2:1df0b61d3b5a 617 * @return New State of specified interrupt status flag in SSP peripheral
Michael J. Spencer 2:1df0b61d3b5a 618 * Note: Enabling/Disabling specified interrupt in SSP peripheral effects
Michael J. Spencer 2:1df0b61d3b5a 619 * to Interrupt Status flag.
Michael J. Spencer 2:1df0b61d3b5a 620 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 621 IntStatus SSP_GetIntStatus (LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Michael J. Spencer 2:1df0b61d3b5a 622 {
Michael J. Spencer 2:1df0b61d3b5a 623 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 624 CHECK_PARAM(PARAM_SSP_INTSTAT(IntType));
Michael J. Spencer 2:1df0b61d3b5a 625
Michael J. Spencer 2:1df0b61d3b5a 626 return ((SSPx->MIS & IntType) ? SET :RESET);
Michael J. Spencer 2:1df0b61d3b5a 627 }
Michael J. Spencer 2:1df0b61d3b5a 628
Michael J. Spencer 2:1df0b61d3b5a 629 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 630 * @brief Clear specified interrupt pending in SSP peripheral
Michael J. Spencer 2:1df0b61d3b5a 631 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 632 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 633 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 634 * @param[in] IntType Interrupt pending to clear, should be:
Michael J. Spencer 2:1df0b61d3b5a 635 * - SSP_INTCLR_ROR: clears the "frame was received when
Michael J. Spencer 2:1df0b61d3b5a 636 * RxFIFO was full" interrupt.
Michael J. Spencer 2:1df0b61d3b5a 637 * - SSP_INTCLR_RT: clears the "Rx FIFO was not empty and
Michael J. Spencer 2:1df0b61d3b5a 638 * has not been read for a timeout period" interrupt.
Michael J. Spencer 2:1df0b61d3b5a 639 * @return None
Michael J. Spencer 2:1df0b61d3b5a 640 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 641 void SSP_ClearIntPending(LPC_SSP_TypeDef *SSPx, uint32_t IntType)
Michael J. Spencer 2:1df0b61d3b5a 642 {
Michael J. Spencer 2:1df0b61d3b5a 643 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 644 CHECK_PARAM(PARAM_SSP_INTCLR(IntType));
Michael J. Spencer 2:1df0b61d3b5a 645
Michael J. Spencer 2:1df0b61d3b5a 646 SSPx->ICR = IntType;
Michael J. Spencer 2:1df0b61d3b5a 647 }
Michael J. Spencer 2:1df0b61d3b5a 648
Michael J. Spencer 2:1df0b61d3b5a 649 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 650 * @brief Enable/Disable DMA function for SSP peripheral
Michael J. Spencer 2:1df0b61d3b5a 651 * @param[in] SSPx SSP peripheral selected, should be:
Michael J. Spencer 2:1df0b61d3b5a 652 * - LPC_SSP0: SSP0 peripheral
Michael J. Spencer 2:1df0b61d3b5a 653 * - LPC_SSP1: SSP1 peripheral
Michael J. Spencer 2:1df0b61d3b5a 654 * @param[in] DMAMode Type of DMA, should be:
Michael J. Spencer 2:1df0b61d3b5a 655 * - SSP_DMA_TX: DMA for the transmit FIFO
Michael J. Spencer 2:1df0b61d3b5a 656 * - SSP_DMA_RX: DMA for the Receive FIFO
Michael J. Spencer 2:1df0b61d3b5a 657 * @param[in] NewState New State of DMA function on SSP peripheral,
Michael J. Spencer 2:1df0b61d3b5a 658 * should be:
Michael J. Spencer 2:1df0b61d3b5a 659 * - ENALBE: Enable this function
Michael J. Spencer 2:1df0b61d3b5a 660 * - DISABLE: Disable this function
Michael J. Spencer 2:1df0b61d3b5a 661 * @return None
Michael J. Spencer 2:1df0b61d3b5a 662 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 663 void SSP_DMACmd(LPC_SSP_TypeDef *SSPx, uint32_t DMAMode, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 664 {
Michael J. Spencer 2:1df0b61d3b5a 665 CHECK_PARAM(PARAM_SSPx(SSPx));
Michael J. Spencer 2:1df0b61d3b5a 666 CHECK_PARAM(PARAM_SSP_DMA(DMAMode));
Michael J. Spencer 2:1df0b61d3b5a 667 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 668
Michael J. Spencer 2:1df0b61d3b5a 669 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 670 {
Michael J. Spencer 2:1df0b61d3b5a 671 SSPx->DMACR |= DMAMode;
Michael J. Spencer 2:1df0b61d3b5a 672 }
Michael J. Spencer 2:1df0b61d3b5a 673 else
Michael J. Spencer 2:1df0b61d3b5a 674 {
Michael J. Spencer 2:1df0b61d3b5a 675 SSPx->DMACR &= (~DMAMode) & SSP_DMA_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 676 }
Michael J. Spencer 2:1df0b61d3b5a 677 }
Michael J. Spencer 2:1df0b61d3b5a 678
Michael J. Spencer 2:1df0b61d3b5a 679 /**
Michael J. Spencer 2:1df0b61d3b5a 680 * @}
Michael J. Spencer 2:1df0b61d3b5a 681 */
Michael J. Spencer 2:1df0b61d3b5a 682
Michael J. Spencer 2:1df0b61d3b5a 683 #endif /* _SSP */
Michael J. Spencer 2:1df0b61d3b5a 684
Michael J. Spencer 2:1df0b61d3b5a 685 /**
Michael J. Spencer 2:1df0b61d3b5a 686 * @}
Michael J. Spencer 2:1df0b61d3b5a 687 */
Michael J. Spencer 2:1df0b61d3b5a 688
Michael J. Spencer 2:1df0b61d3b5a 689 /* --------------------------------- End Of File ------------------------------ */
Michael J. Spencer 2:1df0b61d3b5a 690
Michael J. Spencer 2:1df0b61d3b5a 691 #endif /* __LPC17XX__ */