Fork of Smoothie to port to mbed non-LPC targets.
Fork of Smoothie by
libs/LPC17xx/LPC17xxLib/src/lpc17xx_timer.c@2:1df0b61d3b5a, 2014-02-28 (annotated)
- Committer:
- Michael J. Spencer
- Date:
- Fri Feb 28 18:52:52 2014 -0800
- Revision:
- 2:1df0b61d3b5a
Update to latest Smoothie.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Michael J. Spencer |
2:1df0b61d3b5a | 1 | #ifdef __LPC17XX__ |
Michael J. Spencer |
2:1df0b61d3b5a | 2 | |
Michael J. Spencer |
2:1df0b61d3b5a | 3 | /********************************************************************** |
Michael J. Spencer |
2:1df0b61d3b5a | 4 | * $Id$ lpc17xx_timer.c 2011-03-10 |
Michael J. Spencer |
2:1df0b61d3b5a | 5 | *//** |
Michael J. Spencer |
2:1df0b61d3b5a | 6 | * @file lpc17xx_timer.c |
Michael J. Spencer |
2:1df0b61d3b5a | 7 | * @brief Contains all functions support for Timer firmware library |
Michael J. Spencer |
2:1df0b61d3b5a | 8 | * on LPC17xx |
Michael J. Spencer |
2:1df0b61d3b5a | 9 | * @version 3.1 |
Michael J. Spencer |
2:1df0b61d3b5a | 10 | * @date 10. March. 2011 |
Michael J. Spencer |
2:1df0b61d3b5a | 11 | * @author NXP MCU SW Application Team |
Michael J. Spencer |
2:1df0b61d3b5a | 12 | * |
Michael J. Spencer |
2:1df0b61d3b5a | 13 | * Copyright(C) 2011, NXP Semiconductor |
Michael J. Spencer |
2:1df0b61d3b5a | 14 | * All rights reserved. |
Michael J. Spencer |
2:1df0b61d3b5a | 15 | * |
Michael J. Spencer |
2:1df0b61d3b5a | 16 | *********************************************************************** |
Michael J. Spencer |
2:1df0b61d3b5a | 17 | * Software that is described herein is for illustrative purposes only |
Michael J. Spencer |
2:1df0b61d3b5a | 18 | * which provides customers with programming information regarding the |
Michael J. Spencer |
2:1df0b61d3b5a | 19 | * products. This software is supplied "AS IS" without any warranties. |
Michael J. Spencer |
2:1df0b61d3b5a | 20 | * NXP Semiconductors assumes no responsibility or liability for the |
Michael J. Spencer |
2:1df0b61d3b5a | 21 | * use of the software, conveys no license or title under any patent, |
Michael J. Spencer |
2:1df0b61d3b5a | 22 | * copyright, or mask work right to the product. NXP Semiconductors |
Michael J. Spencer |
2:1df0b61d3b5a | 23 | * reserves the right to make changes in the software without |
Michael J. Spencer |
2:1df0b61d3b5a | 24 | * notification. NXP Semiconductors also make no representation or |
Michael J. Spencer |
2:1df0b61d3b5a | 25 | * warranty that such application will be suitable for the specified |
Michael J. Spencer |
2:1df0b61d3b5a | 26 | * use without further testing or modification. |
Michael J. Spencer |
2:1df0b61d3b5a | 27 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 28 | |
Michael J. Spencer |
2:1df0b61d3b5a | 29 | /* Peripheral group ----------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 30 | /** @addtogroup TIM |
Michael J. Spencer |
2:1df0b61d3b5a | 31 | * @{ |
Michael J. Spencer |
2:1df0b61d3b5a | 32 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 33 | |
Michael J. Spencer |
2:1df0b61d3b5a | 34 | /* Includes ------------------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 35 | #include "lpc17xx_timer.h" |
Michael J. Spencer |
2:1df0b61d3b5a | 36 | #include "lpc17xx_clkpwr.h" |
Michael J. Spencer |
2:1df0b61d3b5a | 37 | #include "lpc17xx_pinsel.h" |
Michael J. Spencer |
2:1df0b61d3b5a | 38 | |
Michael J. Spencer |
2:1df0b61d3b5a | 39 | /* If this source file built with example, the LPC17xx FW library configuration |
Michael J. Spencer |
2:1df0b61d3b5a | 40 | * file in each example directory ("lpc17xx_libcfg.h") must be included, |
Michael J. Spencer |
2:1df0b61d3b5a | 41 | * otherwise the default FW library configuration file must be included instead |
Michael J. Spencer |
2:1df0b61d3b5a | 42 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 43 | #ifdef __BUILD_WITH_EXAMPLE__ |
Michael J. Spencer |
2:1df0b61d3b5a | 44 | #include "lpc17xx_libcfg.h" |
Michael J. Spencer |
2:1df0b61d3b5a | 45 | #else |
Michael J. Spencer |
2:1df0b61d3b5a | 46 | #include "lpc17xx_libcfg_default.h" |
Michael J. Spencer |
2:1df0b61d3b5a | 47 | #endif /* __BUILD_WITH_EXAMPLE__ */ |
Michael J. Spencer |
2:1df0b61d3b5a | 48 | |
Michael J. Spencer |
2:1df0b61d3b5a | 49 | #ifdef _TIM |
Michael J. Spencer |
2:1df0b61d3b5a | 50 | |
Michael J. Spencer |
2:1df0b61d3b5a | 51 | /* Private Functions ---------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 52 | |
Michael J. Spencer |
2:1df0b61d3b5a | 53 | static uint32_t getPClock (uint32_t timernum); |
Michael J. Spencer |
2:1df0b61d3b5a | 54 | static uint32_t converUSecToVal (uint32_t timernum, uint32_t usec); |
Michael J. Spencer |
2:1df0b61d3b5a | 55 | static uint32_t converPtrToTimeNum (LPC_TIM_TypeDef *TIMx); |
Michael J. Spencer |
2:1df0b61d3b5a | 56 | |
Michael J. Spencer |
2:1df0b61d3b5a | 57 | |
Michael J. Spencer |
2:1df0b61d3b5a | 58 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 59 | * @brief Get peripheral clock of each timer controller |
Michael J. Spencer |
2:1df0b61d3b5a | 60 | * @param[in] timernum Timer number |
Michael J. Spencer |
2:1df0b61d3b5a | 61 | * @return Peripheral clock of timer |
Michael J. Spencer |
2:1df0b61d3b5a | 62 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 63 | static uint32_t getPClock (uint32_t timernum) |
Michael J. Spencer |
2:1df0b61d3b5a | 64 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 65 | uint32_t clkdlycnt = 0; |
Michael J. Spencer |
2:1df0b61d3b5a | 66 | switch (timernum) |
Michael J. Spencer |
2:1df0b61d3b5a | 67 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 68 | case 0: |
Michael J. Spencer |
2:1df0b61d3b5a | 69 | clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER0); |
Michael J. Spencer |
2:1df0b61d3b5a | 70 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 71 | |
Michael J. Spencer |
2:1df0b61d3b5a | 72 | case 1: |
Michael J. Spencer |
2:1df0b61d3b5a | 73 | clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER1); |
Michael J. Spencer |
2:1df0b61d3b5a | 74 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 75 | |
Michael J. Spencer |
2:1df0b61d3b5a | 76 | case 2: |
Michael J. Spencer |
2:1df0b61d3b5a | 77 | clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER2); |
Michael J. Spencer |
2:1df0b61d3b5a | 78 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 79 | |
Michael J. Spencer |
2:1df0b61d3b5a | 80 | case 3: |
Michael J. Spencer |
2:1df0b61d3b5a | 81 | clkdlycnt = CLKPWR_GetPCLK (CLKPWR_PCLKSEL_TIMER3); |
Michael J. Spencer |
2:1df0b61d3b5a | 82 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 83 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 84 | return clkdlycnt; |
Michael J. Spencer |
2:1df0b61d3b5a | 85 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 86 | |
Michael J. Spencer |
2:1df0b61d3b5a | 87 | |
Michael J. Spencer |
2:1df0b61d3b5a | 88 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 89 | * @brief Convert a time to a timer count value |
Michael J. Spencer |
2:1df0b61d3b5a | 90 | * @param[in] timernum Timer number |
Michael J. Spencer |
2:1df0b61d3b5a | 91 | * @param[in] usec Time in microseconds |
Michael J. Spencer |
2:1df0b61d3b5a | 92 | * @return The number of required clock ticks to give the time delay |
Michael J. Spencer |
2:1df0b61d3b5a | 93 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 94 | uint32_t converUSecToVal (uint32_t timernum, uint32_t usec) |
Michael J. Spencer |
2:1df0b61d3b5a | 95 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 96 | uint64_t clkdlycnt; |
Michael J. Spencer |
2:1df0b61d3b5a | 97 | |
Michael J. Spencer |
2:1df0b61d3b5a | 98 | // Get Pclock of timer |
Michael J. Spencer |
2:1df0b61d3b5a | 99 | clkdlycnt = (uint64_t) getPClock(timernum); |
Michael J. Spencer |
2:1df0b61d3b5a | 100 | |
Michael J. Spencer |
2:1df0b61d3b5a | 101 | clkdlycnt = (clkdlycnt * usec) / 1000000; |
Michael J. Spencer |
2:1df0b61d3b5a | 102 | return (uint32_t) clkdlycnt; |
Michael J. Spencer |
2:1df0b61d3b5a | 103 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 104 | |
Michael J. Spencer |
2:1df0b61d3b5a | 105 | |
Michael J. Spencer |
2:1df0b61d3b5a | 106 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 107 | * @brief Convert a timer register pointer to a timer number |
Michael J. Spencer |
2:1df0b61d3b5a | 108 | * @param[in] TIMx Pointer to LPC_TIM_TypeDef, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 109 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 110 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 111 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 112 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 113 | * @return The timer number (0 to 3) or -1 if register pointer is bad |
Michael J. Spencer |
2:1df0b61d3b5a | 114 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 115 | uint32_t converPtrToTimeNum (LPC_TIM_TypeDef *TIMx) |
Michael J. Spencer |
2:1df0b61d3b5a | 116 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 117 | uint32_t tnum = (uint32_t)-1; |
Michael J. Spencer |
2:1df0b61d3b5a | 118 | |
Michael J. Spencer |
2:1df0b61d3b5a | 119 | if (TIMx == LPC_TIM0) |
Michael J. Spencer |
2:1df0b61d3b5a | 120 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 121 | tnum = 0; |
Michael J. Spencer |
2:1df0b61d3b5a | 122 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 123 | else if (TIMx == LPC_TIM1) |
Michael J. Spencer |
2:1df0b61d3b5a | 124 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 125 | tnum = 1; |
Michael J. Spencer |
2:1df0b61d3b5a | 126 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 127 | else if (TIMx == LPC_TIM2) |
Michael J. Spencer |
2:1df0b61d3b5a | 128 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 129 | tnum = 2; |
Michael J. Spencer |
2:1df0b61d3b5a | 130 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 131 | else if (TIMx == LPC_TIM3) |
Michael J. Spencer |
2:1df0b61d3b5a | 132 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 133 | tnum = 3; |
Michael J. Spencer |
2:1df0b61d3b5a | 134 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 135 | |
Michael J. Spencer |
2:1df0b61d3b5a | 136 | return tnum; |
Michael J. Spencer |
2:1df0b61d3b5a | 137 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 138 | |
Michael J. Spencer |
2:1df0b61d3b5a | 139 | /* End of Private Functions ---------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 140 | |
Michael J. Spencer |
2:1df0b61d3b5a | 141 | |
Michael J. Spencer |
2:1df0b61d3b5a | 142 | /* Public Functions ----------------------------------------------------------- */ |
Michael J. Spencer |
2:1df0b61d3b5a | 143 | /** @addtogroup TIM_Public_Functions |
Michael J. Spencer |
2:1df0b61d3b5a | 144 | * @{ |
Michael J. Spencer |
2:1df0b61d3b5a | 145 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 146 | |
Michael J. Spencer |
2:1df0b61d3b5a | 147 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 148 | * @brief Get Interrupt Status |
Michael J. Spencer |
2:1df0b61d3b5a | 149 | * @param[in] TIMx Timer selection, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 150 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 151 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 152 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 153 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 154 | * @param[in] IntFlag: interrupt type, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 155 | * - TIM_MR0_INT: Interrupt for Match channel 0 |
Michael J. Spencer |
2:1df0b61d3b5a | 156 | * - TIM_MR1_INT: Interrupt for Match channel 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 157 | * - TIM_MR2_INT: Interrupt for Match channel 2 |
Michael J. Spencer |
2:1df0b61d3b5a | 158 | * - TIM_MR3_INT: Interrupt for Match channel 3 |
Michael J. Spencer |
2:1df0b61d3b5a | 159 | * - TIM_CR0_INT: Interrupt for Capture channel 0 |
Michael J. Spencer |
2:1df0b61d3b5a | 160 | * - TIM_CR1_INT: Interrupt for Capture channel 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 161 | * @return FlagStatus |
Michael J. Spencer |
2:1df0b61d3b5a | 162 | * - SET : interrupt |
Michael J. Spencer |
2:1df0b61d3b5a | 163 | * - RESET : no interrupt |
Michael J. Spencer |
2:1df0b61d3b5a | 164 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 165 | FlagStatus TIM_GetIntStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag) |
Michael J. Spencer |
2:1df0b61d3b5a | 166 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 167 | uint8_t temp; |
Michael J. Spencer |
2:1df0b61d3b5a | 168 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 169 | CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag)); |
Michael J. Spencer |
2:1df0b61d3b5a | 170 | temp = (TIMx->IR)& TIM_IR_CLR(IntFlag); |
Michael J. Spencer |
2:1df0b61d3b5a | 171 | if (temp) |
Michael J. Spencer |
2:1df0b61d3b5a | 172 | return SET; |
Michael J. Spencer |
2:1df0b61d3b5a | 173 | |
Michael J. Spencer |
2:1df0b61d3b5a | 174 | return RESET; |
Michael J. Spencer |
2:1df0b61d3b5a | 175 | |
Michael J. Spencer |
2:1df0b61d3b5a | 176 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 177 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 178 | * @brief Get Capture Interrupt Status |
Michael J. Spencer |
2:1df0b61d3b5a | 179 | * @param[in] TIMx Timer selection, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 180 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 181 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 182 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 183 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 184 | * @param[in] IntFlag: interrupt type, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 185 | * - TIM_MR0_INT: Interrupt for Match channel 0 |
Michael J. Spencer |
2:1df0b61d3b5a | 186 | * - TIM_MR1_INT: Interrupt for Match channel 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 187 | * - TIM_MR2_INT: Interrupt for Match channel 2 |
Michael J. Spencer |
2:1df0b61d3b5a | 188 | * - TIM_MR3_INT: Interrupt for Match channel 3 |
Michael J. Spencer |
2:1df0b61d3b5a | 189 | * - TIM_CR0_INT: Interrupt for Capture channel 0 |
Michael J. Spencer |
2:1df0b61d3b5a | 190 | * - TIM_CR1_INT: Interrupt for Capture channel 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 191 | * @return FlagStatus |
Michael J. Spencer |
2:1df0b61d3b5a | 192 | * - SET : interrupt |
Michael J. Spencer |
2:1df0b61d3b5a | 193 | * - RESET : no interrupt |
Michael J. Spencer |
2:1df0b61d3b5a | 194 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 195 | FlagStatus TIM_GetIntCaptureStatus(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag) |
Michael J. Spencer |
2:1df0b61d3b5a | 196 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 197 | uint8_t temp; |
Michael J. Spencer |
2:1df0b61d3b5a | 198 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 199 | CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag)); |
Michael J. Spencer |
2:1df0b61d3b5a | 200 | temp = (TIMx->IR) & (1<<(4+IntFlag)); |
Michael J. Spencer |
2:1df0b61d3b5a | 201 | if(temp) |
Michael J. Spencer |
2:1df0b61d3b5a | 202 | return SET; |
Michael J. Spencer |
2:1df0b61d3b5a | 203 | return RESET; |
Michael J. Spencer |
2:1df0b61d3b5a | 204 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 205 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 206 | * @brief Clear Interrupt pending |
Michael J. Spencer |
2:1df0b61d3b5a | 207 | * @param[in] TIMx Timer selection, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 208 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 209 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 210 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 211 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 212 | * @param[in] IntFlag: interrupt type, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 213 | * - TIM_MR0_INT: Interrupt for Match channel 0 |
Michael J. Spencer |
2:1df0b61d3b5a | 214 | * - TIM_MR1_INT: Interrupt for Match channel 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 215 | * - TIM_MR2_INT: Interrupt for Match channel 2 |
Michael J. Spencer |
2:1df0b61d3b5a | 216 | * - TIM_MR3_INT: Interrupt for Match channel 3 |
Michael J. Spencer |
2:1df0b61d3b5a | 217 | * - TIM_CR0_INT: Interrupt for Capture channel 0 |
Michael J. Spencer |
2:1df0b61d3b5a | 218 | * - TIM_CR1_INT: Interrupt for Capture channel 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 219 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 220 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 221 | void TIM_ClearIntPending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag) |
Michael J. Spencer |
2:1df0b61d3b5a | 222 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 223 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 224 | CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag)); |
Michael J. Spencer |
2:1df0b61d3b5a | 225 | TIMx->IR = TIM_IR_CLR(IntFlag); |
Michael J. Spencer |
2:1df0b61d3b5a | 226 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 227 | |
Michael J. Spencer |
2:1df0b61d3b5a | 228 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 229 | * @brief Clear Capture Interrupt pending |
Michael J. Spencer |
2:1df0b61d3b5a | 230 | * @param[in] TIMx Timer selection, should be |
Michael J. Spencer |
2:1df0b61d3b5a | 231 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 232 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 233 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 234 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 235 | * @param[in] IntFlag interrupt type, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 236 | * - TIM_MR0_INT: Interrupt for Match channel 0 |
Michael J. Spencer |
2:1df0b61d3b5a | 237 | * - TIM_MR1_INT: Interrupt for Match channel 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 238 | * - TIM_MR2_INT: Interrupt for Match channel 2 |
Michael J. Spencer |
2:1df0b61d3b5a | 239 | * - TIM_MR3_INT: Interrupt for Match channel 3 |
Michael J. Spencer |
2:1df0b61d3b5a | 240 | * - TIM_CR0_INT: Interrupt for Capture channel 0 |
Michael J. Spencer |
2:1df0b61d3b5a | 241 | * - TIM_CR1_INT: Interrupt for Capture channel 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 242 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 243 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 244 | void TIM_ClearIntCapturePending(LPC_TIM_TypeDef *TIMx, TIM_INT_TYPE IntFlag) |
Michael J. Spencer |
2:1df0b61d3b5a | 245 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 246 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 247 | CHECK_PARAM(PARAM_TIM_INT_TYPE(IntFlag)); |
Michael J. Spencer |
2:1df0b61d3b5a | 248 | TIMx->IR = (1<<(4+IntFlag)); |
Michael J. Spencer |
2:1df0b61d3b5a | 249 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 250 | |
Michael J. Spencer |
2:1df0b61d3b5a | 251 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 252 | * @brief Configuration for Timer at initial time |
Michael J. Spencer |
2:1df0b61d3b5a | 253 | * @param[in] TimerCounterMode timer counter mode, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 254 | * - TIM_TIMER_MODE: Timer mode |
Michael J. Spencer |
2:1df0b61d3b5a | 255 | * - TIM_COUNTER_RISING_MODE: Counter rising mode |
Michael J. Spencer |
2:1df0b61d3b5a | 256 | * - TIM_COUNTER_FALLING_MODE: Counter falling mode |
Michael J. Spencer |
2:1df0b61d3b5a | 257 | * - TIM_COUNTER_ANY_MODE:Counter on both edges |
Michael J. Spencer |
2:1df0b61d3b5a | 258 | * @param[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type or |
Michael J. Spencer |
2:1df0b61d3b5a | 259 | * TIM_COUNTERCFG_Type |
Michael J. Spencer |
2:1df0b61d3b5a | 260 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 261 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 262 | void TIM_ConfigStructInit(TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct) |
Michael J. Spencer |
2:1df0b61d3b5a | 263 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 264 | if (TimerCounterMode == TIM_TIMER_MODE ) |
Michael J. Spencer |
2:1df0b61d3b5a | 265 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 266 | TIM_TIMERCFG_Type * pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct; |
Michael J. Spencer |
2:1df0b61d3b5a | 267 | pTimeCfg->PrescaleOption = TIM_PRESCALE_USVAL; |
Michael J. Spencer |
2:1df0b61d3b5a | 268 | pTimeCfg->PrescaleValue = 1; |
Michael J. Spencer |
2:1df0b61d3b5a | 269 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 270 | else |
Michael J. Spencer |
2:1df0b61d3b5a | 271 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 272 | TIM_COUNTERCFG_Type * pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct; |
Michael J. Spencer |
2:1df0b61d3b5a | 273 | pCounterCfg->CountInputSelect = TIM_COUNTER_INCAP0; |
Michael J. Spencer |
2:1df0b61d3b5a | 274 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 275 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 276 | |
Michael J. Spencer |
2:1df0b61d3b5a | 277 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 278 | * @brief Initial Timer/Counter device |
Michael J. Spencer |
2:1df0b61d3b5a | 279 | * Set Clock frequency for Timer |
Michael J. Spencer |
2:1df0b61d3b5a | 280 | * Set initial configuration for Timer |
Michael J. Spencer |
2:1df0b61d3b5a | 281 | * @param[in] TIMx Timer selection, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 282 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 283 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 284 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 285 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 286 | * @param[in] TimerCounterMode Timer counter mode, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 287 | * - TIM_TIMER_MODE: Timer mode |
Michael J. Spencer |
2:1df0b61d3b5a | 288 | * - TIM_COUNTER_RISING_MODE: Counter rising mode |
Michael J. Spencer |
2:1df0b61d3b5a | 289 | * - TIM_COUNTER_FALLING_MODE: Counter falling mode |
Michael J. Spencer |
2:1df0b61d3b5a | 290 | * - TIM_COUNTER_ANY_MODE:Counter on both edges |
Michael J. Spencer |
2:1df0b61d3b5a | 291 | * @param[in] TIM_ConfigStruct pointer to TIM_TIMERCFG_Type |
Michael J. Spencer |
2:1df0b61d3b5a | 292 | * that contains the configuration information for the |
Michael J. Spencer |
2:1df0b61d3b5a | 293 | * specified Timer peripheral. |
Michael J. Spencer |
2:1df0b61d3b5a | 294 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 295 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 296 | void TIM_Init(LPC_TIM_TypeDef *TIMx, TIM_MODE_OPT TimerCounterMode, void *TIM_ConfigStruct) |
Michael J. Spencer |
2:1df0b61d3b5a | 297 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 298 | TIM_TIMERCFG_Type *pTimeCfg; |
Michael J. Spencer |
2:1df0b61d3b5a | 299 | TIM_COUNTERCFG_Type *pCounterCfg; |
Michael J. Spencer |
2:1df0b61d3b5a | 300 | |
Michael J. Spencer |
2:1df0b61d3b5a | 301 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 302 | CHECK_PARAM(PARAM_TIM_MODE_OPT(TimerCounterMode)); |
Michael J. Spencer |
2:1df0b61d3b5a | 303 | |
Michael J. Spencer |
2:1df0b61d3b5a | 304 | //set power |
Michael J. Spencer |
2:1df0b61d3b5a | 305 | |
Michael J. Spencer |
2:1df0b61d3b5a | 306 | if (TIMx== LPC_TIM0) |
Michael J. Spencer |
2:1df0b61d3b5a | 307 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 308 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, ENABLE); |
Michael J. Spencer |
2:1df0b61d3b5a | 309 | //PCLK_Timer0 = CCLK/4 |
Michael J. Spencer |
2:1df0b61d3b5a | 310 | CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER0, CLKPWR_PCLKSEL_CCLK_DIV_4); |
Michael J. Spencer |
2:1df0b61d3b5a | 311 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 312 | else if (TIMx== LPC_TIM1) |
Michael J. Spencer |
2:1df0b61d3b5a | 313 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 314 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, ENABLE); |
Michael J. Spencer |
2:1df0b61d3b5a | 315 | //PCLK_Timer1 = CCLK/4 |
Michael J. Spencer |
2:1df0b61d3b5a | 316 | CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER1, CLKPWR_PCLKSEL_CCLK_DIV_4); |
Michael J. Spencer |
2:1df0b61d3b5a | 317 | |
Michael J. Spencer |
2:1df0b61d3b5a | 318 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 319 | |
Michael J. Spencer |
2:1df0b61d3b5a | 320 | else if (TIMx== LPC_TIM2) |
Michael J. Spencer |
2:1df0b61d3b5a | 321 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 322 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, ENABLE); |
Michael J. Spencer |
2:1df0b61d3b5a | 323 | //PCLK_Timer2= CCLK/4 |
Michael J. Spencer |
2:1df0b61d3b5a | 324 | CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER2, CLKPWR_PCLKSEL_CCLK_DIV_4); |
Michael J. Spencer |
2:1df0b61d3b5a | 325 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 326 | else if (TIMx== LPC_TIM3) |
Michael J. Spencer |
2:1df0b61d3b5a | 327 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 328 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM3, ENABLE); |
Michael J. Spencer |
2:1df0b61d3b5a | 329 | //PCLK_Timer3= CCLK/4 |
Michael J. Spencer |
2:1df0b61d3b5a | 330 | CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_TIMER3, CLKPWR_PCLKSEL_CCLK_DIV_4); |
Michael J. Spencer |
2:1df0b61d3b5a | 331 | |
Michael J. Spencer |
2:1df0b61d3b5a | 332 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 333 | |
Michael J. Spencer |
2:1df0b61d3b5a | 334 | TIMx->CCR &= ~TIM_CTCR_MODE_MASK; |
Michael J. Spencer |
2:1df0b61d3b5a | 335 | TIMx->CCR |= TIM_TIMER_MODE; |
Michael J. Spencer |
2:1df0b61d3b5a | 336 | |
Michael J. Spencer |
2:1df0b61d3b5a | 337 | TIMx->TC =0; |
Michael J. Spencer |
2:1df0b61d3b5a | 338 | TIMx->PC =0; |
Michael J. Spencer |
2:1df0b61d3b5a | 339 | TIMx->PR =0; |
Michael J. Spencer |
2:1df0b61d3b5a | 340 | TIMx->TCR |= (1<<1); //Reset Counter |
Michael J. Spencer |
2:1df0b61d3b5a | 341 | TIMx->TCR &= ~(1<<1); //release reset |
Michael J. Spencer |
2:1df0b61d3b5a | 342 | if (TimerCounterMode == TIM_TIMER_MODE ) |
Michael J. Spencer |
2:1df0b61d3b5a | 343 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 344 | pTimeCfg = (TIM_TIMERCFG_Type *)TIM_ConfigStruct; |
Michael J. Spencer |
2:1df0b61d3b5a | 345 | if (pTimeCfg->PrescaleOption == TIM_PRESCALE_TICKVAL) |
Michael J. Spencer |
2:1df0b61d3b5a | 346 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 347 | TIMx->PR = pTimeCfg->PrescaleValue -1 ; |
Michael J. Spencer |
2:1df0b61d3b5a | 348 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 349 | else |
Michael J. Spencer |
2:1df0b61d3b5a | 350 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 351 | TIMx->PR = converUSecToVal (converPtrToTimeNum(TIMx),pTimeCfg->PrescaleValue)-1; |
Michael J. Spencer |
2:1df0b61d3b5a | 352 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 353 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 354 | else |
Michael J. Spencer |
2:1df0b61d3b5a | 355 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 356 | |
Michael J. Spencer |
2:1df0b61d3b5a | 357 | pCounterCfg = (TIM_COUNTERCFG_Type *)TIM_ConfigStruct; |
Michael J. Spencer |
2:1df0b61d3b5a | 358 | TIMx->CCR &= ~TIM_CTCR_INPUT_MASK; |
Michael J. Spencer |
2:1df0b61d3b5a | 359 | if (pCounterCfg->CountInputSelect == TIM_COUNTER_INCAP1) |
Michael J. Spencer |
2:1df0b61d3b5a | 360 | TIMx->CCR |= _BIT(2); |
Michael J. Spencer |
2:1df0b61d3b5a | 361 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 362 | |
Michael J. Spencer |
2:1df0b61d3b5a | 363 | // Clear interrupt pending |
Michael J. Spencer |
2:1df0b61d3b5a | 364 | TIMx->IR = 0xFFFFFFFF; |
Michael J. Spencer |
2:1df0b61d3b5a | 365 | |
Michael J. Spencer |
2:1df0b61d3b5a | 366 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 367 | |
Michael J. Spencer |
2:1df0b61d3b5a | 368 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 369 | * @brief Close Timer/Counter device |
Michael J. Spencer |
2:1df0b61d3b5a | 370 | * @param[in] TIMx Pointer to timer device, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 371 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 372 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 373 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 374 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 375 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 376 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 377 | void TIM_DeInit (LPC_TIM_TypeDef *TIMx) |
Michael J. Spencer |
2:1df0b61d3b5a | 378 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 379 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 380 | // Disable timer/counter |
Michael J. Spencer |
2:1df0b61d3b5a | 381 | TIMx->TCR = 0x00; |
Michael J. Spencer |
2:1df0b61d3b5a | 382 | |
Michael J. Spencer |
2:1df0b61d3b5a | 383 | // Disable power |
Michael J. Spencer |
2:1df0b61d3b5a | 384 | if (TIMx== LPC_TIM0) |
Michael J. Spencer |
2:1df0b61d3b5a | 385 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM0, DISABLE); |
Michael J. Spencer |
2:1df0b61d3b5a | 386 | |
Michael J. Spencer |
2:1df0b61d3b5a | 387 | else if (TIMx== LPC_TIM1) |
Michael J. Spencer |
2:1df0b61d3b5a | 388 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM1, DISABLE); |
Michael J. Spencer |
2:1df0b61d3b5a | 389 | |
Michael J. Spencer |
2:1df0b61d3b5a | 390 | else if (TIMx== LPC_TIM2) |
Michael J. Spencer |
2:1df0b61d3b5a | 391 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE); |
Michael J. Spencer |
2:1df0b61d3b5a | 392 | |
Michael J. Spencer |
2:1df0b61d3b5a | 393 | else if (TIMx== LPC_TIM3) |
Michael J. Spencer |
2:1df0b61d3b5a | 394 | CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCTIM2, DISABLE); |
Michael J. Spencer |
2:1df0b61d3b5a | 395 | |
Michael J. Spencer |
2:1df0b61d3b5a | 396 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 397 | |
Michael J. Spencer |
2:1df0b61d3b5a | 398 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 399 | * @brief Start/Stop Timer/Counter device |
Michael J. Spencer |
2:1df0b61d3b5a | 400 | * @param[in] TIMx Pointer to timer device, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 401 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 402 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 403 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 404 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 405 | * @param[in] NewState |
Michael J. Spencer |
2:1df0b61d3b5a | 406 | * - ENABLE : set timer enable |
Michael J. Spencer |
2:1df0b61d3b5a | 407 | * - DISABLE : disable timer |
Michael J. Spencer |
2:1df0b61d3b5a | 408 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 409 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 410 | void TIM_Cmd(LPC_TIM_TypeDef *TIMx, FunctionalState NewState) |
Michael J. Spencer |
2:1df0b61d3b5a | 411 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 412 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 413 | if (NewState == ENABLE) |
Michael J. Spencer |
2:1df0b61d3b5a | 414 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 415 | TIMx->TCR |= TIM_ENABLE; |
Michael J. Spencer |
2:1df0b61d3b5a | 416 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 417 | else |
Michael J. Spencer |
2:1df0b61d3b5a | 418 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 419 | TIMx->TCR &= ~TIM_ENABLE; |
Michael J. Spencer |
2:1df0b61d3b5a | 420 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 421 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 422 | |
Michael J. Spencer |
2:1df0b61d3b5a | 423 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 424 | * @brief Reset Timer/Counter device, |
Michael J. Spencer |
2:1df0b61d3b5a | 425 | * Make TC and PC are synchronously reset on the next |
Michael J. Spencer |
2:1df0b61d3b5a | 426 | * positive edge of PCLK |
Michael J. Spencer |
2:1df0b61d3b5a | 427 | * @param[in] TIMx Pointer to timer device, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 428 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 429 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 430 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 431 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 432 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 433 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 434 | void TIM_ResetCounter(LPC_TIM_TypeDef *TIMx) |
Michael J. Spencer |
2:1df0b61d3b5a | 435 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 436 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 437 | TIMx->TCR |= TIM_RESET; |
Michael J. Spencer |
2:1df0b61d3b5a | 438 | TIMx->TCR &= ~TIM_RESET; |
Michael J. Spencer |
2:1df0b61d3b5a | 439 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 440 | |
Michael J. Spencer |
2:1df0b61d3b5a | 441 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 442 | * @brief Configuration for Match register |
Michael J. Spencer |
2:1df0b61d3b5a | 443 | * @param[in] TIMx Pointer to timer device, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 444 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 445 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 446 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 447 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 448 | * @param[in] TIM_MatchConfigStruct Pointer to TIM_MATCHCFG_Type |
Michael J. Spencer |
2:1df0b61d3b5a | 449 | * - MatchChannel : choose channel 0 or 1 |
Michael J. Spencer |
2:1df0b61d3b5a | 450 | * - IntOnMatch : if SET, interrupt will be generated when MRxx match |
Michael J. Spencer |
2:1df0b61d3b5a | 451 | * the value in TC |
Michael J. Spencer |
2:1df0b61d3b5a | 452 | * - StopOnMatch : if SET, TC and PC will be stopped whenM Rxx match |
Michael J. Spencer |
2:1df0b61d3b5a | 453 | * the value in TC |
Michael J. Spencer |
2:1df0b61d3b5a | 454 | * - ResetOnMatch : if SET, Reset on MR0 when MRxx match |
Michael J. Spencer |
2:1df0b61d3b5a | 455 | * the value in TC |
Michael J. Spencer |
2:1df0b61d3b5a | 456 | * -ExtMatchOutputType: Select output for external match |
Michael J. Spencer |
2:1df0b61d3b5a | 457 | * + 0: Do nothing for external output pin if match |
Michael J. Spencer |
2:1df0b61d3b5a | 458 | * + 1: Force external output pin to low if match |
Michael J. Spencer |
2:1df0b61d3b5a | 459 | * + 2: Force external output pin to high if match |
Michael J. Spencer |
2:1df0b61d3b5a | 460 | * + 3: Toggle external output pin if match |
Michael J. Spencer |
2:1df0b61d3b5a | 461 | * MatchValue: Set the value to be compared with TC value |
Michael J. Spencer |
2:1df0b61d3b5a | 462 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 463 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 464 | void TIM_ConfigMatch(LPC_TIM_TypeDef *TIMx, TIM_MATCHCFG_Type *TIM_MatchConfigStruct) |
Michael J. Spencer |
2:1df0b61d3b5a | 465 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 466 | |
Michael J. Spencer |
2:1df0b61d3b5a | 467 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 468 | CHECK_PARAM(PARAM_TIM_EXTMATCH_OPT(TIM_MatchConfigStruct->ExtMatchOutputType)); |
Michael J. Spencer |
2:1df0b61d3b5a | 469 | |
Michael J. Spencer |
2:1df0b61d3b5a | 470 | switch(TIM_MatchConfigStruct->MatchChannel) |
Michael J. Spencer |
2:1df0b61d3b5a | 471 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 472 | case 0: |
Michael J. Spencer |
2:1df0b61d3b5a | 473 | TIMx->MR0 = TIM_MatchConfigStruct->MatchValue; |
Michael J. Spencer |
2:1df0b61d3b5a | 474 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 475 | case 1: |
Michael J. Spencer |
2:1df0b61d3b5a | 476 | TIMx->MR1 = TIM_MatchConfigStruct->MatchValue; |
Michael J. Spencer |
2:1df0b61d3b5a | 477 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 478 | case 2: |
Michael J. Spencer |
2:1df0b61d3b5a | 479 | TIMx->MR2 = TIM_MatchConfigStruct->MatchValue; |
Michael J. Spencer |
2:1df0b61d3b5a | 480 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 481 | case 3: |
Michael J. Spencer |
2:1df0b61d3b5a | 482 | TIMx->MR3 = TIM_MatchConfigStruct->MatchValue; |
Michael J. Spencer |
2:1df0b61d3b5a | 483 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 484 | default: |
Michael J. Spencer |
2:1df0b61d3b5a | 485 | //Error match value |
Michael J. Spencer |
2:1df0b61d3b5a | 486 | //Error loop |
Michael J. Spencer |
2:1df0b61d3b5a | 487 | while(1); |
Michael J. Spencer |
2:1df0b61d3b5a | 488 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 489 | //interrupt on MRn |
Michael J. Spencer |
2:1df0b61d3b5a | 490 | TIMx->MCR &=~TIM_MCR_CHANNEL_MASKBIT(TIM_MatchConfigStruct->MatchChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 491 | |
Michael J. Spencer |
2:1df0b61d3b5a | 492 | if (TIM_MatchConfigStruct->IntOnMatch) |
Michael J. Spencer |
2:1df0b61d3b5a | 493 | TIMx->MCR |= TIM_INT_ON_MATCH(TIM_MatchConfigStruct->MatchChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 494 | |
Michael J. Spencer |
2:1df0b61d3b5a | 495 | //reset on MRn |
Michael J. Spencer |
2:1df0b61d3b5a | 496 | if (TIM_MatchConfigStruct->ResetOnMatch) |
Michael J. Spencer |
2:1df0b61d3b5a | 497 | TIMx->MCR |= TIM_RESET_ON_MATCH(TIM_MatchConfigStruct->MatchChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 498 | |
Michael J. Spencer |
2:1df0b61d3b5a | 499 | //stop on MRn |
Michael J. Spencer |
2:1df0b61d3b5a | 500 | if (TIM_MatchConfigStruct->StopOnMatch) |
Michael J. Spencer |
2:1df0b61d3b5a | 501 | TIMx->MCR |= TIM_STOP_ON_MATCH(TIM_MatchConfigStruct->MatchChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 502 | |
Michael J. Spencer |
2:1df0b61d3b5a | 503 | // match output type |
Michael J. Spencer |
2:1df0b61d3b5a | 504 | |
Michael J. Spencer |
2:1df0b61d3b5a | 505 | TIMx->EMR &= ~TIM_EM_MASK(TIM_MatchConfigStruct->MatchChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 506 | TIMx->EMR |= TIM_EM_SET(TIM_MatchConfigStruct->MatchChannel,TIM_MatchConfigStruct->ExtMatchOutputType); |
Michael J. Spencer |
2:1df0b61d3b5a | 507 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 508 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 509 | * @brief Update Match value |
Michael J. Spencer |
2:1df0b61d3b5a | 510 | * @param[in] TIMx Pointer to timer device, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 511 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 512 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 513 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 514 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 515 | * @param[in] MatchChannel Match channel, should be: 0..3 |
Michael J. Spencer |
2:1df0b61d3b5a | 516 | * @param[in] MatchValue updated match value |
Michael J. Spencer |
2:1df0b61d3b5a | 517 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 518 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 519 | void TIM_UpdateMatchValue(LPC_TIM_TypeDef *TIMx,uint8_t MatchChannel, uint32_t MatchValue) |
Michael J. Spencer |
2:1df0b61d3b5a | 520 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 521 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 522 | switch(MatchChannel) |
Michael J. Spencer |
2:1df0b61d3b5a | 523 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 524 | case 0: |
Michael J. Spencer |
2:1df0b61d3b5a | 525 | TIMx->MR0 = MatchValue; |
Michael J. Spencer |
2:1df0b61d3b5a | 526 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 527 | case 1: |
Michael J. Spencer |
2:1df0b61d3b5a | 528 | TIMx->MR1 = MatchValue; |
Michael J. Spencer |
2:1df0b61d3b5a | 529 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 530 | case 2: |
Michael J. Spencer |
2:1df0b61d3b5a | 531 | TIMx->MR2 = MatchValue; |
Michael J. Spencer |
2:1df0b61d3b5a | 532 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 533 | case 3: |
Michael J. Spencer |
2:1df0b61d3b5a | 534 | TIMx->MR3 = MatchValue; |
Michael J. Spencer |
2:1df0b61d3b5a | 535 | break; |
Michael J. Spencer |
2:1df0b61d3b5a | 536 | default: |
Michael J. Spencer |
2:1df0b61d3b5a | 537 | //Error Loop |
Michael J. Spencer |
2:1df0b61d3b5a | 538 | while(1); |
Michael J. Spencer |
2:1df0b61d3b5a | 539 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 540 | |
Michael J. Spencer |
2:1df0b61d3b5a | 541 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 542 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 543 | * @brief Configuration for Capture register |
Michael J. Spencer |
2:1df0b61d3b5a | 544 | * @param[in] TIMx Pointer to timer device, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 545 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 546 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 547 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 548 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 549 | * - CaptureChannel: set the channel to capture data |
Michael J. Spencer |
2:1df0b61d3b5a | 550 | * - RisingEdge : if SET, Capture at rising edge |
Michael J. Spencer |
2:1df0b61d3b5a | 551 | * - FallingEdge : if SET, Capture at falling edge |
Michael J. Spencer |
2:1df0b61d3b5a | 552 | * - IntOnCaption : if SET, Capture generate interrupt |
Michael J. Spencer |
2:1df0b61d3b5a | 553 | * @param[in] TIM_CaptureConfigStruct Pointer to TIM_CAPTURECFG_Type |
Michael J. Spencer |
2:1df0b61d3b5a | 554 | * @return None |
Michael J. Spencer |
2:1df0b61d3b5a | 555 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 556 | void TIM_ConfigCapture(LPC_TIM_TypeDef *TIMx, TIM_CAPTURECFG_Type *TIM_CaptureConfigStruct) |
Michael J. Spencer |
2:1df0b61d3b5a | 557 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 558 | |
Michael J. Spencer |
2:1df0b61d3b5a | 559 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 560 | TIMx->CCR &= ~TIM_CCR_CHANNEL_MASKBIT(TIM_CaptureConfigStruct->CaptureChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 561 | |
Michael J. Spencer |
2:1df0b61d3b5a | 562 | if (TIM_CaptureConfigStruct->RisingEdge) |
Michael J. Spencer |
2:1df0b61d3b5a | 563 | TIMx->CCR |= TIM_CAP_RISING(TIM_CaptureConfigStruct->CaptureChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 564 | |
Michael J. Spencer |
2:1df0b61d3b5a | 565 | if (TIM_CaptureConfigStruct->FallingEdge) |
Michael J. Spencer |
2:1df0b61d3b5a | 566 | TIMx->CCR |= TIM_CAP_FALLING(TIM_CaptureConfigStruct->CaptureChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 567 | |
Michael J. Spencer |
2:1df0b61d3b5a | 568 | if (TIM_CaptureConfigStruct->IntOnCaption) |
Michael J. Spencer |
2:1df0b61d3b5a | 569 | TIMx->CCR |= TIM_INT_ON_CAP(TIM_CaptureConfigStruct->CaptureChannel); |
Michael J. Spencer |
2:1df0b61d3b5a | 570 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 571 | |
Michael J. Spencer |
2:1df0b61d3b5a | 572 | /*********************************************************************//** |
Michael J. Spencer |
2:1df0b61d3b5a | 573 | * @brief Read value of capture register in timer/counter device |
Michael J. Spencer |
2:1df0b61d3b5a | 574 | * @param[in] TIMx Pointer to timer/counter device, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 575 | * - LPC_TIM0: TIMER0 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 576 | * - LPC_TIM1: TIMER1 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 577 | * - LPC_TIM2: TIMER2 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 578 | * - LPC_TIM3: TIMER3 peripheral |
Michael J. Spencer |
2:1df0b61d3b5a | 579 | * @param[in] CaptureChannel: capture channel number, should be: |
Michael J. Spencer |
2:1df0b61d3b5a | 580 | * - TIM_COUNTER_INCAP0: CAPn.0 input pin for TIMERn |
Michael J. Spencer |
2:1df0b61d3b5a | 581 | * - TIM_COUNTER_INCAP1: CAPn.1 input pin for TIMERn |
Michael J. Spencer |
2:1df0b61d3b5a | 582 | * @return Value of capture register |
Michael J. Spencer |
2:1df0b61d3b5a | 583 | **********************************************************************/ |
Michael J. Spencer |
2:1df0b61d3b5a | 584 | uint32_t TIM_GetCaptureValue(LPC_TIM_TypeDef *TIMx, TIM_COUNTER_INPUT_OPT CaptureChannel) |
Michael J. Spencer |
2:1df0b61d3b5a | 585 | { |
Michael J. Spencer |
2:1df0b61d3b5a | 586 | CHECK_PARAM(PARAM_TIMx(TIMx)); |
Michael J. Spencer |
2:1df0b61d3b5a | 587 | CHECK_PARAM(PARAM_TIM_COUNTER_INPUT_OPT(CaptureChannel)); |
Michael J. Spencer |
2:1df0b61d3b5a | 588 | |
Michael J. Spencer |
2:1df0b61d3b5a | 589 | if(CaptureChannel==0) |
Michael J. Spencer |
2:1df0b61d3b5a | 590 | return TIMx->CR0; |
Michael J. Spencer |
2:1df0b61d3b5a | 591 | else |
Michael J. Spencer |
2:1df0b61d3b5a | 592 | return TIMx->CR1; |
Michael J. Spencer |
2:1df0b61d3b5a | 593 | } |
Michael J. Spencer |
2:1df0b61d3b5a | 594 | |
Michael J. Spencer |
2:1df0b61d3b5a | 595 | /** |
Michael J. Spencer |
2:1df0b61d3b5a | 596 | * @} |
Michael J. Spencer |
2:1df0b61d3b5a | 597 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 598 | |
Michael J. Spencer |
2:1df0b61d3b5a | 599 | #endif /* _TIMER */ |
Michael J. Spencer |
2:1df0b61d3b5a | 600 | |
Michael J. Spencer |
2:1df0b61d3b5a | 601 | /** |
Michael J. Spencer |
2:1df0b61d3b5a | 602 | * @} |
Michael J. Spencer |
2:1df0b61d3b5a | 603 | */ |
Michael J. Spencer |
2:1df0b61d3b5a | 604 | |
Michael J. Spencer |
2:1df0b61d3b5a | 605 | /* --------------------------------- End Of File ------------------------------ */ |
Michael J. Spencer |
2:1df0b61d3b5a | 606 | #endif /* __LPC17XX__ */ |