Michael Spencer / Smoothie

Fork of Smoothie to port to mbed non-LPC targets.

Dependencies:   mbed

Fork of Smoothie by Stéphane Cachat

libs/LPC17xx/LPC17xxLib/src/lpc17xx_pwm.c@2:1df0b61d3b5a, 2014-02-28 (annotated)

Committer:
Michael J. Spencer
Date:
Fri Feb 28 18:52:52 2014 -0800
Revision:
2:1df0b61d3b5a
Update to latest Smoothie.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Michael J. Spencer 2:1df0b61d3b5a 1 #ifdef __LPC17XX__
Michael J. Spencer 2:1df0b61d3b5a 2
Michael J. Spencer 2:1df0b61d3b5a 3 /**********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 4 * $Id$ lpc17xx_pwm.c 2011-03-31
Michael J. Spencer 2:1df0b61d3b5a 5 *//**
Michael J. Spencer 2:1df0b61d3b5a 6 * @file lpc17xx_pwm.c
Michael J. Spencer 2:1df0b61d3b5a 7 * @brief Contains all functions support for PWM firmware library on LPC17xx
Michael J. Spencer 2:1df0b61d3b5a 8 * @version 2.1
Michael J. Spencer 2:1df0b61d3b5a 9 * @date 31. Mar. 2011
Michael J. Spencer 2:1df0b61d3b5a 10 * @author NXP MCU SW Application Team
Michael J. Spencer 2:1df0b61d3b5a 11 *
Michael J. Spencer 2:1df0b61d3b5a 12 * Copyright(C) 2011, NXP Semiconductor
Michael J. Spencer 2:1df0b61d3b5a 13 * All rights reserved.
Michael J. Spencer 2:1df0b61d3b5a 14 *
Michael J. Spencer 2:1df0b61d3b5a 15 ***********************************************************************
Michael J. Spencer 2:1df0b61d3b5a 16 * Software that is described herein is for illustrative purposes only
Michael J. Spencer 2:1df0b61d3b5a 17 * which provides customers with programming information regarding the
Michael J. Spencer 2:1df0b61d3b5a 18 * products. This software is supplied "AS IS" without any warranties.
Michael J. Spencer 2:1df0b61d3b5a 19 * NXP Semiconductors assumes no responsibility or liability for the
Michael J. Spencer 2:1df0b61d3b5a 20 * use of the software, conveys no license or title under any patent,
Michael J. Spencer 2:1df0b61d3b5a 21 * copyright, or mask work right to the product. NXP Semiconductors
Michael J. Spencer 2:1df0b61d3b5a 22 * reserves the right to make changes in the software without
Michael J. Spencer 2:1df0b61d3b5a 23 * notification. NXP Semiconductors also make no representation or
Michael J. Spencer 2:1df0b61d3b5a 24 * warranty that such application will be suitable for the specified
Michael J. Spencer 2:1df0b61d3b5a 25 * use without further testing or modification.
Michael J. Spencer 2:1df0b61d3b5a 26 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 27
Michael J. Spencer 2:1df0b61d3b5a 28 /* Peripheral group ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 29 /** @addtogroup PWM
Michael J. Spencer 2:1df0b61d3b5a 30 * @{
Michael J. Spencer 2:1df0b61d3b5a 31 */
Michael J. Spencer 2:1df0b61d3b5a 32
Michael J. Spencer 2:1df0b61d3b5a 33 /* Includes ------------------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 34 #include "lpc17xx_pwm.h"
Michael J. Spencer 2:1df0b61d3b5a 35 #include "lpc17xx_clkpwr.h"
Michael J. Spencer 2:1df0b61d3b5a 36
Michael J. Spencer 2:1df0b61d3b5a 37 /* If this source file built with example, the LPC17xx FW library configuration
Michael J. Spencer 2:1df0b61d3b5a 38 * file in each example directory ("lpc17xx_libcfg.h") must be included,
Michael J. Spencer 2:1df0b61d3b5a 39 * otherwise the default FW library configuration file must be included instead
Michael J. Spencer 2:1df0b61d3b5a 40 */
Michael J. Spencer 2:1df0b61d3b5a 41 #ifdef __BUILD_WITH_EXAMPLE__
Michael J. Spencer 2:1df0b61d3b5a 42 #include "lpc17xx_libcfg.h"
Michael J. Spencer 2:1df0b61d3b5a 43 #else
Michael J. Spencer 2:1df0b61d3b5a 44 #include "lpc17xx_libcfg_default.h"
Michael J. Spencer 2:1df0b61d3b5a 45 #endif /* __BUILD_WITH_EXAMPLE__ */
Michael J. Spencer 2:1df0b61d3b5a 46
Michael J. Spencer 2:1df0b61d3b5a 47
Michael J. Spencer 2:1df0b61d3b5a 48 #ifdef _PWM
Michael J. Spencer 2:1df0b61d3b5a 49
Michael J. Spencer 2:1df0b61d3b5a 50
Michael J. Spencer 2:1df0b61d3b5a 51 /* Public Functions ----------------------------------------------------------- */
Michael J. Spencer 2:1df0b61d3b5a 52 /** @addtogroup PWM_Public_Functions
Michael J. Spencer 2:1df0b61d3b5a 53 * @{
Michael J. Spencer 2:1df0b61d3b5a 54 */
Michael J. Spencer 2:1df0b61d3b5a 55
Michael J. Spencer 2:1df0b61d3b5a 56
Michael J. Spencer 2:1df0b61d3b5a 57 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 58 * @brief Check whether specified interrupt flag in PWM is set or not
Michael J. Spencer 2:1df0b61d3b5a 59 * @param[in] PWMx: PWM peripheral, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 60 * @param[in] IntFlag: PWM interrupt flag, should be:
Michael J. Spencer 2:1df0b61d3b5a 61 * - PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0
Michael J. Spencer 2:1df0b61d3b5a 62 * - PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1
Michael J. Spencer 2:1df0b61d3b5a 63 * - PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2
Michael J. Spencer 2:1df0b61d3b5a 64 * - PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3
Michael J. Spencer 2:1df0b61d3b5a 65 * - PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4
Michael J. Spencer 2:1df0b61d3b5a 66 * - PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5
Michael J. Spencer 2:1df0b61d3b5a 67 * - PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6
Michael J. Spencer 2:1df0b61d3b5a 68 * - PWM_INTSTAT_CAP0: Interrupt flag for capture input 0
Michael J. Spencer 2:1df0b61d3b5a 69 * - PWM_INTSTAT_CAP1: Interrupt flag for capture input 1
Michael J. Spencer 2:1df0b61d3b5a 70 * @return New State of PWM interrupt flag (SET or RESET)
Michael J. Spencer 2:1df0b61d3b5a 71 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 72 IntStatus PWM_GetIntStatus(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Michael J. Spencer 2:1df0b61d3b5a 73 {
Michael J. Spencer 2:1df0b61d3b5a 74 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 75 CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag));
Michael J. Spencer 2:1df0b61d3b5a 76
Michael J. Spencer 2:1df0b61d3b5a 77 return ((PWMx->IR & IntFlag) ? SET : RESET);
Michael J. Spencer 2:1df0b61d3b5a 78 }
Michael J. Spencer 2:1df0b61d3b5a 79
Michael J. Spencer 2:1df0b61d3b5a 80
Michael J. Spencer 2:1df0b61d3b5a 81
Michael J. Spencer 2:1df0b61d3b5a 82 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 83 * @brief Clear specified PWM Interrupt pending
Michael J. Spencer 2:1df0b61d3b5a 84 * @param[in] PWMx: PWM peripheral, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 85 * @param[in] IntFlag: PWM interrupt flag, should be:
Michael J. Spencer 2:1df0b61d3b5a 86 * - PWM_INTSTAT_MR0: Interrupt flag for PWM match channel 0
Michael J. Spencer 2:1df0b61d3b5a 87 * - PWM_INTSTAT_MR1: Interrupt flag for PWM match channel 1
Michael J. Spencer 2:1df0b61d3b5a 88 * - PWM_INTSTAT_MR2: Interrupt flag for PWM match channel 2
Michael J. Spencer 2:1df0b61d3b5a 89 * - PWM_INTSTAT_MR3: Interrupt flag for PWM match channel 3
Michael J. Spencer 2:1df0b61d3b5a 90 * - PWM_INTSTAT_MR4: Interrupt flag for PWM match channel 4
Michael J. Spencer 2:1df0b61d3b5a 91 * - PWM_INTSTAT_MR5: Interrupt flag for PWM match channel 5
Michael J. Spencer 2:1df0b61d3b5a 92 * - PWM_INTSTAT_MR6: Interrupt flag for PWM match channel 6
Michael J. Spencer 2:1df0b61d3b5a 93 * - PWM_INTSTAT_CAP0: Interrupt flag for capture input 0
Michael J. Spencer 2:1df0b61d3b5a 94 * - PWM_INTSTAT_CAP1: Interrupt flag for capture input 1
Michael J. Spencer 2:1df0b61d3b5a 95 * @return None
Michael J. Spencer 2:1df0b61d3b5a 96 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 97 void PWM_ClearIntPending(LPC_PWM_TypeDef *PWMx, uint32_t IntFlag)
Michael J. Spencer 2:1df0b61d3b5a 98 {
Michael J. Spencer 2:1df0b61d3b5a 99 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 100 CHECK_PARAM(PARAM_PWM_INTSTAT(IntFlag));
Michael J. Spencer 2:1df0b61d3b5a 101 PWMx->IR = IntFlag;
Michael J. Spencer 2:1df0b61d3b5a 102 }
Michael J. Spencer 2:1df0b61d3b5a 103
Michael J. Spencer 2:1df0b61d3b5a 104
Michael J. Spencer 2:1df0b61d3b5a 105
Michael J. Spencer 2:1df0b61d3b5a 106 /*****************************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 107 * @brief Fills each PWM_InitStruct member with its default value:
Michael J. Spencer 2:1df0b61d3b5a 108 * - If PWMCounterMode = PWM_MODE_TIMER:
Michael J. Spencer 2:1df0b61d3b5a 109 * + PrescaleOption = PWM_TIMER_PRESCALE_USVAL
Michael J. Spencer 2:1df0b61d3b5a 110 * + PrescaleValue = 1
Michael J. Spencer 2:1df0b61d3b5a 111 * - If PWMCounterMode = PWM_MODE_COUNTER:
Michael J. Spencer 2:1df0b61d3b5a 112 * + CountInputSelect = PWM_COUNTER_PCAP1_0
Michael J. Spencer 2:1df0b61d3b5a 113 * + CounterOption = PWM_COUNTER_RISING
Michael J. Spencer 2:1df0b61d3b5a 114 * @param[in] PWMTimerCounterMode Timer or Counter mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 115 * - PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode
Michael J. Spencer 2:1df0b61d3b5a 116 * - PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode
Michael J. Spencer 2:1df0b61d3b5a 117 * @param[in] PWM_InitStruct Pointer to structure (PWM_TIMERCFG_Type or
Michael J. Spencer 2:1df0b61d3b5a 118 * PWM_COUNTERCFG_Type) which will be initialized.
Michael J. Spencer 2:1df0b61d3b5a 119 * @return None
Michael J. Spencer 2:1df0b61d3b5a 120 * Note: PWM_InitStruct pointer will be assigned to corresponding structure
Michael J. Spencer 2:1df0b61d3b5a 121 * (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode.
Michael J. Spencer 2:1df0b61d3b5a 122 *******************************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 123 void PWM_ConfigStructInit(uint8_t PWMTimerCounterMode, void *PWM_InitStruct)
Michael J. Spencer 2:1df0b61d3b5a 124 {
Michael J. Spencer 2:1df0b61d3b5a 125 PWM_TIMERCFG_Type *pTimeCfg;
Michael J. Spencer 2:1df0b61d3b5a 126 PWM_COUNTERCFG_Type *pCounterCfg;
Michael J. Spencer 2:1df0b61d3b5a 127 CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
Michael J. Spencer 2:1df0b61d3b5a 128
Michael J. Spencer 2:1df0b61d3b5a 129 pTimeCfg = (PWM_TIMERCFG_Type *) PWM_InitStruct;
Michael J. Spencer 2:1df0b61d3b5a 130 pCounterCfg = (PWM_COUNTERCFG_Type *) PWM_InitStruct;
Michael J. Spencer 2:1df0b61d3b5a 131
Michael J. Spencer 2:1df0b61d3b5a 132 if (PWMTimerCounterMode == PWM_MODE_TIMER )
Michael J. Spencer 2:1df0b61d3b5a 133 {
Michael J. Spencer 2:1df0b61d3b5a 134 pTimeCfg->PrescaleOption = PWM_TIMER_PRESCALE_USVAL;
Michael J. Spencer 2:1df0b61d3b5a 135 pTimeCfg->PrescaleValue = 1;
Michael J. Spencer 2:1df0b61d3b5a 136 }
Michael J. Spencer 2:1df0b61d3b5a 137 else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
Michael J. Spencer 2:1df0b61d3b5a 138 {
Michael J. Spencer 2:1df0b61d3b5a 139 pCounterCfg->CountInputSelect = PWM_COUNTER_PCAP1_0;
Michael J. Spencer 2:1df0b61d3b5a 140 pCounterCfg->CounterOption = PWM_COUNTER_RISING;
Michael J. Spencer 2:1df0b61d3b5a 141 }
Michael J. Spencer 2:1df0b61d3b5a 142 }
Michael J. Spencer 2:1df0b61d3b5a 143
Michael J. Spencer 2:1df0b61d3b5a 144
Michael J. Spencer 2:1df0b61d3b5a 145 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 146 * @brief Initializes the PWMx peripheral corresponding to the specified
Michael J. Spencer 2:1df0b61d3b5a 147 * parameters in the PWM_ConfigStruct.
Michael J. Spencer 2:1df0b61d3b5a 148 * @param[in] PWMx PWM peripheral, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 149 * @param[in] PWMTimerCounterMode Timer or Counter mode, should be:
Michael J. Spencer 2:1df0b61d3b5a 150 * - PWM_MODE_TIMER: Counter of PWM peripheral is in Timer mode
Michael J. Spencer 2:1df0b61d3b5a 151 * - PWM_MODE_COUNTER: Counter of PWM peripheral is in Counter mode
Michael J. Spencer 2:1df0b61d3b5a 152 * @param[in] PWM_ConfigStruct Pointer to structure (PWM_TIMERCFG_Type or
Michael J. Spencer 2:1df0b61d3b5a 153 * PWM_COUNTERCFG_Type) which will be initialized.
Michael J. Spencer 2:1df0b61d3b5a 154 * @return None
Michael J. Spencer 2:1df0b61d3b5a 155 * Note: PWM_ConfigStruct pointer will be assigned to corresponding structure
Michael J. Spencer 2:1df0b61d3b5a 156 * (PWM_TIMERCFG_Type or PWM_COUNTERCFG_Type) due to PWMTimerCounterMode.
Michael J. Spencer 2:1df0b61d3b5a 157 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 158 void PWM_Init(LPC_PWM_TypeDef *PWMx, uint32_t PWMTimerCounterMode, void *PWM_ConfigStruct)
Michael J. Spencer 2:1df0b61d3b5a 159 {
Michael J. Spencer 2:1df0b61d3b5a 160 PWM_TIMERCFG_Type *pTimeCfg;
Michael J. Spencer 2:1df0b61d3b5a 161 PWM_COUNTERCFG_Type *pCounterCfg;
Michael J. Spencer 2:1df0b61d3b5a 162 uint64_t clkdlycnt;
Michael J. Spencer 2:1df0b61d3b5a 163
Michael J. Spencer 2:1df0b61d3b5a 164 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 165 CHECK_PARAM(PARAM_PWM_TC_MODE(PWMTimerCounterMode));
Michael J. Spencer 2:1df0b61d3b5a 166
Michael J. Spencer 2:1df0b61d3b5a 167 pTimeCfg = (PWM_TIMERCFG_Type *)PWM_ConfigStruct;
Michael J. Spencer 2:1df0b61d3b5a 168 pCounterCfg = (PWM_COUNTERCFG_Type *)PWM_ConfigStruct;
Michael J. Spencer 2:1df0b61d3b5a 169
Michael J. Spencer 2:1df0b61d3b5a 170
Michael J. Spencer 2:1df0b61d3b5a 171 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, ENABLE);
Michael J. Spencer 2:1df0b61d3b5a 172 CLKPWR_SetPCLKDiv (CLKPWR_PCLKSEL_PWM1, CLKPWR_PCLKSEL_CCLK_DIV_4);
Michael J. Spencer 2:1df0b61d3b5a 173 // Get peripheral clock of PWM1
Michael J. Spencer 2:1df0b61d3b5a 174 clkdlycnt = (uint64_t) CLKPWR_GetPCLK (CLKPWR_PCLKSEL_PWM1);
Michael J. Spencer 2:1df0b61d3b5a 175
Michael J. Spencer 2:1df0b61d3b5a 176
Michael J. Spencer 2:1df0b61d3b5a 177 // Clear all interrupts pending
Michael J. Spencer 2:1df0b61d3b5a 178 PWMx->IR = 0xFF & PWM_IR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 179 PWMx->TCR = 0x00;
Michael J. Spencer 2:1df0b61d3b5a 180 PWMx->CTCR = 0x00;
Michael J. Spencer 2:1df0b61d3b5a 181 PWMx->MCR = 0x00;
Michael J. Spencer 2:1df0b61d3b5a 182 PWMx->CCR = 0x00;
Michael J. Spencer 2:1df0b61d3b5a 183 PWMx->PCR = 0x00;
Michael J. Spencer 2:1df0b61d3b5a 184 PWMx->LER = 0x00;
Michael J. Spencer 2:1df0b61d3b5a 185
Michael J. Spencer 2:1df0b61d3b5a 186 if (PWMTimerCounterMode == PWM_MODE_TIMER)
Michael J. Spencer 2:1df0b61d3b5a 187 {
Michael J. Spencer 2:1df0b61d3b5a 188 CHECK_PARAM(PARAM_PWM_TIMER_PRESCALE(pTimeCfg->PrescaleOption));
Michael J. Spencer 2:1df0b61d3b5a 189
Michael J. Spencer 2:1df0b61d3b5a 190 /* Absolute prescale value */
Michael J. Spencer 2:1df0b61d3b5a 191 if (pTimeCfg->PrescaleOption == PWM_TIMER_PRESCALE_TICKVAL)
Michael J. Spencer 2:1df0b61d3b5a 192 {
Michael J. Spencer 2:1df0b61d3b5a 193 PWMx->PR = pTimeCfg->PrescaleValue - 1;
Michael J. Spencer 2:1df0b61d3b5a 194 }
Michael J. Spencer 2:1df0b61d3b5a 195 /* uSecond prescale value */
Michael J. Spencer 2:1df0b61d3b5a 196 else
Michael J. Spencer 2:1df0b61d3b5a 197 {
Michael J. Spencer 2:1df0b61d3b5a 198 clkdlycnt = (clkdlycnt * pTimeCfg->PrescaleValue) / 1000000;
Michael J. Spencer 2:1df0b61d3b5a 199 PWMx->PR = ((uint32_t) clkdlycnt) - 1;
Michael J. Spencer 2:1df0b61d3b5a 200 }
Michael J. Spencer 2:1df0b61d3b5a 201
Michael J. Spencer 2:1df0b61d3b5a 202 }
Michael J. Spencer 2:1df0b61d3b5a 203 else if (PWMTimerCounterMode == PWM_MODE_COUNTER)
Michael J. Spencer 2:1df0b61d3b5a 204 {
Michael J. Spencer 2:1df0b61d3b5a 205 CHECK_PARAM(PARAM_PWM_COUNTER_INPUTSEL(pCounterCfg->CountInputSelect));
Michael J. Spencer 2:1df0b61d3b5a 206 CHECK_PARAM(PARAM_PWM_COUNTER_EDGE(pCounterCfg->CounterOption));
Michael J. Spencer 2:1df0b61d3b5a 207
Michael J. Spencer 2:1df0b61d3b5a 208 PWMx->CTCR |= (PWM_CTCR_MODE((uint32_t)pCounterCfg->CounterOption)) \
Michael J. Spencer 2:1df0b61d3b5a 209 | (PWM_CTCR_SELECT_INPUT((uint32_t)pCounterCfg->CountInputSelect));
Michael J. Spencer 2:1df0b61d3b5a 210 }
Michael J. Spencer 2:1df0b61d3b5a 211 }
Michael J. Spencer 2:1df0b61d3b5a 212
Michael J. Spencer 2:1df0b61d3b5a 213 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 214 * @brief De-initializes the PWM peripheral registers to their
Michael J. Spencer 2:1df0b61d3b5a 215 * default reset values.
Michael J. Spencer 2:1df0b61d3b5a 216 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 217 * @return None
Michael J. Spencer 2:1df0b61d3b5a 218 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 219 void PWM_DeInit (LPC_PWM_TypeDef *PWMx)
Michael J. Spencer 2:1df0b61d3b5a 220 {
Michael J. Spencer 2:1df0b61d3b5a 221 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 222
Michael J. Spencer 2:1df0b61d3b5a 223 // Disable PWM control (timer, counter and PWM)
Michael J. Spencer 2:1df0b61d3b5a 224 PWMx->TCR = 0x00;
Michael J. Spencer 2:1df0b61d3b5a 225 CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCPWM1, DISABLE);
Michael J. Spencer 2:1df0b61d3b5a 226
Michael J. Spencer 2:1df0b61d3b5a 227 }
Michael J. Spencer 2:1df0b61d3b5a 228
Michael J. Spencer 2:1df0b61d3b5a 229
Michael J. Spencer 2:1df0b61d3b5a 230 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 231 * @brief Enable/Disable PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 232 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 233 * @param[in] NewState New State of this function, should be:
Michael J. Spencer 2:1df0b61d3b5a 234 * - ENABLE: Enable PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 235 * - DISABLE: Disable PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 236 * @return None
Michael J. Spencer 2:1df0b61d3b5a 237 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 238 void PWM_Cmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 239 {
Michael J. Spencer 2:1df0b61d3b5a 240 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 241 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 242
Michael J. Spencer 2:1df0b61d3b5a 243 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 244 {
Michael J. Spencer 2:1df0b61d3b5a 245 PWMx->TCR |= PWM_TCR_PWM_ENABLE;
Michael J. Spencer 2:1df0b61d3b5a 246 }
Michael J. Spencer 2:1df0b61d3b5a 247 else
Michael J. Spencer 2:1df0b61d3b5a 248 {
Michael J. Spencer 2:1df0b61d3b5a 249 PWMx->TCR &= (~PWM_TCR_PWM_ENABLE) & PWM_TCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 250 }
Michael J. Spencer 2:1df0b61d3b5a 251 }
Michael J. Spencer 2:1df0b61d3b5a 252
Michael J. Spencer 2:1df0b61d3b5a 253
Michael J. Spencer 2:1df0b61d3b5a 254 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 255 * @brief Enable/Disable Counter in PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 256 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 257 * @param[in] NewState New State of this function, should be:
Michael J. Spencer 2:1df0b61d3b5a 258 * - ENABLE: Enable Counter in PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 259 * - DISABLE: Disable Counter in PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 260 * @return None
Michael J. Spencer 2:1df0b61d3b5a 261 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 262 void PWM_CounterCmd(LPC_PWM_TypeDef *PWMx, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 263 {
Michael J. Spencer 2:1df0b61d3b5a 264 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 265 CHECK_PARAM(PARAM_FUNCTIONALSTATE(NewState));
Michael J. Spencer 2:1df0b61d3b5a 266 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 267 {
Michael J. Spencer 2:1df0b61d3b5a 268 PWMx->TCR |= PWM_TCR_COUNTER_ENABLE;
Michael J. Spencer 2:1df0b61d3b5a 269 }
Michael J. Spencer 2:1df0b61d3b5a 270 else
Michael J. Spencer 2:1df0b61d3b5a 271 {
Michael J. Spencer 2:1df0b61d3b5a 272 PWMx->TCR &= (~PWM_TCR_COUNTER_ENABLE) & PWM_TCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 273 }
Michael J. Spencer 2:1df0b61d3b5a 274 }
Michael J. Spencer 2:1df0b61d3b5a 275
Michael J. Spencer 2:1df0b61d3b5a 276
Michael J. Spencer 2:1df0b61d3b5a 277 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 278 * @brief Reset Counter in PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 279 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 280 * @return None
Michael J. Spencer 2:1df0b61d3b5a 281 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 282 void PWM_ResetCounter(LPC_PWM_TypeDef *PWMx)
Michael J. Spencer 2:1df0b61d3b5a 283 {
Michael J. Spencer 2:1df0b61d3b5a 284 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 285 PWMx->TCR |= PWM_TCR_COUNTER_RESET;
Michael J. Spencer 2:1df0b61d3b5a 286 PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 287 }
Michael J. Spencer 2:1df0b61d3b5a 288
Michael J. Spencer 2:1df0b61d3b5a 289
Michael J. Spencer 2:1df0b61d3b5a 290 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 291 * @brief Configures match for PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 292 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 293 * @param[in] PWM_MatchConfigStruct Pointer to a PWM_MATCHCFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 294 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 295 * specified PWM match function.
Michael J. Spencer 2:1df0b61d3b5a 296 * @return None
Michael J. Spencer 2:1df0b61d3b5a 297 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 298 void PWM_ConfigMatch(LPC_PWM_TypeDef *PWMx, PWM_MATCHCFG_Type *PWM_MatchConfigStruct)
Michael J. Spencer 2:1df0b61d3b5a 299 {
Michael J. Spencer 2:1df0b61d3b5a 300 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 301 CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(PWM_MatchConfigStruct->MatchChannel));
Michael J. Spencer 2:1df0b61d3b5a 302 CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->IntOnMatch));
Michael J. Spencer 2:1df0b61d3b5a 303 CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->ResetOnMatch));
Michael J. Spencer 2:1df0b61d3b5a 304 CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_MatchConfigStruct->StopOnMatch));
Michael J. Spencer 2:1df0b61d3b5a 305
Michael J. Spencer 2:1df0b61d3b5a 306 //interrupt on MRn
Michael J. Spencer 2:1df0b61d3b5a 307 if (PWM_MatchConfigStruct->IntOnMatch == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 308 {
Michael J. Spencer 2:1df0b61d3b5a 309 PWMx->MCR |= PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
Michael J. Spencer 2:1df0b61d3b5a 310 }
Michael J. Spencer 2:1df0b61d3b5a 311 else
Michael J. Spencer 2:1df0b61d3b5a 312 {
Michael J. Spencer 2:1df0b61d3b5a 313 PWMx->MCR &= (~PWM_MCR_INT_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
Michael J. Spencer 2:1df0b61d3b5a 314 & PWM_MCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 315 }
Michael J. Spencer 2:1df0b61d3b5a 316
Michael J. Spencer 2:1df0b61d3b5a 317 //reset on MRn
Michael J. Spencer 2:1df0b61d3b5a 318 if (PWM_MatchConfigStruct->ResetOnMatch == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 319 {
Michael J. Spencer 2:1df0b61d3b5a 320 PWMx->MCR |= PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
Michael J. Spencer 2:1df0b61d3b5a 321 }
Michael J. Spencer 2:1df0b61d3b5a 322 else
Michael J. Spencer 2:1df0b61d3b5a 323 {
Michael J. Spencer 2:1df0b61d3b5a 324 PWMx->MCR &= (~PWM_MCR_RESET_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
Michael J. Spencer 2:1df0b61d3b5a 325 & PWM_MCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 326 }
Michael J. Spencer 2:1df0b61d3b5a 327
Michael J. Spencer 2:1df0b61d3b5a 328 //stop on MRn
Michael J. Spencer 2:1df0b61d3b5a 329 if (PWM_MatchConfigStruct->StopOnMatch == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 330 {
Michael J. Spencer 2:1df0b61d3b5a 331 PWMx->MCR |= PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel);
Michael J. Spencer 2:1df0b61d3b5a 332 }
Michael J. Spencer 2:1df0b61d3b5a 333 else
Michael J. Spencer 2:1df0b61d3b5a 334 {
Michael J. Spencer 2:1df0b61d3b5a 335 PWMx->MCR &= (~PWM_MCR_STOP_ON_MATCH(PWM_MatchConfigStruct->MatchChannel)) \
Michael J. Spencer 2:1df0b61d3b5a 336 & PWM_MCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 337 }
Michael J. Spencer 2:1df0b61d3b5a 338 }
Michael J. Spencer 2:1df0b61d3b5a 339
Michael J. Spencer 2:1df0b61d3b5a 340
Michael J. Spencer 2:1df0b61d3b5a 341 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 342 * @brief Configures capture input for PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 343 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 344 * @param[in] PWM_CaptureConfigStruct Pointer to a PWM_CAPTURECFG_Type structure
Michael J. Spencer 2:1df0b61d3b5a 345 * that contains the configuration information for the
Michael J. Spencer 2:1df0b61d3b5a 346 * specified PWM capture input function.
Michael J. Spencer 2:1df0b61d3b5a 347 * @return None
Michael J. Spencer 2:1df0b61d3b5a 348 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 349 void PWM_ConfigCapture(LPC_PWM_TypeDef *PWMx, PWM_CAPTURECFG_Type *PWM_CaptureConfigStruct)
Michael J. Spencer 2:1df0b61d3b5a 350 {
Michael J. Spencer 2:1df0b61d3b5a 351 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 352 CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(PWM_CaptureConfigStruct->CaptureChannel));
Michael J. Spencer 2:1df0b61d3b5a 353 CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->FallingEdge));
Michael J. Spencer 2:1df0b61d3b5a 354 CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->IntOnCaption));
Michael J. Spencer 2:1df0b61d3b5a 355 CHECK_PARAM(PARAM_FUNCTIONALSTATE(PWM_CaptureConfigStruct->RisingEdge));
Michael J. Spencer 2:1df0b61d3b5a 356
Michael J. Spencer 2:1df0b61d3b5a 357 if (PWM_CaptureConfigStruct->RisingEdge == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 358 {
Michael J. Spencer 2:1df0b61d3b5a 359 PWMx->CCR |= PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel);
Michael J. Spencer 2:1df0b61d3b5a 360 }
Michael J. Spencer 2:1df0b61d3b5a 361 else
Michael J. Spencer 2:1df0b61d3b5a 362 {
Michael J. Spencer 2:1df0b61d3b5a 363 PWMx->CCR &= (~PWM_CCR_CAP_RISING(PWM_CaptureConfigStruct->CaptureChannel)) \
Michael J. Spencer 2:1df0b61d3b5a 364 & PWM_CCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 365 }
Michael J. Spencer 2:1df0b61d3b5a 366
Michael J. Spencer 2:1df0b61d3b5a 367 if (PWM_CaptureConfigStruct->FallingEdge == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 368 {
Michael J. Spencer 2:1df0b61d3b5a 369 PWMx->CCR |= PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel);
Michael J. Spencer 2:1df0b61d3b5a 370 }
Michael J. Spencer 2:1df0b61d3b5a 371 else
Michael J. Spencer 2:1df0b61d3b5a 372 {
Michael J. Spencer 2:1df0b61d3b5a 373 PWMx->CCR &= (~PWM_CCR_CAP_FALLING(PWM_CaptureConfigStruct->CaptureChannel)) \
Michael J. Spencer 2:1df0b61d3b5a 374 & PWM_CCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 375 }
Michael J. Spencer 2:1df0b61d3b5a 376
Michael J. Spencer 2:1df0b61d3b5a 377 if (PWM_CaptureConfigStruct->IntOnCaption == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 378 {
Michael J. Spencer 2:1df0b61d3b5a 379 PWMx->CCR |= PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel);
Michael J. Spencer 2:1df0b61d3b5a 380 }
Michael J. Spencer 2:1df0b61d3b5a 381 else
Michael J. Spencer 2:1df0b61d3b5a 382 {
Michael J. Spencer 2:1df0b61d3b5a 383 PWMx->CCR &= (~PWM_CCR_INT_ON_CAP(PWM_CaptureConfigStruct->CaptureChannel)) \
Michael J. Spencer 2:1df0b61d3b5a 384 & PWM_CCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 385 }
Michael J. Spencer 2:1df0b61d3b5a 386 }
Michael J. Spencer 2:1df0b61d3b5a 387
Michael J. Spencer 2:1df0b61d3b5a 388
Michael J. Spencer 2:1df0b61d3b5a 389 /*********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 390 * @brief Read value of capture register PWM peripheral
Michael J. Spencer 2:1df0b61d3b5a 391 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 392 * @param[in] CaptureChannel: capture channel number, should be in
Michael J. Spencer 2:1df0b61d3b5a 393 * range 0 to 1
Michael J. Spencer 2:1df0b61d3b5a 394 * @return Value of capture register
Michael J. Spencer 2:1df0b61d3b5a 395 **********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 396 uint32_t PWM_GetCaptureValue(LPC_PWM_TypeDef *PWMx, uint8_t CaptureChannel)
Michael J. Spencer 2:1df0b61d3b5a 397 {
Michael J. Spencer 2:1df0b61d3b5a 398 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 399 CHECK_PARAM(PARAM_PWM1_CAPTURE_CHANNEL(CaptureChannel));
Michael J. Spencer 2:1df0b61d3b5a 400
Michael J. Spencer 2:1df0b61d3b5a 401 switch (CaptureChannel)
Michael J. Spencer 2:1df0b61d3b5a 402 {
Michael J. Spencer 2:1df0b61d3b5a 403 case 0:
Michael J. Spencer 2:1df0b61d3b5a 404 return PWMx->CR0;
Michael J. Spencer 2:1df0b61d3b5a 405
Michael J. Spencer 2:1df0b61d3b5a 406 case 1:
Michael J. Spencer 2:1df0b61d3b5a 407 return PWMx->CR1;
Michael J. Spencer 2:1df0b61d3b5a 408
Michael J. Spencer 2:1df0b61d3b5a 409 default:
Michael J. Spencer 2:1df0b61d3b5a 410 return (0);
Michael J. Spencer 2:1df0b61d3b5a 411 }
Michael J. Spencer 2:1df0b61d3b5a 412 }
Michael J. Spencer 2:1df0b61d3b5a 413
Michael J. Spencer 2:1df0b61d3b5a 414
Michael J. Spencer 2:1df0b61d3b5a 415 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 416 * @brief Update value for each PWM channel with update type option
Michael J. Spencer 2:1df0b61d3b5a 417 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 418 * @param[in] MatchChannel Match channel
Michael J. Spencer 2:1df0b61d3b5a 419 * @param[in] MatchValue Match value
Michael J. Spencer 2:1df0b61d3b5a 420 * @param[in] UpdateType Type of Update, should be:
Michael J. Spencer 2:1df0b61d3b5a 421 * - PWM_MATCH_UPDATE_NOW: The update value will be updated for
Michael J. Spencer 2:1df0b61d3b5a 422 * this channel immediately
Michael J. Spencer 2:1df0b61d3b5a 423 * - PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for
Michael J. Spencer 2:1df0b61d3b5a 424 * this channel on next reset by a PWM Match event.
Michael J. Spencer 2:1df0b61d3b5a 425 * @return None
Michael J. Spencer 2:1df0b61d3b5a 426 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 427 void PWM_MatchUpdate(LPC_PWM_TypeDef *PWMx, uint8_t MatchChannel, \
Michael J. Spencer 2:1df0b61d3b5a 428 uint32_t MatchValue, uint8_t UpdateType)
Michael J. Spencer 2:1df0b61d3b5a 429 {
Michael J. Spencer 2:1df0b61d3b5a 430 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 431 CHECK_PARAM(PARAM_PWM1_MATCH_CHANNEL(MatchChannel));
Michael J. Spencer 2:1df0b61d3b5a 432 CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType));
Michael J. Spencer 2:1df0b61d3b5a 433
Michael J. Spencer 2:1df0b61d3b5a 434 switch (MatchChannel)
Michael J. Spencer 2:1df0b61d3b5a 435 {
Michael J. Spencer 2:1df0b61d3b5a 436 case 0:
Michael J. Spencer 2:1df0b61d3b5a 437 PWMx->MR0 = MatchValue;
Michael J. Spencer 2:1df0b61d3b5a 438 break;
Michael J. Spencer 2:1df0b61d3b5a 439
Michael J. Spencer 2:1df0b61d3b5a 440 case 1:
Michael J. Spencer 2:1df0b61d3b5a 441 PWMx->MR1 = MatchValue;
Michael J. Spencer 2:1df0b61d3b5a 442 break;
Michael J. Spencer 2:1df0b61d3b5a 443
Michael J. Spencer 2:1df0b61d3b5a 444 case 2:
Michael J. Spencer 2:1df0b61d3b5a 445 PWMx->MR2 = MatchValue;
Michael J. Spencer 2:1df0b61d3b5a 446 break;
Michael J. Spencer 2:1df0b61d3b5a 447
Michael J. Spencer 2:1df0b61d3b5a 448 case 3:
Michael J. Spencer 2:1df0b61d3b5a 449 PWMx->MR3 = MatchValue;
Michael J. Spencer 2:1df0b61d3b5a 450 break;
Michael J. Spencer 2:1df0b61d3b5a 451
Michael J. Spencer 2:1df0b61d3b5a 452 case 4:
Michael J. Spencer 2:1df0b61d3b5a 453 PWMx->MR4 = MatchValue;
Michael J. Spencer 2:1df0b61d3b5a 454 break;
Michael J. Spencer 2:1df0b61d3b5a 455
Michael J. Spencer 2:1df0b61d3b5a 456 case 5:
Michael J. Spencer 2:1df0b61d3b5a 457 PWMx->MR5 = MatchValue;
Michael J. Spencer 2:1df0b61d3b5a 458 break;
Michael J. Spencer 2:1df0b61d3b5a 459
Michael J. Spencer 2:1df0b61d3b5a 460 case 6:
Michael J. Spencer 2:1df0b61d3b5a 461 PWMx->MR6 = MatchValue;
Michael J. Spencer 2:1df0b61d3b5a 462 break;
Michael J. Spencer 2:1df0b61d3b5a 463 }
Michael J. Spencer 2:1df0b61d3b5a 464
Michael J. Spencer 2:1df0b61d3b5a 465 // Write Latch register
Michael J. Spencer 2:1df0b61d3b5a 466 PWMx->LER |= PWM_LER_EN_MATCHn_LATCH(MatchChannel);
Michael J. Spencer 2:1df0b61d3b5a 467
Michael J. Spencer 2:1df0b61d3b5a 468 // In case of update now
Michael J. Spencer 2:1df0b61d3b5a 469 if (UpdateType == PWM_MATCH_UPDATE_NOW)
Michael J. Spencer 2:1df0b61d3b5a 470 {
Michael J. Spencer 2:1df0b61d3b5a 471 PWMx->TCR |= PWM_TCR_COUNTER_RESET;
Michael J. Spencer 2:1df0b61d3b5a 472 PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 473 }
Michael J. Spencer 2:1df0b61d3b5a 474 }
Michael J. Spencer 2:1df0b61d3b5a 475
Michael J. Spencer 2:1df0b61d3b5a 476 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 477 * @brief Update value for multi PWM channel with update type option
Michael J. Spencer 2:1df0b61d3b5a 478 * at the same time
Michael J. Spencer 2:1df0b61d3b5a 479 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 480 * @param[in] MatchStruct Structure that contents match value of 7 pwm channels
Michael J. Spencer 2:1df0b61d3b5a 481 * @param[in] UpdateType Type of Update, should be:
Michael J. Spencer 2:1df0b61d3b5a 482 * - PWM_MATCH_UPDATE_NOW: The update value will be updated for
Michael J. Spencer 2:1df0b61d3b5a 483 * this channel immediately
Michael J. Spencer 2:1df0b61d3b5a 484 * - PWM_MATCH_UPDATE_NEXT_RST: The update value will be updated for
Michael J. Spencer 2:1df0b61d3b5a 485 * this channel on next reset by a PWM Match event.
Michael J. Spencer 2:1df0b61d3b5a 486 * @return None
Michael J. Spencer 2:1df0b61d3b5a 487 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 488 void PWM_MultiMatchUpdate(LPC_PWM_TypeDef *PWMx, PWM_Match_T *MatchStruct , uint8_t UpdateType)
Michael J. Spencer 2:1df0b61d3b5a 489 {
Michael J. Spencer 2:1df0b61d3b5a 490 uint8_t LatchValue = 0;
Michael J. Spencer 2:1df0b61d3b5a 491 uint8_t i;
Michael J. Spencer 2:1df0b61d3b5a 492
Michael J. Spencer 2:1df0b61d3b5a 493 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 494 CHECK_PARAM(PARAM_PWM_MATCH_UPDATE(UpdateType));
Michael J. Spencer 2:1df0b61d3b5a 495
Michael J. Spencer 2:1df0b61d3b5a 496 //Update match value
Michael J. Spencer 2:1df0b61d3b5a 497 for(i=0;i<7;i++)
Michael J. Spencer 2:1df0b61d3b5a 498 {
Michael J. Spencer 2:1df0b61d3b5a 499 if(MatchStruct[i].Status == SET)
Michael J. Spencer 2:1df0b61d3b5a 500 {
Michael J. Spencer 2:1df0b61d3b5a 501 if(i<4)
Michael J. Spencer 2:1df0b61d3b5a 502 *((volatile unsigned int *)(&(PWMx->MR0) + i)) = MatchStruct[i].Matchvalue;
Michael J. Spencer 2:1df0b61d3b5a 503 else
Michael J. Spencer 2:1df0b61d3b5a 504 {
Michael J. Spencer 2:1df0b61d3b5a 505 *((volatile unsigned int *)(&(PWMx->MR4) + (i-4))) = MatchStruct[i].Matchvalue;
Michael J. Spencer 2:1df0b61d3b5a 506 }
Michael J. Spencer 2:1df0b61d3b5a 507 LatchValue |=(1<<i);
Michael J. Spencer 2:1df0b61d3b5a 508 }
Michael J. Spencer 2:1df0b61d3b5a 509 }
Michael J. Spencer 2:1df0b61d3b5a 510 //set update for multi-channel at the same time
Michael J. Spencer 2:1df0b61d3b5a 511 PWMx->LER = LatchValue;
Michael J. Spencer 2:1df0b61d3b5a 512
Michael J. Spencer 2:1df0b61d3b5a 513 // In case of update now
Michael J. Spencer 2:1df0b61d3b5a 514 if (UpdateType == PWM_MATCH_UPDATE_NOW)
Michael J. Spencer 2:1df0b61d3b5a 515 {
Michael J. Spencer 2:1df0b61d3b5a 516 PWMx->TCR |= PWM_TCR_COUNTER_RESET;
Michael J. Spencer 2:1df0b61d3b5a 517 PWMx->TCR &= (~PWM_TCR_COUNTER_RESET) & PWM_TCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 518 }
Michael J. Spencer 2:1df0b61d3b5a 519 }
Michael J. Spencer 2:1df0b61d3b5a 520 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 521 * @brief Configure Edge mode for each PWM channel
Michael J. Spencer 2:1df0b61d3b5a 522 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 523 * @param[in] PWMChannel PWM channel, should be in range from 2 to 6
Michael J. Spencer 2:1df0b61d3b5a 524 * @param[in] ModeOption PWM mode option, should be:
Michael J. Spencer 2:1df0b61d3b5a 525 * - PWM_CHANNEL_SINGLE_EDGE: Single Edge mode
Michael J. Spencer 2:1df0b61d3b5a 526 * - PWM_CHANNEL_DUAL_EDGE: Dual Edge mode
Michael J. Spencer 2:1df0b61d3b5a 527 * @return None
Michael J. Spencer 2:1df0b61d3b5a 528 * Note: PWM Channel 1 can not be selected for mode option
Michael J. Spencer 2:1df0b61d3b5a 529 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 530 void PWM_ChannelConfig(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, uint8_t ModeOption)
Michael J. Spencer 2:1df0b61d3b5a 531 {
Michael J. Spencer 2:1df0b61d3b5a 532 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 533 CHECK_PARAM(PARAM_PWM1_EDGE_MODE_CHANNEL(PWMChannel));
Michael J. Spencer 2:1df0b61d3b5a 534 CHECK_PARAM(PARAM_PWM_CHANNEL_EDGE(ModeOption));
Michael J. Spencer 2:1df0b61d3b5a 535
Michael J. Spencer 2:1df0b61d3b5a 536 // Single edge mode
Michael J. Spencer 2:1df0b61d3b5a 537 if (ModeOption == PWM_CHANNEL_SINGLE_EDGE)
Michael J. Spencer 2:1df0b61d3b5a 538 {
Michael J. Spencer 2:1df0b61d3b5a 539 PWMx->PCR &= (~PWM_PCR_PWMSELn(PWMChannel)) & PWM_PCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 540 }
Michael J. Spencer 2:1df0b61d3b5a 541 // Double edge mode
Michael J. Spencer 2:1df0b61d3b5a 542 else if (PWM_CHANNEL_DUAL_EDGE)
Michael J. Spencer 2:1df0b61d3b5a 543 {
Michael J. Spencer 2:1df0b61d3b5a 544 PWMx->PCR |= PWM_PCR_PWMSELn(PWMChannel);
Michael J. Spencer 2:1df0b61d3b5a 545 }
Michael J. Spencer 2:1df0b61d3b5a 546 }
Michael J. Spencer 2:1df0b61d3b5a 547
Michael J. Spencer 2:1df0b61d3b5a 548
Michael J. Spencer 2:1df0b61d3b5a 549
Michael J. Spencer 2:1df0b61d3b5a 550 /********************************************************************//**
Michael J. Spencer 2:1df0b61d3b5a 551 * @brief Enable/Disable PWM channel output
Michael J. Spencer 2:1df0b61d3b5a 552 * @param[in] PWMx PWM peripheral selected, should be LPC_PWM1
Michael J. Spencer 2:1df0b61d3b5a 553 * @param[in] PWMChannel PWM channel, should be in range from 1 to 6
Michael J. Spencer 2:1df0b61d3b5a 554 * @param[in] NewState New State of this function, should be:
Michael J. Spencer 2:1df0b61d3b5a 555 * - ENABLE: Enable this PWM channel output
Michael J. Spencer 2:1df0b61d3b5a 556 * - DISABLE: Disable this PWM channel output
Michael J. Spencer 2:1df0b61d3b5a 557 * @return None
Michael J. Spencer 2:1df0b61d3b5a 558 *********************************************************************/
Michael J. Spencer 2:1df0b61d3b5a 559 void PWM_ChannelCmd(LPC_PWM_TypeDef *PWMx, uint8_t PWMChannel, FunctionalState NewState)
Michael J. Spencer 2:1df0b61d3b5a 560 {
Michael J. Spencer 2:1df0b61d3b5a 561 CHECK_PARAM(PARAM_PWMx(PWMx));
Michael J. Spencer 2:1df0b61d3b5a 562 CHECK_PARAM(PARAM_PWM1_CHANNEL(PWMChannel));
Michael J. Spencer 2:1df0b61d3b5a 563
Michael J. Spencer 2:1df0b61d3b5a 564 if (NewState == ENABLE)
Michael J. Spencer 2:1df0b61d3b5a 565 {
Michael J. Spencer 2:1df0b61d3b5a 566 PWMx->PCR |= PWM_PCR_PWMENAn(PWMChannel);
Michael J. Spencer 2:1df0b61d3b5a 567 }
Michael J. Spencer 2:1df0b61d3b5a 568 else
Michael J. Spencer 2:1df0b61d3b5a 569 {
Michael J. Spencer 2:1df0b61d3b5a 570 PWMx->PCR &= (~PWM_PCR_PWMENAn(PWMChannel)) & PWM_PCR_BITMASK;
Michael J. Spencer 2:1df0b61d3b5a 571 }
Michael J. Spencer 2:1df0b61d3b5a 572 }
Michael J. Spencer 2:1df0b61d3b5a 573
Michael J. Spencer 2:1df0b61d3b5a 574 /**
Michael J. Spencer 2:1df0b61d3b5a 575 * @}
Michael J. Spencer 2:1df0b61d3b5a 576 */
Michael J. Spencer 2:1df0b61d3b5a 577
Michael J. Spencer 2:1df0b61d3b5a 578 #endif /* _PWM */
Michael J. Spencer 2:1df0b61d3b5a 579
Michael J. Spencer 2:1df0b61d3b5a 580 /**
Michael J. Spencer 2:1df0b61d3b5a 581 * @}
Michael J. Spencer 2:1df0b61d3b5a 582 */
Michael J. Spencer 2:1df0b61d3b5a 583
Michael J. Spencer 2:1df0b61d3b5a 584 /* --------------------------------- End Of File ------------------------------ */
Michael J. Spencer 2:1df0b61d3b5a 585 #endif /* __LPC17XX__ */