DW1000 UWB driver based on work of Matthias Grob & Manuel Stalder - ETH Zürich - 2015

Dependencies:   BurstSPI

Committer:
AndyA
Date:
Wed Apr 20 11:03:41 2016 +0000
Revision:
9:326bf149c8bc
Parent:
8:0b408e77b701
Child:
10:f1e3c04080d6
Finished moving configuration information into setup object.; Added documentation.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AndyA 0:bddb8cd5e7df 1 // by Matthias Grob & Manuel Stalder - ETH Zürich - 2015
AndyA 0:bddb8cd5e7df 2
AndyA 0:bddb8cd5e7df 3 #ifndef DW1000_H
AndyA 0:bddb8cd5e7df 4 #define DW1000_H
AndyA 0:bddb8cd5e7df 5
AndyA 0:bddb8cd5e7df 6 #include "mbed.h"
AndyA 7:b13881dbb09d 7 #include "BurstSPI.h"
AndyA 8:0b408e77b701 8 #include "DW1000Registers.h"
AndyA 8:0b408e77b701 9 #include "DW1000Setup.h"
AndyA 3:1459d2aa6b97 10
AndyA 8:0b408e77b701 11 #define TIMEUNITS_TO_US (1/(128*499.2)) // conversion between the decawave timeunits (ca 15.65ps) to microseconds.
AndyA 8:0b408e77b701 12 #define US_TO_TIMEUNITS ((uint32_t)(128*499.2)) // conversion between microseconds to the decawave timeunits (ca 15.65ps).
AndyA 8:0b408e77b701 13 #define c_mPerS 299792458
AndyA 8:0b408e77b701 14 #define c_mmPerTick (c_mPerS * TIMEUNITS_TO_US / 1000)
AndyA 8:0b408e77b701 15 #define c_mPerTick (c_mmPerTick/1000)
AndyA 4:5f1025df5530 16
AndyA 4:5f1025df5530 17
AndyA 0:bddb8cd5e7df 18
AndyA 4:5f1025df5530 19 /** A DW1000 driver
AndyA 9:326bf149c8bc 20 *
AndyA 9:326bf149c8bc 21 * It is expected that the protocol implimentation above this will inherit this object.
AndyA 9:326bf149c8bc 22 * If not using this structure then move the protected functions to being public.
AndyA 9:326bf149c8bc 23 *
AndyA 4:5f1025df5530 24 */
AndyA 0:bddb8cd5e7df 25 class DW1000
AndyA 0:bddb8cd5e7df 26 {
AndyA 0:bddb8cd5e7df 27 public:
AndyA 0:bddb8cd5e7df 28
AndyA 6:2c77afdf7367 29 /** Constructor.
AndyA 6:2c77afdf7367 30 *
AndyA 9:326bf149c8bc 31 * The radio will default to DW1000Setup::tunedDefault until you call applySetup() with a new configuration.
AndyA 6:2c77afdf7367 32 */
AndyA 9:326bf149c8bc 33 DW1000(PinName MOSI, PinName MISO, PinName SCLK, PinName CS, PinName IRQ); // constructor, uses SPI class
AndyA 6:2c77afdf7367 34
AndyA 6:2c77afdf7367 35 /** Read the device ID
AndyA 6:2c77afdf7367 36 * @return the device ID (0xDECA0130)
AndyA 6:2c77afdf7367 37 */
AndyA 0:bddb8cd5e7df 38 uint32_t getDeviceID(); // gets the Device ID which should be 0xDECA0130 (good for testing SPI!)
AndyA 6:2c77afdf7367 39
AndyA 6:2c77afdf7367 40 /** Read the Extended Unique ID
AndyA 6:2c77afdf7367 41 * @return The device EUI as stored in the system registers
AndyA 6:2c77afdf7367 42 */
AndyA 6:2c77afdf7367 43 uint64_t getEUI();
AndyA 6:2c77afdf7367 44
AndyA 6:2c77afdf7367 45 /** Set the Extended Unique ID
AndyA 6:2c77afdf7367 46 * @param EUI The EUID to use
AndyA 6:2c77afdf7367 47 *
AndyA 6:2c77afdf7367 48 * Note - ID is only valid until the next power cycle and overrides the value in the OTP memory.
AndyA 6:2c77afdf7367 49 * To set a value that is automatically loaded on startup set OTP memory addresses 0 and 1.
AndyA 6:2c77afdf7367 50 */
AndyA 0:bddb8cd5e7df 51 void setEUI(uint64_t EUI); // sets 64 bit Extended Unique Identifier according to IEEE standard
AndyA 6:2c77afdf7367 52
AndyA 6:2c77afdf7367 53 /** Read voltage input
AndyA 6:2c77afdf7367 54
AndyA 6:2c77afdf7367 55 @return the current device voltage
AndyA 6:2c77afdf7367 56
AndyA 6:2c77afdf7367 57 For accurate ranging the voltage of the device should be taken into account.
AndyA 6:2c77afdf7367 58 User manual give variation as ~5.35cm / V
AndyA 6:2c77afdf7367 59 */
AndyA 0:bddb8cd5e7df 60 float getVoltage(); // gets the current chip voltage measurement form the A/D converter
AndyA 6:2c77afdf7367 61
AndyA 6:2c77afdf7367 62 /** Read on board temperature sensor
AndyA 6:2c77afdf7367 63 @return The temperature in C
AndyA 6:2c77afdf7367 64
AndyA 6:2c77afdf7367 65 For accurate ranging the temperature of the device should be taken into account.
AndyA 6:2c77afdf7367 66 User manual give variation as ~2.15mm / C
AndyA 6:2c77afdf7367 67 */
AndyA 0:bddb8cd5e7df 68 float getTemperature(); // gets the current chip temperature measurement form the A/D converter
AndyA 6:2c77afdf7367 69
AndyA 6:2c77afdf7367 70 /** Get the status register
AndyA 6:2c77afdf7367 71 * @return The system status register
AndyA 6:2c77afdf7367 72 *
AndyA 6:2c77afdf7367 73 * See user manual section 7.2.17 for details
AndyA 6:2c77afdf7367 74 */
AndyA 0:bddb8cd5e7df 75 uint64_t getStatus(); // get the 40 bit device status
AndyA 6:2c77afdf7367 76
AndyA 9:326bf149c8bc 77
AndyA 9:326bf149c8bc 78 /** Set receive antenna delay
AndyA 9:326bf149c8bc 79 * @param ticks Delay in system clock cycles
AndyA 9:326bf149c8bc 80 */
AndyA 9:326bf149c8bc 81 void setRxDelay(uint16_t ticks);
AndyA 9:326bf149c8bc 82 /** Set transmit antenna delay
AndyA 9:326bf149c8bc 83 * @param ticks Delay in system clock cycles
AndyA 9:326bf149c8bc 84 */
AndyA 9:326bf149c8bc 85 void setTxDelay(uint16_t ticks);
AndyA 9:326bf149c8bc 86
AndyA 9:326bf149c8bc 87 /** Set receive antenna delay in meters
AndyA 9:326bf149c8bc 88 * @param errorDistance Delay in meters at speed of light
AndyA 9:326bf149c8bc 89 */
AndyA 9:326bf149c8bc 90 void setRxDelayDistance(double errorDistance) {
AndyA 9:326bf149c8bc 91 setRxDelay(errorDistance/c_mPerTick);
AndyA 9:326bf149c8bc 92 };
AndyA 9:326bf149c8bc 93
AndyA 9:326bf149c8bc 94 /** Set transmit antenna delay in meters
AndyA 9:326bf149c8bc 95 * @param errorDistance Delay in meters at speed of light
AndyA 9:326bf149c8bc 96 */
AndyA 9:326bf149c8bc 97 void setTxDelayDistance(double errorDistance) {
AndyA 9:326bf149c8bc 98 setTxDelay(errorDistance/c_mPerTick);
AndyA 9:326bf149c8bc 99 };
AndyA 9:326bf149c8bc 100
AndyA 9:326bf149c8bc 101 /** Read a value from the OTP memory
AndyA 9:326bf149c8bc 102 * @param word_address The OTP memory address to read.
AndyA 9:326bf149c8bc 103 * @return The 32 bit value at that address.
AndyA 9:326bf149c8bc 104 *
AndyA 9:326bf149c8bc 105 * See Section 6.3.1 of the user manual for the memory map.
AndyA 9:326bf149c8bc 106 */
AndyA 9:326bf149c8bc 107 uint32_t readOTP (uint16_t word_address);
AndyA 9:326bf149c8bc 108
AndyA 9:326bf149c8bc 109 /** Write a value to the OTP memory
AndyA 9:326bf149c8bc 110 * @param word_address The OTP memory address to read.
AndyA 9:326bf149c8bc 111 * @param data The value to write
AndyA 9:326bf149c8bc 112 * @return True if the write was sucessful.
AndyA 9:326bf149c8bc 113 *
AndyA 9:326bf149c8bc 114 * Writes the supplied data to the OTP memory and then reads it back to verify it was sucessfully programmed.
AndyA 9:326bf149c8bc 115 * WARNING - this is a one time operation for each memory address.
AndyA 9:326bf149c8bc 116 * See Section 6.3.1 of the user manual for the memory map.
AndyA 9:326bf149c8bc 117 * It is recommened that the device is reset or power cycled after programing.
AndyA 9:326bf149c8bc 118 */
AndyA 9:326bf149c8bc 119 bool writeOTP(uint16_t word_address,uint32_t data); // program a value in the OTP. It is recommended to reset afterwards.
AndyA 9:326bf149c8bc 120
AndyA 9:326bf149c8bc 121 /** get the current radio configuration
AndyA 9:326bf149c8bc 122 * @return A pointer to a DW1000Setup object of the current setup.
AndyA 9:326bf149c8bc 123 *
AndyA 9:326bf149c8bc 124 * Note to change the setup you must make a copy of the current setup and then pass that to applySetup().
AndyA 9:326bf149c8bc 125 */
AndyA 9:326bf149c8bc 126 DW1000Setup *getSetup();
AndyA 9:326bf149c8bc 127
AndyA 9:326bf149c8bc 128 /** Get the current Transmit gain settings.
AndyA 9:326bf149c8bc 129 *
AndyA 9:326bf149c8bc 130 * @param power Optional, is set to the first power in dBm
AndyA 9:326bf149c8bc 131 * @param boost500 Optional, is set to the second power in dBm
AndyA 9:326bf149c8bc 132 * @param boost250 Optional, is set to the third power in dBm
AndyA 9:326bf149c8bc 133 * @param boost125 Optional, is set to the forth power in dBm
AndyA 9:326bf149c8bc 134 * @return The raw transmit gain register value
AndyA 9:326bf149c8bc 135 *
AndyA 9:326bf149c8bc 136 * If smart power is on then power represents the normal transmit power,
AndyA 9:326bf149c8bc 137 * boost500-boost125 indicates the power used for packets of that number of us or less.
AndyA 9:326bf149c8bc 138 *
AndyA 9:326bf149c8bc 139 * If smart power is off then boost500 represents the gain for the PHY header, boost250 the gain for the main message.
AndyA 9:326bf149c8bc 140 * power and boost125 are not used.
AndyA 9:326bf149c8bc 141 */
AndyA 9:326bf149c8bc 142 uint32_t getTxPower(float *power = NULL, float *boost500 = NULL, float *boost250 = NULL, float *boost125 = NULL);
AndyA 9:326bf149c8bc 143
AndyA 9:326bf149c8bc 144 /** Set Transmit gain
AndyA 9:326bf149c8bc 145 *
AndyA 9:326bf149c8bc 146 * @param normalPowercB Normal transmit gain to use.
AndyA 9:326bf149c8bc 147 * @param boost500 Gain to use for 6.8Mb/s packets of under 500ms.
AndyA 9:326bf149c8bc 148 * @param boost250 Gain to use for 6.8Mb/s packets of under 250ms.
AndyA 9:326bf149c8bc 149 * @param boost125 Gain to use for 6.8Mb/s packets of under 125ms.
AndyA 9:326bf149c8bc 150 *
AndyA 9:326bf149c8bc 151 * All gains are in dB. Gains can be between 0 and 33.5dB.
AndyA 9:326bf149c8bc 152 * Boost gains are optional, if not specified boost gains are set to the power for the lower rate (e.g. boost125 is set to the boost250 level).
AndyA 9:326bf149c8bc 153 * If smart power is disabled then the normal gain is used for all settings.
AndyA 9:326bf149c8bc 154 * The values in the internal DW1000Setup are updated to reflect the configured powers.
AndyA 9:326bf149c8bc 155 */
AndyA 9:326bf149c8bc 156 void setTxPower(float normalPowerdB, float boost500 = 0, float boost250 = 0, float boost125 = 0);
AndyA 9:326bf149c8bc 157
AndyA 9:326bf149c8bc 158 /** Get the rx signal power for the last packet
AndyA 9:326bf149c8bc 159 *
AndyA 9:326bf149c8bc 160 * @param direct Is set to the direct path Rx power in dBm
AndyA 9:326bf149c8bc 161 * @param total Is set to the total Rx power in dBm
AndyA 9:326bf149c8bc 162 *
AndyA 9:326bf149c8bc 163 * According to the DW1000 manual if the direct path power is within 6dB of the total then it was probably a LoS measurment.
AndyA 9:326bf149c8bc 164 * If there is more than 10dB difference then it's probably an indirect path.
AndyA 9:326bf149c8bc 165 */
AndyA 9:326bf149c8bc 166 void getRxSignalPower(float *direct, float *total);
AndyA 9:326bf149c8bc 167
AndyA 9:326bf149c8bc 168 /** Get a metric of timestamp accuracy
AndyA 9:326bf149c8bc 169 *
AndyA 9:326bf149c8bc 170 * @param sigAmp Optional location to return the raw signal amplitude
AndyA 9:326bf149c8bc 171 * @param noiseAmp Optional location to return the raw channel noise level
AndyA 9:326bf149c8bc 172 * @return Timestamp quality metric
AndyA 9:326bf149c8bc 173 *
AndyA 9:326bf149c8bc 174 * The quality metric is a somewhat arbitary number based on channel noise and direct path strength
AndyA 9:326bf149c8bc 175 */
AndyA 9:326bf149c8bc 176 float getRxQuality(uint16_t *sigAmp = NULL, uint16_t *noiseAmp = NULL);
AndyA 9:326bf149c8bc 177
AndyA 9:326bf149c8bc 178 protected:
AndyA 9:326bf149c8bc 179
AndyA 9:326bf149c8bc 180 /**
AndyA 9:326bf149c8bc 181 * Sets the callbacks on packet Rx and Tx
AndyA 9:326bf149c8bc 182 * @param callbackRX The function to call on packet Rx complete
AndyA 9:326bf149c8bc 183 * @param callbackTX The function to call on packet Tx complete
AndyA 9:326bf149c8bc 184 *
AndyA 9:326bf149c8bc 185 * set either or both to null to disable the appropriate interupt
AndyA 9:326bf149c8bc 186 */
AndyA 9:326bf149c8bc 187 void setCallbacks(void (*callbackRX)(void), void (*callbackTX)(void)); // setter for callback functions, automatically enables interrupt, if NULL is passed the coresponding interrupt gets disabled
AndyA 9:326bf149c8bc 188
AndyA 9:326bf149c8bc 189 /**
AndyA 9:326bf149c8bc 190 * c++ version of setCallbacks()
AndyA 9:326bf149c8bc 191 * @param tptr object for callbacks
AndyA 9:326bf149c8bc 192 * @param mptrRX method to call on packet Rx complete
AndyA 9:326bf149c8bc 193 * @param mptrTX method to call on packet Tx complete
AndyA 9:326bf149c8bc 194 *
AndyA 9:326bf149c8bc 195 */
AndyA 9:326bf149c8bc 196 template<typename T>
AndyA 9:326bf149c8bc 197 void setCallbacks(T* tptr, void (T::*mptrRX)(void), void (T::*mptrTX)(void)) { // overloaded setter to treat member function pointers of objects
AndyA 9:326bf149c8bc 198 callbackRX.attach(tptr, mptrRX); // possible client code: dw.setCallbacks(this, &A::callbackRX, &A::callbackTX);
AndyA 9:326bf149c8bc 199 callbackTX.attach(tptr, mptrTX); // concept seen in line 100 of http://developer.mbed.org/users/mbed_official/code/mbed/docs/4fc01daae5a5/InterruptIn_8h_source.html
AndyA 9:326bf149c8bc 200 setInterrupt(true,true);
AndyA 9:326bf149c8bc 201 }
AndyA 9:326bf149c8bc 202
AndyA 6:2c77afdf7367 203 /** Get the last packet recieve time
AndyA 6:2c77afdf7367 204 * @return the internal time stamp for the last packet Rx
AndyA 6:2c77afdf7367 205 *
AndyA 6:2c77afdf7367 206 * Time is counted on a clock running at 499.2MHz * 128 (~15.65ps)
AndyA 6:2c77afdf7367 207 * This value is raw time minus user set Rx antenna delay.
AndyA 6:2c77afdf7367 208 */
AndyA 0:bddb8cd5e7df 209 uint64_t getRXTimestamp();
AndyA 6:2c77afdf7367 210
AndyA 6:2c77afdf7367 211 /** Get the last packet transmit time
AndyA 6:2c77afdf7367 212 * @return the internal time stamp for the last packet Tx
AndyA 6:2c77afdf7367 213 *
AndyA 6:2c77afdf7367 214 * Time is counted on a clock running at 499.2MHz * 128 (~15.65ps)
AndyA 6:2c77afdf7367 215 * This value is raw time plus user set Tx antenna delay to give time at the antenna.
AndyA 6:2c77afdf7367 216 */
AndyA 0:bddb8cd5e7df 217 uint64_t getTXTimestamp();
AndyA 0:bddb8cd5e7df 218
AndyA 6:2c77afdf7367 219 /** Send a packet
AndyA 6:2c77afdf7367 220 * @param message A buffer containing the data to send
AndyA 6:2c77afdf7367 221 * @param length The length of the data in bytes.
AndyA 6:2c77afdf7367 222 *
AndyA 6:2c77afdf7367 223 * The supplied packet is transmitted as soon as possible and the reciever re-enabled once transmission is complete.
AndyA 6:2c77afdf7367 224 * Maximum packet size is 125 bytes.
AndyA 9:326bf149c8bc 225 *
AndyA 9:326bf149c8bc 226 * The receiver is re-activated as soon as packet transmission is complete.
AndyA 6:2c77afdf7367 227 */
AndyA 0:bddb8cd5e7df 228 void sendFrame(uint8_t* message, uint16_t length); // send a raw frame (length in bytes)
AndyA 6:2c77afdf7367 229
AndyA 6:2c77afdf7367 230 /** Send a packet at a certain time
AndyA 6:2c77afdf7367 231 * @param message A buffer containing the data to send
AndyA 6:2c77afdf7367 232 * @param length The length of the data in bytes.
AndyA 6:2c77afdf7367 233 * @param TxTimestamp The timestamp to send the packet.
AndyA 6:2c77afdf7367 234 *
AndyA 6:2c77afdf7367 235 * The supplied packet is transmitted once the internal clock reaches the specified timestamp.
AndyA 6:2c77afdf7367 236 * Maximum packet size is 125 bytes.
AndyA 6:2c77afdf7367 237 * Rx is disabled as soon as this command is issued and re-enabled once transmission is complete.
AndyA 6:2c77afdf7367 238 * Note - 9 LSBs are ignored so timings are only accurate to ~8ns. For more accurate timing check the
AndyA 6:2c77afdf7367 239 * tx timestamp after transmission is complete.
AndyA 9:326bf149c8bc 240 *
AndyA 9:326bf149c8bc 241 * The receiver is re-activated as soon as packet transmission is complete.
AndyA 9:326bf149c8bc 242 *
AndyA 6:2c77afdf7367 243 */
AndyA 0:bddb8cd5e7df 244 void sendDelayedFrame(uint8_t* message, uint16_t length, uint64_t TxTimestamp);
AndyA 0:bddb8cd5e7df 245
AndyA 6:2c77afdf7367 246 /** Set up data for a transmit on sync
AndyA 6:2c77afdf7367 247 * @param message A buffer containing the data to send
AndyA 6:2c77afdf7367 248 * @param length The length of the data in bytes.
AndyA 6:2c77afdf7367 249 *
AndyA 6:2c77afdf7367 250 * Data is loaded into the transmit buffer but the transmission is not started.
AndyA 6:2c77afdf7367 251 * Maximum packet size is 125 bytes.
AndyA 6:2c77afdf7367 252 */
AndyA 0:bddb8cd5e7df 253 void setupSyncedFrame(uint8_t* message, uint16_t length);
AndyA 6:2c77afdf7367 254
AndyA 6:2c77afdf7367 255 /** Transmit on the next sync pulse
AndyA 6:2c77afdf7367 256 *
AndyA 6:2c77afdf7367 257 * On the next rising edge of the sync line the transmitter will be activated.
AndyA 6:2c77afdf7367 258 * The packet must have previously been set up using setupSyncedFrame()
AndyA 6:2c77afdf7367 259 *
AndyA 9:326bf149c8bc 260 * Rx is disabled until transmission is complete and then re-enabled.
AndyA 6:2c77afdf7367 261 */
AndyA 0:bddb8cd5e7df 262 void armSyncedFrame();
AndyA 0:bddb8cd5e7df 263
AndyA 9:326bf149c8bc 264 /** Get last packet size
AndyA 9:326bf149c8bc 265 * @return The length in bytes of the last packet received
AndyA 9:326bf149c8bc 266 */
AndyA 9:326bf149c8bc 267 uint16_t getFramelength(); // to get the framelength of the received frame from the PHY header
AndyA 9:326bf149c8bc 268
AndyA 9:326bf149c8bc 269 /** Get last recieved packet
AndyA 9:326bf149c8bc 270 * @param buffer The location to put the received data
AndyA 9:326bf149c8bc 271 * @param length The number of bytes to read
AndyA 9:326bf149c8bc 272 */
AndyA 9:326bf149c8bc 273 void readRxBuffer( uint8_t *buffer, int length ) {
AndyA 9:326bf149c8bc 274 readRegister(DW1000_RX_BUFFER, 0, buffer, length);
AndyA 9:326bf149c8bc 275 }
AndyA 9:326bf149c8bc 276
AndyA 6:2c77afdf7367 277 /** Enable reciever
AndyA 6:2c77afdf7367 278 *
AndyA 6:2c77afdf7367 279 * This is automatically done after each Tx completes but can also be forced manually
AndyA 6:2c77afdf7367 280 */
AndyA 0:bddb8cd5e7df 281 void startRX(); // start listening for frames
AndyA 6:2c77afdf7367 282
AndyA 6:2c77afdf7367 283 /** Disable radio link
AndyA 6:2c77afdf7367 284 *
AndyA 6:2c77afdf7367 285 * Disables both the recieve and transmit systems.
AndyA 6:2c77afdf7367 286 * Any transmissions waiting for a delayed time or sync pulse will be canceled.
AndyA 6:2c77afdf7367 287 */
AndyA 0:bddb8cd5e7df 288 void stopTRX(); // disable tranceiver go back to idle mode
AndyA 0:bddb8cd5e7df 289
AndyA 6:2c77afdf7367 290 /** Reset the reciever logic
AndyA 6:2c77afdf7367 291 *
AndyA 6:2c77afdf7367 292 * This should be done after any receive errors
AndyA 6:2c77afdf7367 293 */
AndyA 0:bddb8cd5e7df 294 void resetRX(); // soft reset only the tranciever part of DW1000
AndyA 6:2c77afdf7367 295
AndyA 6:2c77afdf7367 296 /** Enable/Disable interrupts
AndyA 6:2c77afdf7367 297 * @param RX true to enable recieve interrupts
AndyA 6:2c77afdf7367 298 * @param TX true to enable transmit interrupts
AndyA 6:2c77afdf7367 299 *
AndyA 6:2c77afdf7367 300 * For c style callbacks simply set the callback to null to disable it.
AndyA 6:2c77afdf7367 301 * When using c++ style callbacks both are enabled as default, this allows a method to disabled one or both.
AndyA 6:2c77afdf7367 302 */
AndyA 0:bddb8cd5e7df 303 void setInterrupt(bool RX, bool TX); // set Interrupt for received a good frame (CRC ok) or transmission done
AndyA 0:bddb8cd5e7df 304
AndyA 9:326bf149c8bc 305
AndyA 9:326bf149c8bc 306 /** apply a new radio setup to the UWB system
AndyA 9:326bf149c8bc 307 * @param setup The new settings to use
AndyA 9:326bf149c8bc 308 * @return true if the setup was applied.
AndyA 3:1459d2aa6b97 309 *
AndyA 9:326bf149c8bc 310 * The setup object supplied is copied and can be disposed of after the call.
AndyA 9:326bf149c8bc 311 * If the supplied setup fails DW1000Setup::check() then it is ignored and the function returns false.
AndyA 9:326bf149c8bc 312 * Note - this will reset the radio. You must re-enable interupts, receiver etc. after calling it.
AndyA 3:1459d2aa6b97 313 */
AndyA 9:326bf149c8bc 314 bool applySetup(DW1000Setup *setup);
AndyA 0:bddb8cd5e7df 315
AndyA 0:bddb8cd5e7df 316 private:
AndyA 0:bddb8cd5e7df 317 void resetAll(); // soft reset the entire DW1000 (some registers stay as they were see User Manual)
AndyA 3:1459d2aa6b97 318
AndyA 3:1459d2aa6b97 319 void setupRadio();
AndyA 3:1459d2aa6b97 320
AndyA 4:5f1025df5530 321 // system register setup functions
AndyA 9:326bf149c8bc 322 void setupGPIO();
AndyA 3:1459d2aa6b97 323 void setupAGC();
AndyA 3:1459d2aa6b97 324 void setupRxConfig();
AndyA 3:1459d2aa6b97 325 void setupLDE();
AndyA 3:1459d2aa6b97 326 void setupChannel();
AndyA 3:1459d2aa6b97 327 void setupTxFrameCtrl();
AndyA 3:1459d2aa6b97 328 void setupAnalogRF();
AndyA 3:1459d2aa6b97 329 void setupFreqSynth();
AndyA 3:1459d2aa6b97 330 void setupTxCalibration();
AndyA 3:1459d2aa6b97 331 void setupSystemConfig();
AndyA 9:326bf149c8bc 332 void setupPower();
AndyA 9:326bf149c8bc 333
AndyA 0:bddb8cd5e7df 334 void loadLDE(); // load the leading edge detection algorithm to RAM, [IMPORTANT because receiving malfunction may occur] see User Manual LDELOAD on p22 & p158
AndyA 0:bddb8cd5e7df 335 void loadLDOTUNE(); // load the LDO tuning as set in the factory
AndyA 0:bddb8cd5e7df 336
AndyA 9:326bf149c8bc 337 uint8_t powerToRegValue(float powerdB);
AndyA 9:326bf149c8bc 338 float regToPowerValue(uint8_t powerVal);
AndyA 3:1459d2aa6b97 339
AndyA 4:5f1025df5530 340 DW1000Setup systemConfig;
AndyA 3:1459d2aa6b97 341
AndyA 0:bddb8cd5e7df 342 // Interrupt
AndyA 0:bddb8cd5e7df 343 InterruptIn irq; // Pin used to handle Events from DW1000 by an Interrupthandler
AndyA 0:bddb8cd5e7df 344 FunctionPointer callbackRX; // function pointer to callback which is called when successfull RX took place
AndyA 0:bddb8cd5e7df 345 FunctionPointer callbackTX; // function pointer to callback which is called when successfull TX took place
AndyA 0:bddb8cd5e7df 346 void ISR(); // interrupt handling method (also calls according callback methods)
AndyA 0:bddb8cd5e7df 347
AndyA 0:bddb8cd5e7df 348 // SPI Inteface
AndyA 7:b13881dbb09d 349 BurstSPI spi; // SPI Bus
AndyA 0:bddb8cd5e7df 350 DigitalOut cs; // Slave selector for SPI-Bus (here explicitly needed to start and end SPI transactions also usable to wake up DW1000)
AndyA 0:bddb8cd5e7df 351
AndyA 0:bddb8cd5e7df 352 uint8_t readRegister8(uint8_t reg, uint16_t subaddress); // expressive methods to read or write the number of bits written in the name
AndyA 0:bddb8cd5e7df 353 uint16_t readRegister16(uint8_t reg, uint16_t subaddress);
AndyA 9:326bf149c8bc 354 uint32_t readRegister32(uint8_t reg, uint16_t subaddress);
AndyA 0:bddb8cd5e7df 355 uint64_t readRegister40(uint8_t reg, uint16_t subaddress);
AndyA 0:bddb8cd5e7df 356 uint64_t readRegister64(uint8_t reg, uint16_t subaddress);
AndyA 0:bddb8cd5e7df 357 void writeRegister8(uint8_t reg, uint16_t subaddress, uint8_t buffer);
AndyA 0:bddb8cd5e7df 358 void writeRegister16(uint8_t reg, uint16_t subaddress, uint16_t buffer);
AndyA 0:bddb8cd5e7df 359 void writeRegister32(uint8_t reg, uint16_t subaddress, uint32_t buffer);
AndyA 0:bddb8cd5e7df 360 void writeRegister40(uint8_t reg, uint16_t subaddress, uint64_t buffer);
AndyA 0:bddb8cd5e7df 361
AndyA 0:bddb8cd5e7df 362 void readRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // reads the selected part of a slave register into the buffer memory
AndyA 0:bddb8cd5e7df 363 void writeRegister(uint8_t reg, uint16_t subaddress, uint8_t *buffer, int length); // writes the buffer memory to the selected slave register
AndyA 0:bddb8cd5e7df 364 void setupTransaction(uint8_t reg, uint16_t subaddress, bool write); // sets up an SPI read or write transaction with correct register address and offset
AndyA 0:bddb8cd5e7df 365 void select(); // selects the only slave for a transaction
AndyA 0:bddb8cd5e7df 366 void deselect(); // deselects the only slave after transaction
AndyA 0:bddb8cd5e7df 367 };
AndyA 0:bddb8cd5e7df 368
AndyA 0:bddb8cd5e7df 369 #endif