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_hw_spi_ctarn Union Reference
HW_SPI_CTARn - Clock and Transfer Attributes Register (In Master Mode) (RW) More...
#include <MK64F12_spi.h>
Detailed Description
HW_SPI_CTARn - Clock and Transfer Attributes Register (In Master Mode) (RW)
Reset value: 0x78000000U
CTAR registers are used to define different transfer attributes. Do not write to the CTAR registers while the module is in the Running state. In Master mode, the CTAR registers define combinations of transfer attributes such as frame size, clock phase and polarity, data bit ordering, baud rate, and various delays. In slave mode, a subset of the bitfields in CTAR0 are used to set the slave transfer attributes. When the module is configured as an SPI master, the CTAS field in the command portion of the TX FIFO entry selects which of the CTAR registers is used. When the module is configured as an SPI bus slave, it uses the CTAR0 register.
Definition at line 657 of file MK64F12_spi.h.
Generated on Sat Aug 27 2022 17:09:03 by
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