_hw_pmc_lvdsc1 Union Reference

HW_PMC_LVDSC1 - Low Voltage Detect Status And Control 1 register (RW) More...

#include <MK64F12_pmc.h>

Detailed Description

HW_PMC_LVDSC1 - Low Voltage Detect Status And Control 1 register (RW)

Reset value: 0x10U

This register contains status and control bits to support the low voltage detect function. This register should be written during the reset initialization program to set the desired controls even if the desired settings are the same as the reset settings. While the device is in the very low power or low leakage modes, the LVD system is disabled regardless of LVDSC1 settings. To protect systems that must have LVD always on, configure the Power Mode Protection (PMPROT) register of the SMC module (SMC_PMPROT) to disallow any very low power or low leakage modes from being enabled. See the device's data sheet for the exact LVD trip voltages. The LVDV bits are reset solely on a POR Only event. The register's other bits are reset on Chip Reset Not VLLS. For more information about these reset types, refer to the Reset section details.

Definition at line 129 of file MK64F12_pmc.h.