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_hw_fmc_dataw3snu Union Reference
HW_FMC_DATAW3SnU - Cache Data Storage (upper word) (RW) More...
#include <MK64F12_fmc.h>
Detailed Description
HW_FMC_DATAW3SnU - Cache Data Storage (upper word) (RW)
Reset value: 0x00000000U
The cache of 64-bit entries is a 4-way, set-associative cache with 4 sets. The ways are numbered 0-3 and the sets are numbered 0-3. In DATAWxSyU and DATAWxSyL, x denotes the way, y denotes the set, and U and L represent upper and lower word, respectively. This section represents data for the upper word (bits [63:32]) of all sets in the indicated way.
Definition at line 1837 of file MK64F12_fmc.h.
Generated on Sat Aug 27 2022 17:09:02 by
1.7.2