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_hw_fb_cscrn Union Reference
HW_FB_CSCRn - Chip Select Control Register (RW) More...
#include <MK64F12_fb.h>
Detailed Description
HW_FB_CSCRn - Chip Select Control Register (RW)
Reset value: 0x003FFC00U
Controls the auto-acknowledge, address setup and hold times, port size, burst capability, and number of wait states for the associated chip select. To support the global chip-select (FB_CS0), the CSCR0 reset values differ from the other CSCRs. The reset value of CSCR0 is as follows: Bits 31-24 are 0b Bit 23-3 are chip-dependent Bits 3-0 are 0b See the chip configuration details for your particular chip for information on the exact CSCR0 reset value.
Definition at line 315 of file MK64F12_fb.h.
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