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Morpheus
_hw_enet_eimr Union Reference
HW_ENET_EIMR - Interrupt Mask Register (RW) More...
#include <MK64F12_enet.h>
Detailed Description
HW_ENET_EIMR - Interrupt Mask Register (RW)
Reset value: 0x00000000U
EIMR controls which interrupt events are allowed to generate actual interrupts. A hardware reset clears this register. If the corresponding bits in the EIR and EIMR registers are set, an interrupt is generated. The interrupt signal remains asserted until a 1 is written to the EIR field (write 1 to clear) or a 0 is written to the EIMR field.
Definition at line 616 of file MK64F12_enet.h.
Generated on Sat Aug 27 2022 17:09:02 by
1.7.2