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_hw_can_timer Union Reference
HW_CAN_TIMER - Free Running Timer (RW) More...
#include <MK64F12_can.h>
Detailed Description
HW_CAN_TIMER - Free Running Timer (RW)
Reset value: 0x00000000U
This register represents a 16-bit free running counter that can be read and written by the CPU. The timer starts from 0x0 after Reset, counts linearly to 0xFFFF, and wraps around. The timer is clocked by the FlexCAN bit-clock, which defines the baud rate on the CAN bus. During a message transmission/reception, it increments by one for each bit that is received or transmitted. When there is no message on the bus, it counts using the previously programmed baud rate. The timer is not incremented during Disable , Stop, and Freeze modes. The timer value is captured when the second bit of the identifier field of any frame is on the CAN bus. This captured value is written into the Time Stamp entry in a message buffer after a successful reception or transmission of a message. If bit CTRL1[TSYN] is asserted, the Timer is reset whenever a message is received in the first available Mailbox, according to CTRL2[RFFN] setting. The CPU can write to this register anytime. However, if the write occurs at the same time that the Timer is being reset by a reception in the first Mailbox, then the write value is discarded. Reading this register affects the Mailbox Unlocking procedure; see Section "Mailbox Lock Mechanism".
Definition at line 1261 of file MK64F12_can.h.
Generated on Sat Aug 27 2022 17:09:01 by
