_hw_can_rximrn Union Reference

HW_CAN_RXIMRn - Rx Individual Mask Registers (RW) More...

#include <MK64F12_can.h>

Detailed Description

HW_CAN_RXIMRn - Rx Individual Mask Registers (RW)

Reset value: 0x00000000U

These registers are located in RAM. RXIMR are used as acceptance masks for ID filtering in Rx MBs and the Rx FIFO. If the Rx FIFO is not enabled, one mask register is provided for each available Mailbox, providing ID masking capability on a per Mailbox basis. When the Rx FIFO is enabled (MCR[RFEN] bit is asserted), up to 32 Rx Individual Mask Registers can apply to the Rx FIFO ID Filter Table elements on a one-to-one correspondence depending on the setting of CTRL2[RFFN]. RXIMR can only be written by the CPU while the module is in Freeze mode; otherwise, they are blocked by hardware. The Individual Rx Mask Registers are not affected by reset and must be explicitly initialized prior to any reception.

Definition at line 3483 of file MK64F12_can.h.