_hw_axbs_prsn Union Reference

HW_AXBS_PRSn - Priority Registers Slave (RW) More...

#include <MK64F12_axbs.h>

Detailed Description

HW_AXBS_PRSn - Priority Registers Slave (RW)

Reset value: 0x00543210U

The priority registers (PRSn) set the priority of each master port on a per slave port basis and reside in each slave port. The priority register can be accessed only with 32-bit accesses. After the CRSn[RO] bit is set, the PRSn register can only be read; attempts to write to it have no effect on PRSn and result in a bus-error response to the master initiating the write. Two available masters must not be programmed with the same priority level. Attempts to program two or more masters with the same priority level result in a bus-error response and the PRSn is not updated. Valid values for the Mn priority fields depend on which masters are available on the chip. This information can be found in the chip-specific information for the crossbar. If the chip contains less than five masters, values 0 to 3 are valid. Writing other values will result in an error. If the chip contains five or more masters, valid values are 0 to n-1, where n is the number of masters attached to the AXBS module. Other values will result in an error.

Definition at line 137 of file MK64F12_axbs.h.