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_hw_adc_sc1n Union Reference
HW_ADC_SC1n - ADC Status and Control Registers 1 (RW) More...
#include <MK64F12_adc.h>
Detailed Description
HW_ADC_SC1n - ADC Status and Control Registers 1 (RW)
Reset value: 0x0000001FU
SC1A is used for both software and hardware trigger modes of operation. To allow sequential conversions of the ADC to be triggered by internal peripherals, the ADC can have more than one status and control register: one for each conversion. The SC1B-SC1n registers indicate potentially multiple SC1 registers for use only in hardware trigger mode. See the chip configuration information about the number of SC1n registers specific to this device. The SC1n registers have identical fields, and are used in a "ping-pong" approach to control ADC operation. At any one point in time, only one of the SC1n registers is actively controlling ADC conversions. Updating SC1A while SC1n is actively controlling a conversion is allowed, and vice-versa for any of the SC1n registers specific to this MCU. Writing SC1A while SC1A is actively controlling a conversion aborts the current conversion. In Software Trigger mode, when SC2[ADTRG]=0, writes to SC1A subsequently initiate a new conversion, if SC1[ADCH] contains a value other than all 1s. Writing any of the SC1n registers while that specific SC1n register is actively controlling a conversion aborts the current conversion. None of the SC1B-SC1n registers are used for software trigger operation and therefore writes to the SC1B-SC1n registers do not initiate a new conversion.
Definition at line 159 of file MK64F12_adc.h.
Generated on Sat Aug 27 2022 17:09:01 by
