_hw_adc_rn Union Reference

HW_ADC_Rn - ADC Data Result Register (RO) More...

#include <MK64F12_adc.h>

Detailed Description

HW_ADC_Rn - ADC Data Result Register (RO)

Reset value: 0x00000000U

The data result registers (Rn) contain the result of an ADC conversion of the channel selected by the corresponding status and channel control register (SC1A:SC1n). For every status and channel control register, there is a corresponding data result register. Unused bits in R n are cleared in unsigned right-aligned modes and carry the sign bit (MSB) in sign-extended 2's complement modes. For example, when configured for 10-bit single-ended mode, D[15:10] are cleared. When configured for 11-bit differential mode, D[15:10] carry the sign bit, that is, bit 10 extended through bit 15. The following table describes the behavior of the data result registers in the different modes of operation. Data result register description Conversion mode D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Format 16-bit differential S D D D D D D D D D D D D D D D Signed 2's complement 16-bit single-ended D D D D D D D D D D D D D D D D Unsigned right justified 13-bit differential S S S S D D D D D D D D D D D D Sign-extended 2's complement 12-bit single-ended 0 0 0 0 D D D D D D D D D D D D Unsigned right-justified 11-bit differential S S S S S S D D D D D D D D D D Sign-extended 2's complement 10-bit single-ended 0 0 0 0 0 0 D D D D D D D D D D Unsigned right-justified 9-bit differential S S S S S S S S D D D D D D D D Sign-extended 2's complement 8-bit single-ended 0 0 0 0 0 0 0 0 D D D D D D D D Unsigned right-justified S: Sign bit or sign bit extension; D: Data, which is 2's complement data if indicated

Definition at line 719 of file MK64F12_adc.h.