Alessandro Angelino / target-mcu-k64f

Fork of target-mcu-k64f by Morpheus

Embed: (wiki syntax)

« Back to documentation index

_hw_adc_clpd Union Reference

_hw_adc_clpd Union Reference

HW_ADC_CLPD - ADC Plus-Side General Calibration Value Register (RW) More...

#include <MK64F12_adc.h>


Detailed Description

HW_ADC_CLPD - ADC Plus-Side General Calibration Value Register (RW)

Reset value: 0x0000000AU

The Plus-Side General Calibration Value Registers (CLPx) contain calibration information that is generated by the calibration function. These registers contain seven calibration values of varying widths: CLP0[5:0], CLP1[6:0], CLP2[7:0], CLP3[8:0], CLP4[9:0], CLPS[5:0], and CLPD[5:0]. CLPx are automatically set when the self-calibration sequence is done, that is, CAL is cleared. If these registers are written by the user after calibration, the linearity error specifications may not be met.

Definition at line 1483 of file MK64F12_adc.h.