Important changes to repositories hosted on mbed.com
Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.
To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.
It is also possible to export all your personal repositories from the account settings page.
Fork of
target-mcu-k64f
by 
Morpheus
SIM_Type Struct Reference
[SIM Peripheral Access Layer]
SIM - Register Layout Typedef. More...
#include <MK64F12.h>
Data Fields | |
| __IO uint32_t | SOPT1 |
| System Options Register 1, offset: 0x0. | |
| __IO uint32_t | SOPT1CFG |
| SOPT1 Configuration Register, offset: 0x4. | |
| __IO uint32_t | SOPT2 |
| System Options Register 2, offset: 0x1004. | |
| __IO uint32_t | SOPT4 |
| System Options Register 4, offset: 0x100C. | |
| __IO uint32_t | SOPT5 |
| System Options Register 5, offset: 0x1010. | |
| __IO uint32_t | SOPT7 |
| System Options Register 7, offset: 0x1018. | |
| __I uint32_t | SDID |
| System Device Identification Register, offset: 0x1024. | |
| __IO uint32_t | SCGC1 |
| System Clock Gating Control Register 1, offset: 0x1028. | |
| __IO uint32_t | SCGC2 |
| System Clock Gating Control Register 2, offset: 0x102C. | |
| __IO uint32_t | SCGC3 |
| System Clock Gating Control Register 3, offset: 0x1030. | |
| __IO uint32_t | SCGC4 |
| System Clock Gating Control Register 4, offset: 0x1034. | |
| __IO uint32_t | SCGC5 |
| System Clock Gating Control Register 5, offset: 0x1038. | |
| __IO uint32_t | SCGC6 |
| System Clock Gating Control Register 6, offset: 0x103C. | |
| __IO uint32_t | SCGC7 |
| System Clock Gating Control Register 7, offset: 0x1040. | |
| __IO uint32_t | CLKDIV1 |
| System Clock Divider Register 1, offset: 0x1044. | |
| __IO uint32_t | CLKDIV2 |
| System Clock Divider Register 2, offset: 0x1048. | |
| __IO uint32_t | FCFG1 |
| Flash Configuration Register 1, offset: 0x104C. | |
| __I uint32_t | FCFG2 |
| Flash Configuration Register 2, offset: 0x1050. | |
| __I uint32_t | UIDH |
| Unique Identification Register High, offset: 0x1054. | |
| __I uint32_t | UIDMH |
| Unique Identification Register Mid-High, offset: 0x1058. | |
| __I uint32_t | UIDML |
| Unique Identification Register Mid Low, offset: 0x105C. | |
| __I uint32_t | UIDL |
| Unique Identification Register Low, offset: 0x1060. | |
Detailed Description
SIM - Register Layout Typedef.
Definition at line 11630 of file cmsis/MK64F12.h.
Field Documentation
| __IO uint32_t CLKDIV1 |
System Clock Divider Register 1, offset: 0x1044.
Definition at line 11649 of file cmsis/MK64F12.h.
| __IO uint32_t CLKDIV2 |
System Clock Divider Register 2, offset: 0x1048.
Definition at line 11650 of file cmsis/MK64F12.h.
| __IO uint32_t FCFG1 |
Flash Configuration Register 1, offset: 0x104C.
Definition at line 11651 of file cmsis/MK64F12.h.
| __I uint32_t FCFG2 |
Flash Configuration Register 2, offset: 0x1050.
Definition at line 11652 of file cmsis/MK64F12.h.
| __IO uint32_t SCGC1 |
System Clock Gating Control Register 1, offset: 0x1028.
Definition at line 11642 of file cmsis/MK64F12.h.
| __IO uint32_t SCGC2 |
System Clock Gating Control Register 2, offset: 0x102C.
Definition at line 11643 of file cmsis/MK64F12.h.
| __IO uint32_t SCGC3 |
System Clock Gating Control Register 3, offset: 0x1030.
Definition at line 11644 of file cmsis/MK64F12.h.
| __IO uint32_t SCGC4 |
System Clock Gating Control Register 4, offset: 0x1034.
Definition at line 11645 of file cmsis/MK64F12.h.
| __IO uint32_t SCGC5 |
System Clock Gating Control Register 5, offset: 0x1038.
Definition at line 11646 of file cmsis/MK64F12.h.
| __IO uint32_t SCGC6 |
System Clock Gating Control Register 6, offset: 0x103C.
Definition at line 11647 of file cmsis/MK64F12.h.
| __IO uint32_t SCGC7 |
System Clock Gating Control Register 7, offset: 0x1040.
Definition at line 11648 of file cmsis/MK64F12.h.
| __I uint32_t SDID |
System Device Identification Register, offset: 0x1024.
Definition at line 11641 of file cmsis/MK64F12.h.
| __IO uint32_t SOPT1 |
System Options Register 1, offset: 0x0.
Definition at line 11631 of file cmsis/MK64F12.h.
| __IO uint32_t SOPT1CFG |
SOPT1 Configuration Register, offset: 0x4.
Definition at line 11632 of file cmsis/MK64F12.h.
| __IO uint32_t SOPT2 |
System Options Register 2, offset: 0x1004.
Definition at line 11634 of file cmsis/MK64F12.h.
| __IO uint32_t SOPT4 |
System Options Register 4, offset: 0x100C.
Definition at line 11636 of file cmsis/MK64F12.h.
| __IO uint32_t SOPT5 |
System Options Register 5, offset: 0x1010.
Definition at line 11637 of file cmsis/MK64F12.h.
| __IO uint32_t SOPT7 |
System Options Register 7, offset: 0x1018.
Definition at line 11639 of file cmsis/MK64F12.h.
| __I uint32_t UIDH |
Unique Identification Register High, offset: 0x1054.
Definition at line 11653 of file cmsis/MK64F12.h.
| __I uint32_t UIDL |
Unique Identification Register Low, offset: 0x1060.
Definition at line 11656 of file cmsis/MK64F12.h.
| __I uint32_t UIDMH |
Unique Identification Register Mid-High, offset: 0x1058.
Definition at line 11654 of file cmsis/MK64F12.h.
| __I uint32_t UIDML |
Unique Identification Register Mid Low, offset: 0x105C.
Definition at line 11655 of file cmsis/MK64F12.h.
Generated on Sat Aug 27 2022 17:09:03 by
1.7.2