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SDHC_Type Struct Reference
[SDHC Peripheral Access Layer]
SDHC - Register Layout Typedef. More...
#include <MK64F12.h>
Data Fields | |
| __IO uint32_t | DSADDR |
| DMA System Address register, offset: 0x0. | |
| __IO uint32_t | BLKATTR |
| Block Attributes register, offset: 0x4. | |
| __IO uint32_t | CMDARG |
| Command Argument register, offset: 0x8. | |
| __IO uint32_t | XFERTYP |
| Transfer Type register, offset: 0xC. | |
| __I uint32_t | CMDRSP [4] |
| Command Response 0..Command Response 3, array offset: 0x10, array step: 0x4. | |
| __IO uint32_t | DATPORT |
| Buffer Data Port register, offset: 0x20. | |
| __I uint32_t | PRSSTAT |
| Present State register, offset: 0x24. | |
| __IO uint32_t | PROCTL |
| Protocol Control register, offset: 0x28. | |
| __IO uint32_t | SYSCTL |
| System Control register, offset: 0x2C. | |
| __IO uint32_t | IRQSTAT |
| Interrupt Status register, offset: 0x30. | |
| __IO uint32_t | IRQSTATEN |
| Interrupt Status Enable register, offset: 0x34. | |
| __IO uint32_t | IRQSIGEN |
| Interrupt Signal Enable register, offset: 0x38. | |
| __I uint32_t | AC12ERR |
| Auto CMD12 Error Status Register, offset: 0x3C. | |
| __I uint32_t | HTCAPBLT |
| Host Controller Capabilities, offset: 0x40. | |
| __IO uint32_t | WML |
| Watermark Level Register, offset: 0x44. | |
| __O uint32_t | FEVT |
| Force Event register, offset: 0x50. | |
| __I uint32_t | ADMAES |
| ADMA Error Status register, offset: 0x54. | |
| __IO uint32_t | ADSADDR |
| ADMA System Addressregister, offset: 0x58. | |
| __IO uint32_t | VENDOR |
| Vendor Specific register, offset: 0xC0. | |
| __IO uint32_t | MMCBOOT |
| MMC Boot register, offset: 0xC4. | |
| __I uint32_t | HOSTVER |
| Host Controller Version, offset: 0xFC. | |
Detailed Description
SDHC - Register Layout Typedef.
Definition at line 11109 of file cmsis/MK64F12.h.
Field Documentation
| __I uint32_t AC12ERR |
Auto CMD12 Error Status Register, offset: 0x3C.
Definition at line 11122 of file cmsis/MK64F12.h.
| __I uint32_t ADMAES |
ADMA Error Status register, offset: 0x54.
Definition at line 11127 of file cmsis/MK64F12.h.
| __IO uint32_t ADSADDR |
ADMA System Addressregister, offset: 0x58.
Definition at line 11128 of file cmsis/MK64F12.h.
| __IO uint32_t BLKATTR |
Block Attributes register, offset: 0x4.
Definition at line 11111 of file cmsis/MK64F12.h.
| __IO uint32_t CMDARG |
Command Argument register, offset: 0x8.
Definition at line 11112 of file cmsis/MK64F12.h.
| __I uint32_t CMDRSP |
Command Response 0..Command Response 3, array offset: 0x10, array step: 0x4.
Definition at line 11114 of file cmsis/MK64F12.h.
| __IO uint32_t DATPORT |
Buffer Data Port register, offset: 0x20.
Definition at line 11115 of file cmsis/MK64F12.h.
| __IO uint32_t DSADDR |
DMA System Address register, offset: 0x0.
Definition at line 11110 of file cmsis/MK64F12.h.
| __O uint32_t FEVT |
Force Event register, offset: 0x50.
Definition at line 11126 of file cmsis/MK64F12.h.
| __I uint32_t HOSTVER |
Host Controller Version, offset: 0xFC.
Definition at line 11133 of file cmsis/MK64F12.h.
| __I uint32_t HTCAPBLT |
Host Controller Capabilities, offset: 0x40.
Definition at line 11123 of file cmsis/MK64F12.h.
| __IO uint32_t IRQSIGEN |
Interrupt Signal Enable register, offset: 0x38.
Definition at line 11121 of file cmsis/MK64F12.h.
| __IO uint32_t IRQSTAT |
Interrupt Status register, offset: 0x30.
Definition at line 11119 of file cmsis/MK64F12.h.
| __IO uint32_t IRQSTATEN |
Interrupt Status Enable register, offset: 0x34.
Definition at line 11120 of file cmsis/MK64F12.h.
| __IO uint32_t MMCBOOT |
MMC Boot register, offset: 0xC4.
Definition at line 11131 of file cmsis/MK64F12.h.
| __IO uint32_t PROCTL |
Protocol Control register, offset: 0x28.
Definition at line 11117 of file cmsis/MK64F12.h.
| __I uint32_t PRSSTAT |
Present State register, offset: 0x24.
Definition at line 11116 of file cmsis/MK64F12.h.
| __IO uint32_t SYSCTL |
System Control register, offset: 0x2C.
Definition at line 11118 of file cmsis/MK64F12.h.
| __IO uint32_t VENDOR |
Vendor Specific register, offset: 0xC0.
Definition at line 11130 of file cmsis/MK64F12.h.
| __IO uint32_t WML |
Watermark Level Register, offset: 0x44.
Definition at line 11124 of file cmsis/MK64F12.h.
| __IO uint32_t XFERTYP |
Transfer Type register, offset: 0xC.
Definition at line 11113 of file cmsis/MK64F12.h.
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