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target-mcu-k64f
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Morpheus
PIT_Type Struct Reference
[PIT Peripheral Access Layer]
PIT - Register Layout Typedef. More...
#include <MK64F12.h>
Data Fields | |
| __IO uint32_t | MCR |
| PIT Module Control Register, offset: 0x0. | |
| __IO uint32_t | LDVAL |
| Timer Load Value Register, array offset: 0x100, array step: 0x10. | |
| __I uint32_t | CVAL |
| Current Timer Value Register, array offset: 0x104, array step: 0x10. | |
| __IO uint32_t | TCTRL |
| Timer Control Register, array offset: 0x108, array step: 0x10. | |
| __IO uint32_t | TFLG |
| Timer Flag Register, array offset: 0x10C, array step: 0x10. | |
Detailed Description
PIT - Register Layout Typedef.
Definition at line 9790 of file cmsis/MK64F12.h.
Field Documentation
| __I uint32_t CVAL |
Current Timer Value Register, array offset: 0x104, array step: 0x10.
Definition at line 9795 of file cmsis/MK64F12.h.
| __IO uint32_t LDVAL |
Timer Load Value Register, array offset: 0x100, array step: 0x10.
Definition at line 9794 of file cmsis/MK64F12.h.
| __IO uint32_t MCR |
PIT Module Control Register, offset: 0x0.
Definition at line 9791 of file cmsis/MK64F12.h.
| __IO uint32_t TCTRL |
Timer Control Register, array offset: 0x108, array step: 0x10.
Definition at line 9796 of file cmsis/MK64F12.h.
| __IO uint32_t TFLG |
Timer Flag Register, array offset: 0x10C, array step: 0x10.
Definition at line 9797 of file cmsis/MK64F12.h.
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