Alessandro Angelino / target-mcu-k64f

Fork of target-mcu-k64f by Morpheus

Embed: (wiki syntax)

« Back to documentation index

PDB_Type Struct Reference

PDB_Type Struct Reference
[PDB Peripheral Access Layer]

PDB - Register Layout Typedef. More...

#include <MK64F12.h>

Data Fields

__IO uint32_t SC
 Status and Control register, offset: 0x0.
__IO uint32_t MOD
 Modulus register, offset: 0x4.
__I uint32_t CNT
 Counter register, offset: 0x8.
__IO uint32_t IDLY
 Interrupt Delay register, offset: 0xC.
__IO uint32_t POEN
 Pulse-Out n Enable register, offset: 0x190.
__IO uint32_t PODLY [3]
 Pulse-Out n Delay register, array offset: 0x194, array step: 0x4.
__IO uint32_t C1
 Channel n Control register 1, array offset: 0x10, array step: 0x28.
__IO uint32_t S
 Channel n Status register, array offset: 0x14, array step: 0x28.
__IO uint32_t DLY [2]
 Channel n Delay 0 register..Channel n Delay 1 register, array offset: 0x18, array step: index*0x28, index2*0x4.
__IO uint32_t INTC
 DAC Interval Trigger n Control register, array offset: 0x150, array step: 0x8.
__IO uint32_t INT
 DAC Interval n register, array offset: 0x154, array step: 0x8.

Detailed Description

PDB - Register Layout Typedef.

Definition at line 9570 of file cmsis/MK64F12.h.


Field Documentation

__IO uint32_t C1

Channel n Control register 1, array offset: 0x10, array step: 0x28.

Definition at line 9576 of file cmsis/MK64F12.h.

__I uint32_t CNT

Counter register, offset: 0x8.

Definition at line 9573 of file cmsis/MK64F12.h.

__IO uint32_t DLY[2]

Channel n Delay 0 register..Channel n Delay 1 register, array offset: 0x18, array step: index*0x28, index2*0x4.

Definition at line 9578 of file cmsis/MK64F12.h.

__IO uint32_t IDLY

Interrupt Delay register, offset: 0xC.

Definition at line 9574 of file cmsis/MK64F12.h.

__IO uint32_t INT

DAC Interval n register, array offset: 0x154, array step: 0x8.

Definition at line 9584 of file cmsis/MK64F12.h.

__IO uint32_t INTC

DAC Interval Trigger n Control register, array offset: 0x150, array step: 0x8.

Definition at line 9583 of file cmsis/MK64F12.h.

__IO uint32_t MOD

Modulus register, offset: 0x4.

Definition at line 9572 of file cmsis/MK64F12.h.

__IO uint32_t PODLY

Pulse-Out n Delay register, array offset: 0x194, array step: 0x4.

Definition at line 9588 of file cmsis/MK64F12.h.

__IO uint32_t POEN

Pulse-Out n Enable register, offset: 0x190.

Definition at line 9587 of file cmsis/MK64F12.h.

__IO uint32_t S

Channel n Status register, array offset: 0x14, array step: 0x28.

Definition at line 9577 of file cmsis/MK64F12.h.

__IO uint32_t SC

Status and Control register, offset: 0x0.

Definition at line 9571 of file cmsis/MK64F12.h.